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2023-09-23arm64: dts: qcom: msm8996: Add missing interrupt to the USB2 controllerKonrad Dybcio
[ Upstream commit 36541089c4733355ed844c67eebd0c3936953454 ] The interrupt line was previously not described. Take care of that. Fixes: 1e39255ed29d ("arm64: dts: msm8996: Add device node for qcom,dwc3") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230627-topic-more_bindings-v1-11-6b4b6cd081e5@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
2023-09-23arm64: dts: msm8996: thermal: Add interrupt supportAmit Kucheria
[ Upstream commit 6eb1c8ade5e8665eb97f8416eee0942c9f90b12b ] Register upper-lower interrupts for each of the two tsens controllers. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org> Stable-dep-of: 36541089c473 ("arm64: dts: qcom: msm8996: Add missing interrupt to the USB2 controller") Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-02-24arm64: dts: qcom: msm8996: Disable USB2 PHY suspend by coreManu Gautam
[ Upstream commit d026c96b25b7ce5df89526aad2df988d553edb4d ] QUSB2 PHY on msm8996 doesn't work well when autosuspend by dwc3 core using USB2PHYCFG register is enabled. One of the issue seen is that PHY driver reports PLL lock failure and fails phy_init() if dwc3 core has USB2 PHY suspend enabled. Fix this by using quirks to disable USB2 PHY LPM/suspend and dwc3 core already takes care of explicitly suspending PHY during suspend if quirks are specified. Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Signed-off-by: Paolo Pisati <p.pisati@gmail.com> Link: https://lore.kernel.org/r/20191209151501.26993-1-p.pisati@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
2019-03-13arm64: dts: add msm8996 compatible to gicv3Srinivas Kandagatla
[ Upstream commit 2a81efb0de0e33f2d2c83154af0bd3ce389b3269 ] Add compatible to gicv3 node to enable quirk required to restrict writing to GICR_WAKER register which is restricted on msm8996 SoC in Hypervisor. With this quirk MSM8996 can at least boot out of mainline, which can help community to work with boards based on MSM8996. Without this patch Qualcomm DB820c board reboots on mainline. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
2018-08-02arm64: dts: msm8996: thermal: Initialise via DT and add second controllerAmit Kucheria
We also split up the regmap address space into two, for the TM and SROT registers. This was required to deal with different address offsets for the TM and SROT registers across different SoC families. 8996 has two TSENS IP blocks, initialise the second one too. Since tsens-common.c/init_common() currently only registers one address space, the order is important (TM before SROT). This is OK since the code doesn't really use the SROT functionality yet. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Tested-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-25arm64: dts: qcom: msm8996: Use UFS_GDSC for UFSBjorn Andersson
The UFS host controller occationally (20%) fails to enable gcc_ufs_axi_clk because the UFS GDSC is not enabled. In most cases it's enabled through the UFS phy driver, but to make sure it's enabled let's enable it directly from the UFS host controller directly as well. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-22arm64: dts: qcom: msm8996: Add ufs related nodesBjorn Andersson
Add the UFS QMP phy node and the UFS host controller node, now that we have working UFS and the necessary clocks in place. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-22arm64: dts: msm8996: fix gic_irq_domain_translate warningsThierry Escande
Remove the usage of IRQ_TYPE_NONE to fix loud warnings from patch (83a86fbb5b56b "irqchip/gic: Loudly complain about the use of IRQ_TYPE_NONE"). Signed-off-by: Thierry Escande <thierry.escande@linaro.org> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Tested-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-22arm64: dts: apq8096-db820c: enable bluetooth nodeThierry Escande
Add a new serial node for the Qualcomm BT controller QCA6174. This allows automatic probing and hci registration through the serdev framework instead of relying on the userspace helpers. Signed-off-by: Thierry Escande <thierry.escande@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-22arm64: dts: qcom: rename qcom,pcie devices to pcieArnd Bergmann
The node name for a PCIe host bridge must be "pcie" as required by the binging. dtc now warns about it: arch/arm64/boot/dts/qcom/apq8096-db820c.dtb: Warning (pci_bridge): /soc/agnoc@0/qcom,pcie@610000: node name is not "pci" or "pcie" arch/arm64/boot/dts/qcom/apq8096-db820c.dtb: Warning (pci_device_bus_num): Failed prerequisite 'pci_bridge' arch/arm64/boot/dts/qcom/msm8996-mtp.dtb: Warning (pci_bridge): /soc/agnoc@0/qcom,pcie@610000: node name is not "pci" or "pcie" arch/arm64/boot/dts/qcom/msm8996-mtp.dtb: Warning (pci_device_bus_num): Failed prerequisite 'pci_bridge' This renames the nodes as appropriate. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-03-27Merge tag 'qcom-arm64-for-4.17' of ↵Arnd Bergmann
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt Pull "Qualcomm ARM64 Updates for v4.17" from Andy Gross: * Fix GIC_CPU_MASK_SIMPLE and SPI5 config on MSM8996 * Add SDM845 and kryo385 documentation * Add MSM8916 cooling maps, cpu frequency scaling, APCS, and A53 PLL * Switch APCS to use mailbox on MSM8916 * Add rmtfs-mem on MSM8996 * tag 'qcom-arm64-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux: arm64: dts: qcom: Fix SPI5 config on MSM8996 dt-bindings: qcom: Add SDM845 bindings dt-bindings: arm: Document kryo385 cpu arm64: dts: msm8916: Add cpu cooling maps arm64: dts: msm8996: Add rmtfs sharedmem node arm64: dts: qcom: msm8916: Add CPU frequency scaling support arm64: dts: qcom: msm8916: Add clock properties to the APCS node arm64: dts: qcom: msm8916: Probe the APCS mailbox driver arm64: dts: qcom: msm8916: Add msm8916 A53 PLL DT node arm64: dts: msm8996: Fix wrong use of GIC_CPU_MASK_SIMPLE()
2018-03-08arm64: dts: qcom: Fix SPI5 config on MSM8996Ilia Lin
Set correct clocks and interrupt values. Fixes the incorrect SPI master configuration. This is mandatory to make the SPI5 interface functional. Signed-off-by: Ilia Lin <ilialin@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-03-08arm64: dts: msm8996: Add rmtfs sharedmem nodeBjorn Andersson
A 2MB shared memory region is used on MSM8996 for exchanging sector data in rmtfs. Add this chunk of reserved memory now that we have the rmtfs-mem compatible to describe it and its memory protection properties. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-03-08arm64: dts: msm8996: Fix wrong use of GIC_CPU_MASK_SIMPLE()Rajendra Nayak
GICv3 does not have affinity bitmap in the binding for PPI interrupts. It can be specified using a 4th cell if needed as documented in the bindings. Clean up the wrong use of the affinity bitmap using the GIC_CPU_MASK_SIMPLE() macro Reported-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-02-22arm64: dts: Remove leading 0x and 0s from bindings notationMathieu Malaterre
Improve the DTS files by removing all the leading "0x" and zeros to fix the following dtc warnings: Warning (unit_address_format): Node /XXX unit name should not have leading "0x" and Warning (unit_address_format): Node /XXX unit name should not have leading 0s Converted using the following command: find . -type f \( -iname *.dts -o -iname *.dtsi \) -exec sed -E -i -e "s/@0x([0-9a-fA-F\.]+)\s?\{/@\L\1 \{/g" -e "s/@0+([0-9a-fA-F\.]+)\s?\{/@\L\1 \{/g" {} + For simplicity, two sed expressions were used to solve each warnings separately. To make the regex expression more robust a few other issues were resolved, namely setting unit-address to lower case, and adding a whitespace before the the opening curly brace: https://elinux.org/Device_Tree_Linux#Linux_conventions This is a follow up to commit 4c9847b7375a ("dt-bindings: Remove leading 0x from bindings notation") Reported-by: David Daney <ddaney@caviumnetworks.com> Suggested-by: Rob Herring <robh@kernel.org> Signed-off-by: Mathieu Malaterre <malat@debian.org> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-10-20Merge tag 'qcom-arm64-for-4.15' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/soc Pull "Qualcomm ARM64 Updates for v4.15" from Andy Gross: * Add PCIE support to relevant MSM8996 based boards * Add RPM clock controller node on MSM8996 * Add dload address on MSM8916 and MSM8996 * Add MBHC button support on APQ8016 SBC * Add RTMFS specific compatible for rmtfs memory node * Fixups for MSM8916 GPIO line names and MDP address length * tag 'qcom-arm64-for-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: arm64: dts: msm8916: Mark rmtfs node as qcom, rmtfs-mem compatible arm64: dts: msm8996: Add the rpm clock controller node arm64: dts: qcom: sbc: Name GPIO lines arm64: dts: qcom: msm8916: Shrink mdp address length for msm8916 arm64: dts: apq8016-sbc: add mbhc buttons support arm64: dts: qcom: Specify dload address for msm8916 and msm8996 arm64: dts: apq8096-db820c: never disable regulator on LS expansion arm64: dts: apq8096-db820c: Enable on board 3 pcie root complex arm64: dts: qcom: msm8996: add support to pcie
2017-10-20arm64: dts: fix unit-address leading 0sRob Herring
Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using the following command: perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm64/boot/dts -type -f -name '*.dts*' Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-10-11arm64: dts: msm8996: Add the rpm clock controller nodeRajendra Nayak
Add the rpm clock controller node for msm8996 devices Cc: Andy Gross <andy.gross@linaro.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-10-11arm64: dts: qcom: Specify dload address for msm8916 and msm8996Bjorn Andersson
On msm8916 and msm8996 boards a secure io-write is used to write the magic for selecting "download mode", specify this address in the DeviceTree. Note that qcom_scm.download_mode=1 must be specified on the kernel command line for the kernel to attempt selecting download mode. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-10-11arm64: dts: qcom: msm8996: add support to pcieSrinivas Kandagatla
This patch adds support to 3 pcie root complexes found on MSM8996. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-08-08arm64: dts: qcom: msm8996: Specify smd-edge for ADSPBjorn Andersson
Add the smd-edge node for the adsp, to allow SMD communication with the ADSP. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-08-08arm64: dts: msm8996: Add modem smp2p nodesBjorn Andersson
This patch adds the SMP2P nodes for the modem. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-08-08arm64: dts: qcom: Add RPM glink nodes to msm8996Bjorn Andersson
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-08-08arm64: dts: msm8996: Add device node for qcom,dwc3Vivek Gautam
Adding required device node for couple of DWC3 controllers present on msm8996 chipset to enable High speed and Super speed USB support. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-08-08arm64: dts: msm8996: Add device node for qcom qmp-phy for pcieVivek Gautam
Add required device node for QMP phy based 3-lane PCIe phy present on msm8996 chipset to enable support for the same. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-08-08arm64: dts: msm8996: Add device node for qcom qmp-phy for usbVivek Gautam
Adding required device node for USB3 QMP phy present on msm8996 chipset to enable support for the same. This phy provides super speed usb functionality for dwc3 controller on msm8996. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-08-08arm64: dts: msm8996: Add device node for qcom qusb2 phyVivek Gautam
Adding device node for QUSB2 phy and the required infrastructure to enable support for the same. This phy is used by dwc3 controller present on msm8996. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-06-05arm64: dts: msm8996: Add CPU clock controller nodeRajendra Nayak
Add the DT node for Kryo CPU clock controller on msm8996 devices. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-03-29arm64: dts: msm8996: Add ADSP PIL nodespjoshi@codeaurora.org
Add ADSP node required for Qualcomm ADSP Peripheral Image Loader. Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-03-28arm64: dts: msm8996: Add SLPI SMP2P dt node.avaneesh dwivedi
Add smp2p support to communicate with slpi processor. Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-03-28arm64: dts: qcom: msm8996: Fixup smp2p nodeBjorn Andersson
The SMEM state property name changes between the integration branch and mainline, update to use the correct one. Fixes: 2f45d9fcd531 ("arm64: dts: msm8996: Add SMP2P and APCS nodes") Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Sarangdhar Joshi <spjoshi@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-01-29Merge tag 'qcom-arm64-for-4.11' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt64 Qualcomm ARM64 Updates for v4.11 * Add Vol+ support for DB820C and APQ8016 * Add HDMI audio support for APQ8016 * Fix DB820C GPIO pinctrl name * Enable WCNSS on MSM8916 * Add SCM node for MSM8996 * Use fixed XO clock on MSM8916 * tag 'qcom-arm64-for-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: arm64: dts: db820c: add support to volume up key arm64: dts: apq8016-sbc: Limit MPP4 high state to 1.8V arm64: dts: apq8016-sbc: Add Volume Up key device node arm64: dts: apq8016-sbc: add support to hdmi audio via adv7533 arm64: dts: db820c: fix gpio pinctrl name correctly ARM: dts: msm8916: Add and enable wcnss node arm64: dts: msm8996: Add SCM DT node arm64: dts: qcom: msm8916: Use fixed factor xo clock Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-13arm64: dts: msm8996: Add SCM DT nodespjoshi@codeaurora.org
Add SCM DT node to enable SCM functionality on MSM8996. Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-12-28arm64: dts: msm8996: Add required memory carveoutsStephen Boyd
This patch adds required memory carveouts so that the kernel does not access memory that is in use or has been reserved for use by other remote processors. Signed-off-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-23ARM: dts: Add xo to sdhc clock node on qcom platformsRitesh Harjani
Add xo entry to sdhc clock node on all qcom platforms. Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-11-12arm64: dts: msm8996: Add SMP2P and APCS nodesspjoshi@codeaurora.org
Add SMP2P and APCS DT nodes required for Qualcomm ADSP Peripheral Image Loader. Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-11-12arm64: dts: msm8996: Add SMEM DT nodesBjorn Andersson
Add SMEM and TCSR DT nodes on MSM8996. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-11-12arm64: dts: msm8996: Add reserve-memory nodesspjoshi@codeaurora.org
Add reserve-memory nodes required for Qualcomm Peripheral Image Loaders Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-11-12arm64: dts: msm8996: Add SMEM reserve-memory nodespjoshi@codeaurora.org
Add DT node to carveout memory for shared memory region. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-08-23arm64: dts: msm8996: Add thermal zones, tsens and qfprom nodesRajendra Nayak
Add thermal zones and tsens node Acked-by: Eduardo Valentin <edubezval@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-08-23arm64: dts: qcom: Fix broken interrupt trigger settingsMarc Zyngier
When a device uses the GIC as its interrupt controller and generates SPIs, only the values 1 (edge rising) and 4 (level high) are legal. Anything else is just plain wrong (can't be programmed into the HW), and leads to aborted driver probes (USB doesn't work with 4.8-rc1 on a Dragonboard 410C). Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-06-24arm64: dts: msm8996: add sdc2 supportSrinivas Kandagatla
This patch adds support to sdc2 sdhci controller, which is used on some of the boards. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-06-24arm64: dts: msm8996: add support to blsp2_spi5Srinivas Kandagatla
This patch adds support to blsp2_spi5 device, which is used in some of the APQ8096 based boards. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-06-24arm64: dts: msm8996: add support to blsp1_spi0Srinivas Kandagatla
This patch adds support to blsp1_spi0 which is used on some of APQ8096 based boards. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-06-24arm64: dts: msm8996: add support to blsp2_i2c0Srinivas Kandagatla
This patch adds support to blsp2_i2c0, which is used on some of the APQ8096 based boards. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-06-24arm64: dts: msm8996: add support to blsp2_i2c1Srinivas Kandagatla
This patch adds support to blsp2_i2c1, which is used in one of the apq8096 based boards. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-06-24arm64: dts: msm8996: add support to blsp1_i2c2 deviceSrinivas Kandagatla
This patch adds blsp1_i2c2 support, as this bus is used on some of the apq8096 boards. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-06-24arm64: dts: msm8996: add support blsp2_uart2Srinivas Kandagatla
This patch adds bslp2_uart2 node in soc so that boards that use this uart can enable it. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-06-24arm64: dts: msm8996: add blsp2_uart1 pinctrlSrinivas Kandagatla
This patch adds 2pin and 4 pin uart pinctrl support for blsp2_uart1 Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-06-24arm64: dts: msm8996: add msmgpio labelSrinivas Kandagatla
This patch adds msmgpio label for pin and gpio controller so that it can referenced in dedicated pins file and other board level gpios. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-07-02 00:47:01 +0000