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2022-01-27arm64: tegra: Adjust length of CCPLEX cluster MMIO regionThierry Reding
[ Upstream commit 2b14cbd643feea5fc17c6e8bead4e71088c69acd ] The Tegra186 CCPLEX cluster register region is 4 MiB is length, not 4 MiB - 1. This was likely presumed to be the "limit" rather than length. Fix it up. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
2021-03-04arm64: tegra: Add power-domain for Tegra210 HDASameer Pujar
commit 1e0ca5467445bc1f41a9e403d6161a22f313dae7 upstream. HDA initialization is failing occasionally on Tegra210 and following print is observed in the boot log. Because of this probe() fails and no sound card is registered. [16.800802] tegra-hda 70030000.hda: no codecs found! Codecs request a state change and enumeration by the controller. In failure cases this does not seem to happen as STATETS register reads 0. The problem seems to be related to the HDA codec dependency on SOR power domain. If it is gated during HDA probe then the failure is observed. Building Tegra HDA driver into kernel image avoids this failure but does not completely address the dependency part. Fix this problem by adding 'power-domains' DT property for Tegra210 HDA. Note that Tegra186 and Tegra194 HDA do this already. Fixes: 742af7e7a0a1 ("arm64: tegra: Add Tegra210 support") Depends-on: 96d1f078ff0 ("arm64: tegra: Add SOR power-domain for Tegra210") Cc: <stable@vger.kernel.org> Signed-off-by: Sameer Pujar <spujar@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-06-25arm64: tegra: Fix ethernet phy-mode for Jetson XavierJon Hunter
[ Upstream commit bba25915b172c72f6fa635f091624d799e3c9cae ] The 'phy-mode' property is currently defined as 'rgmii' for Jetson Xavier. This indicates that the RGMII RX and TX delays are set by the MAC and the internal delays set by the PHY are not used. If the Marvell PHY driver is enabled, such that it is used and not the generic PHY, ethernet failures are seen (DHCP is failing to obtain an IP address) and this is caused because the Marvell PHY driver is disabling the internal RX and TX delays. For Jetson Xavier the internal PHY RX and TX delay should be used and so fix this by setting the 'phy-mode' to 'rgmii-id' and not 'rgmii'. Fixes: f89b58ce71a9 ("arm64: tegra: Add ethernet controller on Tegra194") Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
2019-12-13arm64: tegra: Fix 'active-low' warning for Jetson TX1 regulatorJon Hunter
commit 1e5e929c009559bd7e898ac8e17a5d01037cb057 upstream. Commit 34993594181d ("arm64: tegra: Enable HDMI on Jetson TX1") added a regulator for HDMI on the Jetson TX1 platform. This regulator has an active high enable, but the GPIO specifier for enabling the regulator incorrectly defines it as active-low. This causes the following warning to occur on boot ... WARNING KERN regulator@10 GPIO handle specifies active low - ignored The fixed-regulator binding does not use the active-low flag from the gpio specifier and purely relies of the presence of the 'enable-active-high' property to determine if it is active high or low (if this property is omitted). Fix this warning by setting the GPIO to active-high in the GPIO specifier which aligns with the presense of the 'enable-active-high' property. Fixes: 34993594181d ("arm64: tegra: Enable HDMI on Jetson TX1") Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-11-20arm64: tegra: I2C on Tegra194 is not compatible with Tegra114Thierry Reding
[ Upstream commit d9fd22447ba59a9b53a202fade977e82bfba8d8d ] Tegra194 contains a version of the I2C controller that is no longer compatible with the version found in Tegra114. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
2019-11-20arm64: dts: tegra210-p2180: Correct sdmmc4 vqmmc-supplyAapo Vienamo
[ Upstream commit 6ff7705da8806de45ca1490194f0b4eb07725804 ] On p2180 sdmmc4 is powered from a fixed 1.8 V regulator. Signed-off-by: Aapo Vienamo <avienamo@nvidia.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
2019-07-26arm64: tegra: Fix AGIC register rangeJon Hunter
commit ba24eee6686f6ed3738602b54d959253316a9541 upstream. The Tegra AGIC interrupt controller is an ARM GIC400 interrupt controller. Per the ARM GIC device-tree binding, the first address region is for the GIC distributor registers and the second address region is for the GIC CPU interface registers. The address space for the distributor registers is 4kB, but currently this is incorrectly defined as 8kB for the Tegra AGIC and overlaps with the CPU interface registers. Correct the address space for the distributor to be 4kB. Cc: stable@vger.kernel.org Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Fixes: bcdbde433542 ("arm64: tegra: Add AGIC node for Tegra210") Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-07-26arm64: tegra: Update Jetson TX1 GPU regulator timingsJon Hunter
commit ece6031ece2dd64d63708cfe1088016cee5b10c0 upstream. The GPU regulator enable ramp delay for Jetson TX1 is set to 1ms which not sufficient because the enable ramp delay has been measured to be greater than 1ms. Furthermore, the downstream kernels released by NVIDIA for Jetson TX1 are using a enable ramp delay 2ms and a settling delay of 160us. Update the GPU regulator enable ramp delay for Jetson TX1 to be 2ms and add a settling delay of 160us. Cc: stable@vger.kernel.org Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Fixes: 5e6b9a89afce ("arm64: tegra: Add VDD_GPU regulator to Jetson TX1") Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-07-02arm64: tegra: Add CPU nodes to Tegra194 device treeMikko Perttunen
Add CPU and PSCI nodes to device tree. The Tegra194 SoC contains eight NVIDIA Carmel CPUs. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-07-02arm64: tegra: Add ethernet controller on Tegra194Mikko Perttunen
The Tegra194 contains the same ethernet controller as the Tegra186. Add the device tree node for it, and correspondingly the PHY node on the board device tree. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-07-02arm64: tegra: Enable card detect for SD card on P2888Mikko Perttunen
Now that we have a GPIO controller, enable the card detect GPIO for the SD card slot. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-07-02arm64: tegra: Add GPIO controller on Tegra194Mikko Perttunen
Add the device tree node for the GPIO controller on Tegra194. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-05-03arm64: tegra: Make BCM89610 PHY interrupt as active lowBhadram Varka
Need to configure PHY interrupt as active low for P3310 Tegra186 platform otherwise it results in spurious interrupts. This issue wasn't seen before because the generic PHY driver without interrupt support was used. Signed-off-by: Bhadram Varka <vbhadram@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-14arm64: tegra: Enable AHCI on Jetson TX1Preetham Ramchandra
Enable AHCI on Jetson TX1 and add sata phy node. Signed-off-by: Preetham Chandru R <pchandru@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-14arm64: tegra: Add SATA node for Tegra210Preetham Ramchandra
Populate the SATA node for Tegra210. Signed-off-by: Preetham Ramchandra <pchandru@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-08arm64: tegra: Add device tree for the Tegra194 P2972-0000 boardMikko Perttunen
Add device tree files for the Tegra194 P2972-0000 development board. The board consists of the P2888 compute module and the P2822 baseboard. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-08arm64: tegra: Add Tegra194 chip device treeMikko Perttunen
Add the chip-level device tree, including binding headers, for the NVIDIA Tegra194 "Xavier" system-on-chip. Only a small subset of devices are initially available, enough to boot to UART console. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-15arm64: tegra: Use sor1_out clockThierry Reding
Use the sor1_out clock instead of sor1_src. This is a more accurate model of the hardware and allows for more complicated configurations such as HDMI 2.0. Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-15arm64: tegra: Fix SD write-protect polarity on Jetson TX2Thierry Reding
The write-protect GPIO has an active high polarity. Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13arm64: tegra: Add CPU and PSCI nodes for NVIDIA Tegra210 platformsJon Hunter
Add the CPU and PSCI nodes for the NVIDIA Tegra210 platforms so that all CPUs can be enabled on boot. This assumes that the PSCI firmware has been loaded during the initial bootstrap on the device before the kernel starts (which is typically the case for these platforms). The PSCI firmware version is set to v0.2 which aligns with the current shipping version for Tegra. Reported-by: Martin Michlmayr <tbm@cyrius.com> Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Tested-By: Vagrant Cascadian <vagrant@debian.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13arm64: tegra: Enable HDMI on Jetson TX2Thierry Reding
Enable the host1x and necessary children and hook up the HDMI +5V pin to enable video output on the HDMI port found on Jetson TX2. Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13arm64: tegra: Mark I2C4 as DDC on P3310Thierry Reding
The P3310 compute module assigns the I2C4 to be used for DDC operations. Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13arm64: tegra: Add display nodes on Tegra186Thierry Reding
Adds the device tree nodes for the display hub and display controllers as well as the DPAUX, DSI and SOR controllers. Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13arm64: tegra: Add SMMU node for Tegra186Thierry Reding
Add the DT node for ARM SMMU on Tegra186. Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Tested-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13arm64: tegra: Enable memory controller on P3310Thierry Reding
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13arm64: tegra: Add memory controller on Tegra186Thierry Reding
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13arm64: tegra: Add FUSE block on Tegra186Thierry Reding
The FUSE register block found on Tegra186 SoCs encodes various settings, such as calibration data for other blocks. Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13arm64: tegra: Add MISC registers on Tegra186Thierry Reding
The MISC register block found on Tegra186 SoCs contains registers that can be used to identify a given chip and various strapping options. Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-11-16Merge tag 'armsoc-dt' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM device-tree updates from Arnd Bergmann: "We add device tree files for a couple of additional SoCs in various areas: Allwinner R40/V40 for entertainment, Broadcom Hurricane 2 for networking, Amlogic A113D for audio, and Renesas R-Car V3M for automotive. As usual, lots of new boards get added based on those and other SoCs: - Actions S500 based CubieBoard6 single-board computer - Amlogic Meson-AXG A113D based development board - Amlogic S912 based Khadas VIM2 single-board computer - Amlogic S912 based Tronsmart Vega S96 set-top-box - Allwinner H5 based NanoPi NEO Plus2 single-board computer - Allwinner R40 based Banana Pi M2 Ultra and Berry single-board computers - Allwinner A83T based TBS A711 Tablet - Broadcom Hurricane 2 based Ubiquiti UniFi Switch 8 - Broadcom bcm47xx based Luxul XAP-1440/XAP-810/ABR-4500/XBR-4500 wireless access points and routers - NXP i.MX51 based Zodiac Inflight Innovations RDU1 board - NXP i.MX53 based GE Healthcare PPD biometric monitor - NXP i.MX6 based Pistachio single-board computer - NXP i.MX6 based Vining-2000 automotive diagnostic interface - NXP i.MX6 based Ka-Ro TX6 Computer-on-Module in additional variants - Qualcomm MSM8974 (Snapdragon 800) based Fairphone 2 phone - Qualcomm MSM8974pro (Snapdragon 801) based Sony Xperia Z2 Tablet - Realtek RTD1295 based set-top-boxes MeLE V9 and PROBOX2 AVA - Renesas R-Car V3M (R8A77970) SoC and "Eagle" reference board - Renesas H3ULCB and M3ULCB "Kingfisher" extension infotainment boards - Renasas r8a7745 based iWave G22D-SODIMM SoM - Rockchip rk3288 based Amarula Vyasa single-board computer - Samsung Exynos5800 based Odroid HC1 single-board computer For existing SoC support, there was a lot of ongoing work, as usual most of that concentrated on the Renesas, Rockchip, OMAP, i.MX, Amlogic and Allwinner platforms, but others were also active. Rob Herring and many others worked on reducing the number of issues that the latest version of 'dtc' now warns about. Unfortunately there is still a lot left to do. A rework of the ARM foundation model introduced several new files for common variations of the model" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (599 commits) arm64: dts: uniphier: route on-board device IRQ to GPIO controller for PXs3 dt-bindings: bus: Add documentation for the Technologic Systems NBUS arm64: dts: actions: s900-bubblegum-96: Add fake uart5 clock ARM: dts: owl-s500: Add CubieBoard6 dt-bindings: arm: actions: Add CubieBoard6 ARM: dts: owl-s500-guitar-bb-rev-b: Add fake uart3 clock ARM: dts: owl-s500: Set power domains for CPU2 and CPU3 arm: dts: mt7623: remove unused compatible string for pio node arm: dts: mt7623: update usb related nodes arm: dts: mt7623: update crypto node ARM: dts: sun8i: a711: Enable USB OTG ARM: dts: sun8i: a711: Add regulator support ARM: dts: sun8i: a83t: bananapi-m3: Enable AP6212 WiFi on mmc1 ARM: dts: sun8i: a83t: cubietruck-plus: Enable AP6330 WiFi on mmc1 ARM: dts: sun8i: a83t: Move mmc1 pinctrl setting to dtsi file ARM: dts: sun8i: a83t: allwinner-h8homlet-v2: Add AXP818 regulator nodes ARM: dts: sun8i: a83t: bananapi-m3: Add AXP813 regulator nodes ARM: dts: sun8i: a83t: cubietruck-plus: Add AXP818 regulator nodes ARM: dts: sunxi: Add dtsi for AXP81x PMIC arm64: dts: allwinner: H5: Restore EMAC changes ...
2017-11-14Merge tag 'devicetree-for-4.15' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull DeviceTree updates from Rob Herring: "A bigger diffstat than usual with the kbuild changes and a tree wide fix in the binding documentation. Summary: - kbuild cleanups and improvements for dtbs - Code clean-up of overlay code and fixing for some long standing memory leak and race condition in applying overlays - Improvements to DT memory usage making sysfs/kobjects optional and skipping unflattening of disabled nodes. This is part of kernel tinification efforts. - Final piece of removing storing the full path for every DT node. The prerequisite conversion of printk's to use device_node format specifier happened in 4.14. - Sync with current upstream dtc. This brings additional checks to dtb compiling. - Binding doc tree wide removal of leading 0s from examples - RTC binding documentation adding missing devices and some consolidation of duplicated bindings - Vendor prefix documentation for nutsboard, Silicon Storage Technology, shimafuji, Tecon Microprocessor Technologies, DH electronics GmbH, Opal Kelly, and Next Thing" * tag 'devicetree-for-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (55 commits) dt-bindings: usb: add #phy-cells to usb-nop-xceiv dt-bindings: Remove leading zeros from bindings notation kbuild: handle dtb-y and CONFIG_OF_ALL_DTBS natively in Makefile.lib MIPS: dts: remove bogus bcm96358nb4ser.dtb from dtb-y entry kbuild: clean up *.dtb and *.dtb.S patterns from top-level Makefile .gitignore: move *.dtb and *.dtb.S patterns to the top-level .gitignore .gitignore: sort normal pattern rules alphabetically dt-bindings: add vendor prefix for Next Thing Co. scripts/dtc: Update to upstream version v1.4.5-6-gc1e55a5513e9 of: dynamic: fix memory leak related to properties of __of_node_dup of: overlay: make pr_err() string unique of: overlay: pr_err from return NOTIFY_OK to overlay apply/remove of: overlay: remove unneeded check for NULL kbasename() of: overlay: remove a dependency on device node full_name of: overlay: simplify applying symbols from an overlay of: overlay: avoid race condition between applying multiple overlays of: overlay: loosen overly strict phandle clash check of: overlay: expand check of whether overlay changeset can be removed of: overlay: detect cases where device tree may become corrupt of: overlay: minor restructuring ...
2017-11-09kbuild: handle dtb-y and CONFIG_OF_ALL_DTBS natively in Makefile.libMasahiro Yamada
If CONFIG_OF_ALL_DTBS is enabled, "make ARCH=arm64 dtbs" compiles each DTB twice; one from arch/arm64/boot/dts/*/Makefile and the other from the dtb-$(CONFIG_OF_ALL_DTBS) line in arch/arm64/boot/dts/Makefile. It could be a race problem when building DTBS in parallel. Another minor issue is CONFIG_OF_ALL_DTBS covers only *.dts in vendor sub-directories, so this broke when Broadcom added one more hierarchy in arch/arm64/boot/dts/broadcom/<soc>/. One idea to fix the issues in a clean way is to move DTB handling to Kbuild core scripts. Makefile.dtbinst already recognizes dtb-y natively, so it should not hurt to do so. Add $(dtb-y) to extra-y, and $(dtb-) as well if CONFIG_OF_ALL_DTBS is enabled. All clutter things in Makefiles go away. As a bonus clean-up, I also removed dts-dirs. Just use subdir-y directly to traverse sub-directories. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Arnd Bergmann <arnd@arndb.de> [robh: corrected BUILTIN_DTB to CONFIG_BUILTIN_DTB] Signed-off-by: Rob Herring <robh@kernel.org>
2017-11-08kbuild: clean up *.dtb and *.dtb.S patterns from top-level MakefileMasahiro Yamada
We need to add "clean-files" in Makfiles to clean up DT blobs, but we often miss to do so. Since there are no source files that end with .dtb or .dtb.S, so we can clean-up those files from the top-level Makefile. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Rob Herring <robh@kernel.org>
2017-11-02License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-10-19arm64: tegra: Add BPMP thermal sensor to Tegra186Mikko Perttunen
This adds the thermal sensor device provided by the BPMP, and the relevant thermal sensors to the Tegra186 device tree. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-10-19arm64: tegra: Enable PCIe on Jetson TX2Manikanta Maddireddy
Enable x4 PCIe slot on Jetson TX2. Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Tested-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-10-19arm64: tegra: Add PCIe node for Tegra186Manikanta Maddireddy
Tegra186 has three PCIe controllers, which can be operated in 401, 211 or 111 lane combinations. Add DT support for PCIe controllers. Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Tested-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-10-19arm64: tegra: Add VIC on Tegra186Mikko Perttunen
Add a node for the Video Image Compositor on the Tegra186. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-10-19arm64: tegra: Add host1x on Tegra186Mikko Perttunen
Add the node for Host1x on the Tegra186, without any subdevices for now. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-10-19arm64: tegra: Add #power-domain-cells for BPMPMikko Perttunen
Add #power-domain-cells for the BPMP node on Tegra186 so that the power domain provider may be used. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-06-13arm64: dts: nvidia: fix PCI bus dtc warningsRob Herring
dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: linux-tegra@vger.kernel.org Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-06-13arm64: tegra: Add CCPLEX_CLUSTER area in Tegra186Mikko Perttunen
The Tegra186 CCPLEX_CLUSTER area contains memory-mapped registers that initiate CPU frequency/voltage transitions. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-04-04arm64: tegra: Update the Tegra132 flowctrl compatible stringJon Hunter
Update the Tegra132 flowctrl compatible string to include "nvidia,tegra132-flowctrl" so it is aligned with the flowctrl binding documentation. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-04-04arm64: tegra: Add GPU node for Tegra186Alexandre Courbot
Add the DT node for the GP10B GPU on Tegra186. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-03-20arm64: tegra: Enable IOMMU for host1x on Tegra210Mikko Perttunen
The host1x driver now supports operation behind an IOMMU, so add its IOMMU domain to the device tree. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-03-20arm64: tegra: Enable VIC on Tegra210Mikko Perttunen
Enable the VIC (Video Image Compositor) host1x unit on Tegra210 systems. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-03-10arm64: tegra: Add GPIO expanders on P2771Thierry Reding
The P2771 development board expands the number of GPIOs via two I2C chips. Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-03-10arm64: tegra: Add power monitors on P2771Thierry Reding
The P2771 development board comes with two power monitors that can be used to determine power consumption in different parts of the board. Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-03-10arm64: tegra: Add GPIO keys on P2771Thierry Reding
The P2771 has three keys (power, volume up and volume down) that are connected to pins on the AON GPIO controller. Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-03-10arm64: tegra: Enable current monitors on P3310Thierry Reding
The P3310 processor module contains two current monitors that can be used to determine the current flow across various parts of the board design. Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-03-10arm64: tegra: Enable SD/MMC slot on P2771Thierry Reding
The P3310 processor module makes provisions for exposing the SDMMC1 controller via a standard SD/MMC slot, which the P2771 supports. Hook up the power supply provided on the P2771 carrier board and enable the device tree node. Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>