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path: root/arch/arm/boot/dts/tegra124-apalis.dtsi
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2019-04-17ARM: tegra: apalis: Move PLL power supplies to XUSB pad controllerThierry Reding
The XUSB pad controller is responsible for supplying power to the PLLs used to drive the various USB, PCI and SATA pads. Move the PLL power supplies from the PCIe and XUSB controllers to the XUSB pad controller to make sure they are available when needed. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-17ARM: tegra: Convert to SPDX license tags for Tegra124 ApalisIgor Opaniuk
Replace boiler plate licenses texts with the SPDX license identifiers in Colibri/Apalis DTS files. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> [treding@nvidia.com: drop unneeded parentheses, keep license at X11] Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis-tk1: shorten temperature-sensor nodeMarcel Ziswiler
Shorten temperature-sensor node to just temp-sensor as suggested in the binding documentation. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis-tk1: get rid of fake clocks simple busMarcel Ziswiler
Get rid of the fake clocks simple bus and use node names as per the actual schematics. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis-tk1: replace underscores in node names with dashesMarcel Ziswiler
As underscores in node names are not recommended replace them all where possible with dashes. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis-tk1: drop module level model and compatibleMarcel Ziswiler
Drop model and compatible nodes from the module level device tree as they get overridden by the carrier board device tree anyway. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis-tk1: reorder cpu dfll clock propertiesMarcel Ziswiler
Reorder CPU DFLL clock properties. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis-tk1: enable emmc ddr52 modeMarcel Ziswiler
Add mmc-ddr-1_8v property enabling eMMC DDR52 mode. root@apalis-tk1-mainline:~# cat /sys/kernel/debug/mmc2/ios clock: 52000000 Hz actual clock: 52000000 Hz vdd: 21 (3.3 ~ 3.4 V) bus mode: 2 (push-pull) chip select: 0 (don't care) power mode: 2 (on) bus width: 3 (8 bits) timing spec: 8 (mmc DDR52) signal voltage: 1 (1.80 V) driver type: 0 (driver type B) root@apalis-tk1-mainline:~# hdparm -t /dev/mmcblk2 /dev/mmcblk2: Timing buffered disk reads: 256 MB in 3.02 seconds = 84.83 MB/sec Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis-tk1: add proper emmc vmmc and vqmmc suppliesMarcel Ziswiler
Add proper eMMC vmmc and vqmmc supplies e.g. fixing signalling voltage. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis-tk1: white-space clean-upMarcel Ziswiler
White-space clean-up. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis-tk1: drop unused pinmux labelMarcel Ziswiler
Drop unused pinmux label. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis-tk1: add missing regulatorsMarcel Ziswiler
Add missing regulators: - reg_module_3v3_audio being VDDA supply of SGTL5000 - VDDD supply of SGTL5000 actually being reg_1v8_vio - TMP451 temperature sensor vcc supply being reg_module_3v3 - usb3-0 vbus supply being reg_usbh_vbus - usb3-1 vbus supply being reg_usbo1_vbus - carrier board HDMI supply being reg_5v0 - carrier board sata target 5v supply being reg_5v0 - carrier board sata target 12v supply being reg_12v0 - carrier board reg_3v3 actually being backlight power supply Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis-tk1: regulator clean-upMarcel Ziswiler
Just cosmetic regulator clean-up. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis-tk1: reorder padctl propertiesMarcel Ziswiler
Reorder padctl properties. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis-tk1: reorder host1x/hdmi propertiesMarcel Ziswiler
Reorder Host1x/HDMI properties. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis-tk1: add local-mac-address propertyMarcel Ziswiler
Add empty local-mac-address property to be filled in by boot loader (e.g. U-Boot). Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-07-09ARM: tegra: Fix unit_address_vs_reg DTC warnings for /memoryKrzysztof Kozlowski
Add a generic /memory node in each Tegra DTSI (with empty reg property, to be overidden by each DTS) and set proper unit address for /memory nodes to fix the DTC warnings: arch/arm/boot/dts/tegra20-harmony.dtb: Warning (unit_address_vs_reg): /memory: node has a reg or ranges property, but no unit name The DTB after the change is the same as before except adding unit-address to /memory node. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-05-03ARM: tegra: apalis-tk1: Fix high speed UART compatibleMarcel Ziswiler
Turns out the compatible "nvidia,tegra124-hsuart" does not (yet) exist and everybody else also uses it only in conjunction with "nvidia,tegra30-hsuart". Reported-by: Martin Šafařík <msafarik@retia.cz> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-08ARM: tegra: apalis-tk1: Copyright period, spurious newlinesMarcel Ziswiler
Update the copyright period and get rid of some spurious newlines. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-08ARM: tegra: apalis-tk1: Hog group for ethernet, PCIe, reset GPIOsMarcel Ziswiler
The Apalis TK1 module uses some dedicated GPIOs as I210 gigabit Ethernet controller reset and to control RESET_MOCI aka reset module output carrier input on MXM3 pin 26. The Apalis Evaluation Board furthermore uses Apalis GPIO7 on MXM3 pin 15 as reset signal for its PLX PEX 8605 PCIe Switch. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-08ARM: tegra: apalis-tk1: Add missing as3722 gpio0 configurationMarcel Ziswiler
As the AS3722 GPIO0 is also a not connected on our Apalis TK1 module explicitly configure it to high-impedance as well. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-08ARM: tegra: apalis-tk1: Activate PWM pin muxing for pwm3Marcel Ziswiler
Activate PWM pin muxing for Apalis PWM3. Note that the same PWM3 is already active on pu6 being Apalis BKL1_PWM as well. Therefore exporting that one for raw sysfs access will fail and one has to revert to using the PWM backlight. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-08ARM: tegra: apalis-tk1: Set critical tripsMarcel Ziswiler
Set "critical" trip temperatures for cpu, gpu, mem and pllx thermal zones. These trips can trigger shut down or reset. Similar to commit 40823f8e267f ("arm: tegra: set critical trips for Tegra124"). Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-08ARM: tegra: Fix I2C bus frequencies on Apalis/ColibriMarcel Ziswiler
Use a faster speed of 400 kbit/s for regular I2C busses. Use a slower speed of 10 kbit/s for DDC/EDID to improve reliability. Use a slower speed of 100 kbit/s for power I2C to be within specs of the LM95245 temperature sensor. While at it further annotate I2C pin usage. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-06-13ARM: dts: tegra: fix PCI bus dtc warningsRob Herring
dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: linux-tegra@vger.kernel.org Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-01-25ARM: tegra: apalis-tk1: Update compatibility commentMarcel Ziswiler
Now with the new V1.1A HW card detect being implemented update resp. compatibility information. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-01-25ARM: tegra: apalis-tk1: Adjust pin muxing for v1.1 HWMarcel Ziswiler
Configure Apalis MMC1 D6 GPIO on SDMMC3_CLK_LB_IN as reserved function without any pull-up/down. Configure GPIO_PV2 as SD1_CD# according to latest V1.1 HW. Leave SDMMC3_CLK_LB_OUT muxed as SDMMC3 with output driver enabled aka not tristated and input driver enabled as well as it features some magic properties even though the external loopback is disabled and the internal loopback used as per SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1 bits being set to 0xfffd according to the TRM! This pin is now a not-connect on V1.1 HW in order to avoid any interference. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-01-25ARM: tegra: apalis-tk1: Optional DisplayPort hot-plug detectMarcel Ziswiler
Configure DP_HPD_PFF0 pin as optional DisplayPort hot-plug detect. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-01-25ARM: tegra: apalis-tk1: Pull-up temperature alertMarcel Ziswiler
Pull-up GPIO_PI6 connected to TMP451's ALERT#/THERM2#. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-08ARM: tegra: apalis-tk1: Drop leading 0 from unit-addressThierry Reding
According to the latest best practices, unit-addresses should be represented without any leading zeroes. Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-11ARM: tegra: Initial support for Apalis TK1Marcel Ziswiler
This patch adds the device tree to support Toradex Apalis TK1 a computer on module which can be used on different carrier boards. The module consists of a Tegra TK1 SoC, a PMIC solution, 2 GB of DDR3L RAM, a bunch of level shifters, an eMMC, a TMP451 temperature sensor chip, an I210 gigabit Ethernet controller and a SGTL5000 audio codec. Furthermore, there is a Kinetis MK20DN512 companion micro controller for analogue, CAN and resistive touch functionality which is not yet supported. Anything that is not self contained on the module is disabled by default. The device tree for the Evaluation Board includes the module's device tree and enables the supported peripherals of the carrier board (the Evaluation Board supports almost all of them). Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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