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2020-01-23ARM: dts: imx6q-icore-mipi: Use 1.5 version of i.Core MX6DLJagan Teki
commit 4a132f60808ae3a751e107a373f8572012352d3c upstream. The EDIMM STARTER KIT i.Core 1.5 MIPI Evaluation is based on the 1.5 version of the i.Core MX6 cpu module. The 1.5 version differs from the original one for a few details, including the ethernet PHY interface clock provider. With this commit, the ethernet interface works properly: SMSC LAN8710/LAN8720 2188000.ethernet-1:00: attached PHY driver While before using the 1.5 version, ethernet failed to startup do to un-clocked PHY interface: fec 2188000.ethernet eth0: could not attach to PHY Similar fix has merged for i.Core MX6Q but missed to update for DL. Fixes: a8039f2dd089 ("ARM: dts: imx6dl: Add Engicam i.CoreM6 1.5 Quad/Dual MIPI starter kit support") Cc: Jacopo Mondi <jacopo@jmondi.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-06-19ARM: dts: imx6dl: Add Engicam i.CoreM6 1.5 Quad/Dual MIPI starter kit supportJagan Teki
i.CoreM6 1.5 is an another i.CoreM6 QDL cpu modules which can be connected to EDIMM starter kit design with eMMC and MIPI-CSI interfaces suitable for Android and video capture application. notable features: CPU NXP i.MX6 S/DL/D/Q, Up to 4 x Cortex-A9@800MHz Memory Up to 2 GB DDR3-1066 Video Interfaces Up to 1 Parallel Up to 2 LVDS HDMI 1.4 port 8 bit CSI INPUT MIPI-CSI INPUT 1 x 10/100 Ethernet interface, 2 x USB, 1 x PCIe, 1 x I2S etc Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>