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Diffstat (limited to 'drivers/mtd/nand/raw/nand_base.c')
-rw-r--r--drivers/mtd/nand/raw/nand_base.c15
1 files changed, 12 insertions, 3 deletions
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index db66c1be6e5f..22d5087017b0 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -467,9 +467,18 @@ static int nand_do_write_oob(struct nand_chip *chip, loff_t to,
* if we don't do this. I have no clue why, but I seem to have 'fixed'
* it in the doc2000 driver in August 1999. dwmw2.
*/
- ret = nand_reset(chip, chipnr);
- if (ret)
- return ret;
+ /*
+ * Nand onfi compatible devices may support different data interface
+ * modes like SDR, NVDDR and NVDDR2. Giving reset to device places the
+ * device in to power-up state and places the target in the SDR data
+ * interface mode. This will be the problem for devices configured for
+ * NVDDR modes. So, limiting the reset operation to Toshiba devices.
+ */
+ if (chip->parameters.onfi->jedec_id == NAND_MFR_TOSHIBA) {
+ ret = nand_reset(chip, chipnr);
+ if (ret)
+ return ret;
+ }
nand_select_target(chip, chipnr);