diff options
Diffstat (limited to 'arch/arm64/boot/dts/qcom/msm8996.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/qcom/msm8996.dtsi | 213 |
1 files changed, 95 insertions, 118 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index f1d3c51ea8d0..8bfb897b0e81 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -433,6 +433,19 @@ }; }; + etm { + compatible = "qcom,coresight-remote-etm"; + + out-ports { + port { + modem_etm_out_funnel_in2: endpoint { + remote-endpoint = + <&funnel_in2_in_modem_etm>; + }; + }; + }; + }; + psci { compatible = "arm,psci-1.0"; method = "smc"; @@ -571,7 +584,7 @@ rpm_msg_ram: memory@68000 { compatible = "qcom,rpm-msg-ram"; - reg = <0x68000 0x6000>; + reg = <0x00068000 0x6000>; }; rng: rng@83000 { @@ -583,28 +596,28 @@ tcsr_mutex_regs: syscon@740000 { compatible = "syscon"; - reg = <0x740000 0x20000>; + reg = <0x00740000 0x20000>; }; tsens0: thermal-sensor@4a9000 { compatible = "qcom,msm8996-tsens"; - reg = <0x4a9000 0x1000>, /* TM */ - <0x4a8000 0x1000>; /* SROT */ + reg = <0x004a9000 0x1000>, /* TM */ + <0x004a8000 0x1000>; /* SROT */ #qcom,sensors = <13>; #thermal-sensor-cells = <1>; }; tsens1: thermal-sensor@4ad000 { compatible = "qcom,msm8996-tsens"; - reg = <0x4ad000 0x1000>, /* TM */ - <0x4ac000 0x1000>; /* SROT */ + reg = <0x004ad000 0x1000>, /* TM */ + <0x004ac000 0x1000>; /* SROT */ #qcom,sensors = <8>; #thermal-sensor-cells = <1>; }; tcsr: syscon@7a0000 { compatible = "qcom,tcsr-msm8996", "syscon"; - reg = <0x7a0000 0x18000>; + reg = <0x007a0000 0x18000>; }; intc: interrupt-controller@9bc0000 { @@ -620,7 +633,7 @@ apcs_glb: mailbox@9820000 { compatible = "qcom,msm8996-apcs-hmss-global"; - reg = <0x9820000 0x1000>; + reg = <0x09820000 0x1000>; #mbox-cells = <1>; }; @@ -630,7 +643,7 @@ #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; - reg = <0x300000 0x90000>; + reg = <0x00300000 0x90000>; }; stm@3002000 { @@ -736,6 +749,14 @@ clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; clock-names = "apb_pclk", "atclk"; + in-ports { + port { + funnel_in2_in_modem_etm: endpoint { + remote-endpoint = + <&modem_etm_out_funnel_in2>; + }; + }; + }; out-ports { port { @@ -1103,7 +1124,7 @@ kryocc: clock-controller@6400000 { compatible = "qcom,apcc-msm8996"; - reg = <0x6400000 0x90000>; + reg = <0x06400000 0x90000>; #clock-cells = <1>; }; @@ -1149,7 +1170,7 @@ blsp2_uart1: serial@75b0000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; - reg = <0x75b0000 0x1000>; + reg = <0x075b0000 0x1000>; interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; clocks = <&gcc GCC_BLSP2_UART2_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>; @@ -1215,7 +1236,7 @@ sdhc2: sdhci@74a4900 { status = "disabled"; compatible = "qcom,sdhci-msm-v4"; - reg = <0x74a4900 0x314>, <0x74a4000 0x800>; + reg = <0x074a4900 0x314>, <0x074a4000 0x800>; reg-names = "hc_mem", "core_mem"; interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>, @@ -1300,11 +1321,11 @@ spmi_bus: qcom,spmi@400f000 { compatible = "qcom,spmi-pmic-arb"; - reg = <0x400f000 0x1000>, - <0x4400000 0x800000>, - <0x4c00000 0x800000>, - <0x5800000 0x200000>, - <0x400a000 0x002100>; + reg = <0x0400f000 0x1000>, + <0x04400000 0x800000>, + <0x04c00000 0x800000>, + <0x05800000 0x200000>, + <0x0400a000 0x002100>; reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; interrupt-names = "periph_irq"; interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>; @@ -1318,20 +1339,10 @@ ufsphy: phy@627000 { compatible = "qcom,msm8996-ufs-phy-qmp-14nm"; - reg = <0x627000 0xda8>; + reg = <0x00627000 0xda8>; reg-names = "phy_mem"; #phy-cells = <0>; - vdda-phy-supply = <&pm8994_l28>; - vdda-pll-supply = <&pm8994_l12>; - - vdda-phy-max-microamp = <18380>; - vdda-pll-max-microamp = <9440>; - - vddp-ref-clk-supply = <&pm8994_l25>; - vddp-ref-clk-max-microamp = <100>; - vddp-ref-clk-always-on; - clock-names = "ref_clk_src", "ref_clk"; clocks = <&rpmcc RPM_SMD_LN_BB_CLK>, <&gcc GCC_UFS_CLKREF_CLK>; @@ -1341,20 +1352,12 @@ ufshc: ufshc@624000 { compatible = "qcom,ufshc"; - reg = <0x624000 0x2500>; + reg = <0x00624000 0x2500>; interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; phys = <&ufsphy>; phy-names = "ufsphy"; - vcc-supply = <&pm8994_l20>; - vccq-supply = <&pm8994_l25>; - vccq2-supply = <&pm8994_s4>; - - vcc-max-microamp = <600000>; - vccq-max-microamp = <450000>; - vccq2-max-microamp = <450000>; - power-domains = <&gcc UFS_GDSC>; clock-names = @@ -1408,7 +1411,7 @@ #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; - reg = <0x8c0000 0x40000>; + reg = <0x008c0000 0x40000>; assigned-clocks = <&mmcc MMPLL9_PLL>, <&mmcc MMPLL1_PLL>, <&mmcc MMPLL3_PLL>, @@ -1423,7 +1426,7 @@ qfprom@74000 { compatible = "qcom,qfprom"; - reg = <0x74000 0x8ff>; + reg = <0x00074000 0x8ff>; #address-cells = <1>; #size-cells = <1>; @@ -1443,9 +1446,9 @@ }; }; - phy@34000 { + pcie_phy: phy@34000 { compatible = "qcom,msm8996-qmp-pcie-phy"; - reg = <0x34000 0x488>; + reg = <0x00034000 0x488>; #clock-cells = <1>; #address-cells = <1>; #size-cells = <1>; @@ -1456,9 +1459,6 @@ <&gcc GCC_PCIE_CLKREF_CLK>; clock-names = "aux", "cfg_ahb", "ref"; - vdda-phy-supply = <&pm8994_l28>; - vdda-pll-supply = <&pm8994_l12>; - resets = <&gcc GCC_PCIE_PHY_BCR>, <&gcc GCC_PCIE_PHY_COM_BCR>, <&gcc GCC_PCIE_PHY_COM_NOCSR_BCR>; @@ -1466,9 +1466,9 @@ status = "disabled"; pciephy_0: lane@35000 { - reg = <0x035000 0x130>, - <0x035200 0x200>, - <0x035400 0x1dc>; + reg = <0x00035000 0x130>, + <0x00035200 0x200>, + <0x00035400 0x1dc>; #phy-cells = <0>; clock-output-names = "pcie_0_pipe_clk_src"; @@ -1479,9 +1479,9 @@ }; pciephy_1: lane@36000 { - reg = <0x036000 0x130>, - <0x036200 0x200>, - <0x036400 0x1dc>; + reg = <0x00036000 0x130>, + <0x00036200 0x200>, + <0x00036400 0x1dc>; #phy-cells = <0>; clock-output-names = "pcie_1_pipe_clk_src"; @@ -1492,9 +1492,9 @@ }; pciephy_2: lane@37000 { - reg = <0x037000 0x130>, - <0x037200 0x200>, - <0x037400 0x1dc>; + reg = <0x00037000 0x130>, + <0x00037200 0x200>, + <0x00037400 0x1dc>; #phy-cells = <0>; clock-output-names = "pcie_2_pipe_clk_src"; @@ -1505,9 +1505,9 @@ }; }; - phy@7410000 { + usb3phy: phy@7410000 { compatible = "qcom,msm8996-qmp-usb3-phy"; - reg = <0x7410000 0x1c4>; + reg = <0x07410000 0x1c4>; #clock-cells = <1>; #address-cells = <1>; #size-cells = <1>; @@ -1518,18 +1518,15 @@ <&gcc GCC_USB3_CLKREF_CLK>; clock-names = "aux", "cfg_ahb", "ref"; - vdda-phy-supply = <&pm8994_l28>; - vdda-pll-supply = <&pm8994_l12>; - resets = <&gcc GCC_USB3_PHY_BCR>, <&gcc GCC_USB3PHY_PHY_BCR>; reset-names = "phy", "common"; status = "disabled"; ssusb_phy_0: lane@7410200 { - reg = <0x7410200 0x200>, - <0x7410400 0x130>, - <0x7410600 0x1a8>; + reg = <0x07410200 0x200>, + <0x07410400 0x130>, + <0x07410600 0x1a8>; #phy-cells = <0>; clock-output-names = "usb3_phy_pipe_clk_src"; @@ -1540,16 +1537,13 @@ hsusb_phy1: phy@7411000 { compatible = "qcom,msm8996-qusb2-phy"; - reg = <0x7411000 0x180>; + reg = <0x07411000 0x180>; #phy-cells = <0>; clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, <&gcc GCC_RX1_USB2_CLKREF_CLK>; clock-names = "cfg_ahb", "ref"; - vdda-pll-supply = <&pm8994_l12>; - vdda-phy-dpdm-supply = <&pm8994_l24>; - resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; nvmem-cells = <&qusb2p_hstx_trim>; status = "disabled"; @@ -1557,16 +1551,13 @@ hsusb_phy2: phy@7412000 { compatible = "qcom,msm8996-qusb2-phy"; - reg = <0x7412000 0x180>; + reg = <0x07412000 0x180>; #phy-cells = <0>; clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, <&gcc GCC_RX2_USB2_CLKREF_CLK>; clock-names = "cfg_ahb", "ref"; - vdda-pll-supply = <&pm8994_l12>; - vdda-phy-dpdm-supply = <&pm8994_l24>; - resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; nvmem-cells = <&qusb2s_hstx_trim>; status = "disabled"; @@ -1574,7 +1565,7 @@ usb2: usb@76f8800 { compatible = "qcom,msm8996-dwc3", "qcom,dwc3"; - reg = <0x76f8800 0x400>; + reg = <0x076f8800 0x400>; #address-cells = <1>; #size-cells = <1>; ranges; @@ -1594,7 +1585,7 @@ dwc3@7600000 { compatible = "snps,dwc3"; - reg = <0x7600000 0xcc00>; + reg = <0x07600000 0xcc00>; interrupts = <0 138 IRQ_TYPE_LEVEL_HIGH>; phys = <&hsusb_phy2>; phy-names = "usb2-phy"; @@ -1605,7 +1596,7 @@ usb3: usb@6af8800 { compatible = "qcom,msm8996-dwc3", "qcom,dwc3"; - reg = <0x6af8800 0x400>; + reg = <0x06af8800 0x400>; #address-cells = <1>; #size-cells = <1>; ranges; @@ -1626,7 +1617,7 @@ dwc3@6a00000 { compatible = "snps,dwc3"; - reg = <0x6a00000 0xcc00>; + reg = <0x06a00000 0xcc00>; interrupts = <0 131 IRQ_TYPE_LEVEL_HIGH>; phys = <&hsusb_phy1>, <&ssusb_phy_0>; phy-names = "usb2-phy", "usb3-phy"; @@ -1637,7 +1628,7 @@ vfe_smmu: iommu@da0000 { compatible = "qcom,msm8996-smmu-v2", "qcom,smmu-v2"; - reg = <0xda0000 0x10000>; + reg = <0x00da0000 0x10000>; #global-interrupts = <1>; interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>, @@ -1653,20 +1644,20 @@ camss: camss@a00000 { compatible = "qcom,msm8996-camss"; - reg = <0xa34000 0x1000>, - <0xa00030 0x4>, - <0xa35000 0x1000>, - <0xa00038 0x4>, - <0xa36000 0x1000>, - <0xa00040 0x4>, - <0xa30000 0x100>, - <0xa30400 0x100>, - <0xa30800 0x100>, - <0xa30c00 0x100>, - <0xa31000 0x500>, - <0xa00020 0x10>, - <0xa10000 0x1000>, - <0xa14000 0x1000>; + reg = <0x00a34000 0x1000>, + <0x00a00030 0x4>, + <0x00a35000 0x1000>, + <0x00a00038 0x4>, + <0x00a36000 0x1000>, + <0x00a00040 0x4>, + <0x00a30000 0x100>, + <0x00a30400 0x100>, + <0x00a30800 0x100>, + <0x00a30c00 0x100>, + <0x00a31000 0x500>, + <0x00a00020 0x10>, + <0x00a10000 0x1000>, + <0x00a14000 0x1000>; reg-names = "csiphy0", "csiphy0_clk_mux", "csiphy1", @@ -1774,7 +1765,6 @@ "vfe1_stream", "vfe_ahb", "vfe_axi"; - vdda-supply = <&pm8994_l2>; iommus = <&vfe_smmu 0>, <&vfe_smmu 1>, <&vfe_smmu 2>, @@ -1788,7 +1778,7 @@ adreno_smmu: iommu@b40000 { compatible = "qcom,msm8996-smmu-v2", "qcom,smmu-v2"; - reg = <0xb40000 0x10000>; + reg = <0x00b40000 0x10000>; #global-interrupts = <1>; interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, @@ -1805,7 +1795,7 @@ mdp_smmu: iommu@d00000 { compatible = "qcom,msm8996-smmu-v2", "qcom,smmu-v2"; - reg = <0xd00000 0x10000>; + reg = <0x00d00000 0x10000>; #global-interrupts = <1>; interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, @@ -1821,7 +1811,7 @@ lpass_q6_smmu: iommu@1600000 { compatible = "qcom,msm8996-smmu-v2", "qcom,smmu-v2"; - reg = <0x1600000 0x20000>; + reg = <0x01600000 0x20000>; #iommu-cells = <1>; power-domains = <&gcc HLOS1_VOTE_LPASS_CORE_GDSC>; @@ -1886,9 +1876,6 @@ pinctrl-0 = <&pcie0_clkreq_default &pcie0_perst_default &pcie0_wake_default>; pinctrl-1 = <&pcie0_clkreq_sleep &pcie0_perst_default &pcie0_wake_sleep>; - - vdda-supply = <&pm8994_l28>; - linux,pci-domain = <0>; clocks = <&gcc GCC_PCIE_0_PIPE_CLK>, @@ -1941,8 +1928,6 @@ pinctrl-0 = <&pcie1_clkreq_default &pcie1_perst_default &pcie1_wake_default>; pinctrl-1 = <&pcie1_clkreq_sleep &pcie1_perst_default &pcie1_wake_sleep>; - - vdda-supply = <&pm8994_l28>; linux,pci-domain = <1>; clocks = <&gcc GCC_PCIE_1_PIPE_CLK>, @@ -1994,8 +1979,6 @@ pinctrl-0 = <&pcie2_clkreq_default &pcie2_perst_default &pcie2_wake_default>; pinctrl-1 = <&pcie2_clkreq_sleep &pcie2_perst_default &pcie2_wake_sleep >; - vdda-supply = <&pm8994_l28>; - linux,pci-domain = <2>; clocks = <&gcc GCC_PCIE_2_PIPE_CLK>, <&gcc GCC_PCIE_2_AUX_CLK>, @@ -2015,7 +1998,7 @@ { compatible = "qcom,bam-v1.7.0"; qcom,controlled-remotely; - reg = <0x9184000 0x32000>; + reg = <0x09184000 0x32000>; num-channels = <31>; interrupts = <0 164 IRQ_TYPE_LEVEL_HIGH>; #dma-cells = <1>; @@ -2025,7 +2008,7 @@ slim_msm: slim@91c0000 { compatible = "qcom,slim-ngd-v1.5.0"; - reg = <0x91c0000 0x2C000>; + reg = <0x091c0000 0x2C000>; reg-names = "ctrl"; interrupts = <0 163 IRQ_TYPE_LEVEL_HIGH>; dmas = <&slimbam 3>, <&slimbam 4>, @@ -2060,12 +2043,6 @@ slim-ifc-dev = <&tasha_ifd>; - vdd-buck-supply = <&pm8994_s4>; - vdd-buck-sido-supply = <&pm8994_s4>; - vdd-tx-supply = <&pm8994_s4>; - vdd-rx-supply = <&pm8994_s4>; - vdd-io-supply = <&pm8994_s4>; - #sound-dai-cells = <1>; }; }; @@ -2075,7 +2052,7 @@ compatible = "qcom,adreno-530.2", "qcom,adreno"; #stream-id-cells = <16>; - reg = <0xb00000 0x3f000>; + reg = <0x00b00000 0x3f000>; reg-names = "kgsl_3d0_reg_memory"; interrupts = <0 300 IRQ_TYPE_LEVEL_HIGH>; @@ -2146,9 +2123,9 @@ mdss: mdss@900000 { compatible = "qcom,mdss"; - reg = <0x900000 0x1000>, - <0x9b0000 0x1040>, - <0x9b8000 0x1040>; + reg = <0x00900000 0x1000>, + <0x009b0000 0x1040>, + <0x009b8000 0x1040>; reg-names = "mdss_phys", "vbif_phys", "vbif_nrt_phys"; @@ -2168,7 +2145,7 @@ mdp: mdp@901000 { compatible = "qcom,mdp5"; - reg = <0x901000 0x90000>; + reg = <0x00901000 0x90000>; reg-names = "mdp_phys"; interrupt-parent = <&mdss>; @@ -2244,12 +2221,12 @@ hdmi_phy: hdmi-phy@9a0600 { #phy-cells = <0>; compatible = "qcom,hdmi-phy-8996"; - reg = <0x9a0600 0x1c4>, - <0x9a0a00 0x124>, - <0x9a0c00 0x124>, - <0x9a0e00 0x124>, - <0x9a1000 0x124>, - <0x9a1200 0x0c8>; + reg = <0x009a0600 0x1c4>, + <0x009a0a00 0x124>, + <0x009a0c00 0x124>, + <0x009a0e00 0x124>, + <0x009a1000 0x124>, + <0x009a1200 0x0c8>; reg-names = "hdmi_pll", "hdmi_tx_l0", "hdmi_tx_l1", |