diff options
Diffstat (limited to 'arch/arm/boot/dts/zynq-zc706.dts')
-rw-r--r-- | arch/arm/boot/dts/zynq-zc706.dts | 54 |
1 files changed, 50 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/zynq-zc706.dts b/arch/arm/boot/dts/zynq-zc706.dts index 77943c16d33f..1a1b03a4223d 100644 --- a/arch/arm/boot/dts/zynq-zc706.dts +++ b/arch/arm/boot/dts/zynq-zc706.dts @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2011 - 2014 Xilinx + * Copyright (C) 2011 - 2015 Xilinx * Copyright (C) 2012 National Instruments Corp. */ /dts-v1/; @@ -14,6 +14,7 @@ ethernet0 = &gem0; i2c0 = &i2c0; serial0 = &uart1; + spi0 = &qspi; mmc0 = &sdhci0; }; @@ -27,9 +28,12 @@ stdout-path = "serial0:115200n8"; }; - usb_phy0: phy0 { - compatible = "usb-nop-xceiv"; + usb_phy0: phy0@e0002000 { + compatible = "ulpi-phy"; #phy-cells = <0>; + reg = <0xe0002000 0x1000>; + view-port = <0x0170>; + drv-vbus; }; }; @@ -303,13 +307,51 @@ }; }; +&qspi { + u-boot,dm-pre-reloc; + status = "okay"; + is-dual = <1>; + num-cs = <1>; + flash@0 { + compatible = "n25q128a11"; + reg = <0x0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + spi-max-frequency = <50000000>; + #address-cells = <1>; + #size-cells = <1>; + partition@qspi-fsbl-uboot { + label = "qspi-fsbl-uboot"; + reg = <0x0 0x100000>; + }; + partition@qspi-linux { + label = "qspi-linux"; + reg = <0x100000 0x500000>; + }; + partition@qspi-device-tree { + label = "qspi-device-tree"; + reg = <0x600000 0x20000>; + }; + partition@qspi-rootfs { + label = "qspi-rootfs"; + reg = <0x620000 0x5E0000>; + }; + partition@qspi-bitstream { + label = "qspi-bitstream"; + reg = <0xC00000 0x400000>; + }; + }; +}; + &sdhci0 { + u-boot,dm-pre-reloc; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sdhci0_default>; }; &uart1 { + u-boot,dm-pre-reloc; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1_default>; @@ -322,3 +364,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb0_default>; }; + +&watchdog0 { + reset-on-timeout; +}; |