aboutsummaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/fpga/xlnx,zynq-afi-fpga.txt
diff options
context:
space:
mode:
Diffstat (limited to 'Documentation/devicetree/bindings/fpga/xlnx,zynq-afi-fpga.txt')
-rw-r--r--Documentation/devicetree/bindings/fpga/xlnx,zynq-afi-fpga.txt19
1 files changed, 19 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/fpga/xlnx,zynq-afi-fpga.txt b/Documentation/devicetree/bindings/fpga/xlnx,zynq-afi-fpga.txt
new file mode 100644
index 000000000000..e00942cf3091
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/xlnx,zynq-afi-fpga.txt
@@ -0,0 +1,19 @@
+Xilinx Zynq AFI interface Manager
+
+The Zynq Processing System core provides access from PL masters to PS
+internal peripherals, and memory through AXI FIFO interface
+(AFI) interfaces.
+
+Required properties:
+-compatible: Should contain "xlnx,zynq-afi-fpga"
+-reg: Physical base address and size of the controller's register area.
+-xlnx,afi-buswidth : Size of the afi bus width.
+ 0: 64-bit AXI data width,
+ 1: 32-bit AXI data width,
+
+Example:
+afi0: afi0 {
+ compatible = "xlnx,zynq-afi-fpga";
+ reg = <0xf8008000 0x1000>;
+ xlnx,afi-buswidth = <1>;
+};