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2022-01-24arm64: zynqmp: Rename dma to dma-controllerMichael Tretter
The ZynqMP dma engines are actually dma-controllers as specified by the device tree binding. Rename the device tree nodes accordingly. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Link: https://lore.kernel.org/r/20220112151541.1328732-4-m.tretter@pengutronix.de Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-01-24arm64: zynqmp: Add missing #dma-cells propertyMichael Tretter
Requesting the dma controllers fails if #dma-cells is not defined. Add the missing property. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Link: https://lore.kernel.org/r/20220112151541.1328732-3-m.tretter@pengutronix.de Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-01-24arm64: xilinx: dts: drop legacy property #stream-id-cellsDavid Heidelberg
Property #stream-id-cells is legacy leftover and isn't currently documented nor used. Signed-off-by: David Heidelberg <david@ixit.cz> Link: https://lore.kernel.org/r/20211208184846.101166-1-david@ixit.cz Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-09-29arm64: zynqmp: Add support for Xilinx Kria SOM boardMichal Simek
There are couple of revisions of SOMs (k26) and associated carrier cards (kv260). SOM itself has two major versions: sm-k26 - SOM with EMMC smk-k26 - SOM without EMMC used on starter kit with preprogrammed firmware in QSPI. SOMs are describing only devices available on the SOM or connections which are described in specification (for example UART, fwuen). When SOM boots out of QSPI it uses limited number of peripherals defined by the specification and present in sm(k)-k26 dtses. Then a carrier card (CC) detection is happening and DT overlay is applied to brings new functionality. That's why DT overlays are used. The name is composed together with SOM name and CC name that's why DT overlays with these names are generated to make sure they can be used together. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1ba32590670434b650bacf6410a65579dd30b38b.1632294439.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Wire psgtr for zc1751-xm013Michal Simek
Add psgtr description for SATA and USB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/8c78625f08c16385a4798e0a62d20df7491ac00e.1628244860.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Enable xlnx,zynqmp-dwc3 driver for xilinx boardsMichal Simek
The commit 84770f028fab ("usb: dwc3: Add driver for Xilinx platforms") finally add proper support for Xilinx dwc3 driver. This patch is adding DT description for it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Michael Tretter <m.tretter@pengutronix.de> Link: https://lore.kernel.org/r/640a3bc0dc3e32560d3e84c2f78b5ae561396eb0.1628244703.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Enable gpio and qspi for zc1275-revAMichal Simek
Add missing gpio and qspio for zc1275-revA board. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/839d833133318feeb2755c4431204b0ef4788cce.1628244299.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Fix serial compatible stringMichal Simek
Based on commit 65a2c14d4f00 ("dt-bindings: serial: convert Cadence UART bindings to YAML") compatible string should look like differently that's why fix it to be aligned with dt binding. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/89b36e0a6187cc6b05b27a035efdf79173bd4486.1628240307.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Remove not documented is-dual propertyMichal Simek
Remove is-dual not documented property and also update comment about QSPI sizes to reflect dual configuration as 16MB + 16MB. Only single configuration is supported now. Reported-by: Quanyang Wang <quanyang.wang@windriver.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/876c53b92f99623bae45d5c0c5ae79ee3e24f745.1628239345.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Add psgtr description to zc1751 dc1 boardMichal Simek
Wire psgtr for zc1751 dc1 board. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/51d9a5e0aa26b0ea79b8823bf3d15f4e2542f927.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Add support for zcu102-rev1.1 boardMichal Simek
zcu102 rev1.1 compare to rev1.0 is using by default different DDR memory which requires different configuration. The reason for adding this file to Linux kernel is that U-Boot fdtfile variable is composed based on board revision (in eeprom) and dtb file should exist in standard distibutions for passing it to Linux kernel. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/38bbbeb885f4d9ba466c43ab9b4d25190a3552fb.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Remove description for 8T49N287 and si5382 chipsMichal Simek
Based on commit 73d677e9f379 ("arm64: dts: zynqmp: Remove si5328 device nodes") also remove description for clock chips which don't have Linux driver yet. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/7557288230567fa136ba3edc004d5bfe4f4c6590.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Sync psgtr node location with zcu104-revAMichal Simek
zcu104-revA has node below pinctrl which is not the same on revC. Sync location for easier comparison. Also zc1751-dc1 is not using this position. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/4b691bab5ba83b5352d4669bd54bcdb8273b2156.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Add reset description for sataMichal Simek
Sata needs to get reset before configuration that's why add property for it there. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/b7f61daa2fe1a2300767af73c46b8082088f741a.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Move rtc to different location on zcu104-revAMichal Simek
Move it the same location as is on zcu104-revC for easier comparison. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/fe6c3f96fbd359409b7fef85d2c2ada584b3d0cc.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Wire qspi on multiple boardsMichal Simek
Couple of boards have qspi on the board that's why enable controller and describe them. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/01a69ee6590245b5bee70a2553f6faac0d31ca76.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Remove information about dma clock on zcu106Michal Simek
Clock setting is not static anymore that's why it depends on firmware setup that's why remove this comment. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/17973ffda4e163a4b89d4732fe6fc7e089962ae7.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Update rtc calibration valueSrinivas Neeli
As per the design specification "The 16-bit Seconds Calibration Value represents the number of Oscillator Ticks that are required to measure the largest time period that is less than or equal to 1 second. For an oscillator that is 32.768 KHz, this value will be 0x7FFF." Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/0d36d9fe999ff82f10d42ab5fc0d1e907c26ac34.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Add note about UHS mode on some boardsMichal Simek
Add note about UHS mode and add no-1-8-v property to zc1751-dc1 board. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/462b95844e7aedb00768035913265d7af90c3b2f.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Move DP nodes to the end of file on zcu106Michal Simek
This location is used by others DTs files that's why this move. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/d14404afd846f975a421023e9e9b6ad18585719f.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Remove can aliases from zc1751Michal Simek
Networking subsystem is not using aliases that's why remove them for can devices. There is also no any other Xilinx ZynqMP DT file with them. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/475a60fc4d01ba9c61579801fb84620b6905dcad.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Add reset-on-timeout to all boards and modify default timeout ↵Mounika Grace Akula
value This patch adds reset-on-timeout to FPD WDT which will trigger an interrupt to PMU when watchdog expiry happens and PMU takes the necessary action. If this property is not enabled, reason will not be known when watchdog expiry happens. This patch also modifies the default timeout to 60 seconds. Reason is that if u-boot enables WDT, it will set the timeout to 10 seconds and this is not enough to boot till Linux and start the WDT application in Linux. 60 seconds is the maximum safest value to boot till Linux and start the WDT application. Users need to change this timeout value to fit their needs. Signed-off-by: Mounika Grace Akula <mounika.grace.akula@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/5848a81447921240fddfe2f5749ae0746fcbbdbd.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: List reset property for ethernet phyMichal Simek
Add information about reset gpio for ethernet phy in case someone wants to use it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/e153f0cda37a2a6ea1c6e11fb0a4af1d400f29e2.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Add nvmem alises for eepromsMichal Simek
Use nvmem alias to point to eeprom memory which contains information about board. The change is done based on discussion in the link below. Link: https://lore.kernel.org/r/CAL_JsqLMDqpkyg-Q7mUfw-XH67-v068Q6e9wTq2UOoN=0-_coQ@mail.gmail.com Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/9b860b47ec3ca64340b4d29317e92b667236d7d1.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Move clock node to zynqmp-clk-ccf.dtsiMichal Simek
Using clock firmware driver is not the only one option how to configure clock. In past fixed clocks were also used and that configuration is still valid that's why move clock firmware node to the same file where zynqmp_clk references are used. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/48bfd8cf0de4d10b9c4d745218595f28954f70d5.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Remove additional newlineMichal Simek
This is sync between Linux and U-Boot. Trivial change. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/16f6f41c8d748d3c7cd4f49b2839e63a5b41c944.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Enable nand driver for dc2 and dc3Michal Simek
Add description for nand devices on zc1751 dc2 and dc3 boards. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/e103821bdb717132559e780f1a4f4f6fefc95688.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Wire DP and DPDMA for dc1/dc4Michal Simek
Enable Display Port and Display Port DMA for zc1751 dc1 and dc4. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/dbbd212bcc587e835d6df2f91622f5baa124bff5.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Add missing mio-bank properties to dc1 and dc5Michal Simek
Add missing mio-bank properties to zc1751 dc1 and dc5 boards. The same change was done by commit 63481699d6e3 ("arm64: dts: zynqmp: Add missing mio-bank properties to sdhcis"). Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/2b2ab31639c706651dfd319f5b6bc59e68f111b6.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Add missing SMID for pcie to zynqmp.dtsiStefano Stabellini
The SMMU is disabled in device tree so this change has no impact. The benefit is that this way it is in sync with xen.dtsi. Xen enables the SMMU and makes use of it. Signed-off-by: Stefano Stabellini <stefano.stabellini@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/43f21f5033f7806fba049474bced6131c8cb98ba.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Disable WP on zcu111Michal Simek
On this board there is SD slot without WP connected. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/88e41d4f5c6a7353762bd5ad38b92ce352c3a123.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Add phy description for usb3.0Michal Simek
usb3.0 requires serdes setting that's why also wire it up. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/cd856e5f87bc967373691d04e79de3d0022ef424.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Correct psgtr description for zcu100-revCMichal Simek
Enable psgtr node and also fix clock names to be aligned with other zynqmp boards. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/bd35fdaac08208578b2bb5059ba2c59bb4e66dac.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Wire psgtr for zc1751-xm015Michal Simek
Add psgtr description for SATA and USB. Display Port could be also added but it wasn't tested yet. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/3fb11fdb9ade828fa174379515e45ba02bc17247.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Correct zcu111 psgtr descriptionMichal Simek
DP and SATA psgtrs are swapped. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/d47cbf374423cb71bb4be5e45e3d834da0c4673a.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Add pinctrl description for all boardsMichal Simek
The commit 1dccb5ec0123 ("dt-bindings: pinctrl: Add binding for ZynqMP pinctrl driver") and commit 8b242ca700f8 ("pinctrl: Add Xilinx ZynqMP pinctrl driver support") add support for Xilinx ZynqMP pinctrl driver that's why describe pins configuration for current boards. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/d8bc42600da85f5a23d977d4b61e6528720573e5.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Fix irps5401 device nodesMichal Simek
- Add compatible string for irps5401 chip. - Do not use irps54012 as device node which is not correct. - Fix addresses of irps5401/u180 on zcu104 revisions. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/10bf5f9e7a18579626fb1850e3a8a7476ba6f2ed.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Enable fpd_dma for zcu104 platformsMichal Simek
Enable fpd_dma for this board. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/76d330bf2b2414efa2e98965a3ca7f7c43e3645f.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Do not duplicate flash partition label propertyAmit Kumar Mahapatra
In kernel 5.4, support has been added for reading MTD devices via the nvmem API. For this the mtd devices are registered as read-only NVMEM providers under sysfs with the same name as the flash partition label property. So if flash partition label property of multiple flash devices are identical then the second mtd device fails to get registered as a NVMEM provider. This patch fixes the issue by having different label property for different flashes. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/6c4b9b9232b93d9e316a63c086540fd5bf6b8687.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Disable CCI by defaultMichal Simek
There is no reason to have CCI no enabled by default. Enable it when your system configuration requires it. In Xilinx configuration flow this is work for Device Tree Generator which reads information from HW Design configuration. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/f507d45fbaa0bd31f641e758efa40a2532466ced.1623684253.git.michal.simek@xilinx.com
2021-03-08arm64: dts: zynqmp: Remove si5328 device nodesQuanyang Wang
The function of_i2c_get_board_info will call of_modalias_node to check if a device_node contains "compatible" string. But for the device si5328 at zcu102/zcu106 boards, there is no proper DT bindings for them. So remove si5328 device nodes from dts files to eliminate the error info in the boot message: i2c i2c-10: of_i2c: modalias failure on /axi/i2c@ff030000/i2c-mux@74/i2c@4/clock-generator@69 i2c i2c-10: Failed to create I2C device for /axi/i2c@ff030000/i2c-mux@74/i2c@4/clock-generator@69 Signed-off-by: Quanyang Wang <quanyang.wang@windriver.com> Link: https://lore.kernel.org/r/20210308115437.2232847-1-quanyang.wang@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-03-08arm64: dts: zynqmp: Add power domain for the DisplayPort DMA controllerLaurent Pinchart
The DisplayPort DMA controller (DPDMA) is located in the same power domain as the DisplayPort Subsystem (DPSUB). Specify the power domain in the device tree. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/20210306230915.14979-1-laurent.pinchart@ideasonboard.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-01arm64: dts: zynqmp: Wire up the DisplayPort subsystemLaurent Pinchart
Enable the dpsub device and wire it up to the PS-GTR PHY lanes routed to the DisplayPort connector. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/9769d4d103b6eb75e3324825117f6832a746004e.1611232558.git.michal.simek@xilinx.com
2021-02-01arm64: dts: zynqmp: Add DisplayPort subsystemMichal Simek
Add a DT node for the DisplayPort subsystem, a hard IP present in the Zynq Ultrascale+ MPSoC. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/4d978aef852cacdfb35aa8e50d648a787e73b90c.1611232558.git.michal.simek@xilinx.com
2021-02-01arm64: dts: zynqmp: Add DPDMA nodeLaurent Pinchart
Add a DT node for the DisplayPort DMA engine (DPDMA). Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/3d11015512a085592f2aca76eeddc04178d38bbe.1611232558.git.michal.simek@xilinx.com
2021-02-01arm64: dts: zynqmp: Add description for zcu104 revCMichal Simek
Xilinx ZynqMP zcu104 revC and newer board revisions have different i2c structure compare to revA. The rest of the board is the same from software perspective. Also enable DMAs and QSPI. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/17f68c235ea1ce96c3293ca0cf3178951d6663f7.1611224800.git.michal.simek@xilinx.com
2021-02-01arm64: dts: zynqmp: Add missing iommu IDsMichal Simek
Add missing iommu IDs to all IPs which have IDs assigned. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/78afdafdc60c3182318894f2808f7f337a798278.1611224800.git.michal.simek@xilinx.com
2021-02-01arm64: dts: zynqmp: Add missing lpd watchdog nodeMichal Simek
Xilinx ZynqMP SoC has FPD (Full Power Domain) and LPD (Low Power Domain) watchdogs. There are cases where also LPD WDT should be used by Arm cores that's why list it with disabled status. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/0489a1d5528614f1d570ea153d38b813f0c1eb9f.1611224800.git.michal.simek@xilinx.com
2021-02-01arm64: dts: zynqmp: Wire zynqmp qspi controllerMichal Simek
Add missing ZynqMP qspi IP. It works in single mode only. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/5cebbc59a452f282c4ce0f0e1dffecadac8f126a.1611224800.git.michal.simek@xilinx.com
2021-02-01arm64: dts: zynqmp: Wire arasan nand controllerMichal Simek
Add missing arasan controller with clocks. Disable it by default. Every board can enable it with specifying others properties. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/05cc1ce7973ac5200aeca428c137b422c827c5e8.1611224800.git.michal.simek@xilinx.com
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-06-27 14:15:45 +0000