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When multiple drivers access the GPIO registers concurrently, it
may result in unpredictable system behaviour, that is, write
instructions may be dropped. As to fix this issue, add global
lock for all reads and writes to serialize GPIO accessing.
Referring to Errata: VLI63, VLT61
Errata Web-link:
https://cdiext.intel.com/cdi/edesign-infodesk/EDCDownloader.aspx?id=539130
Version 2:
- This is a forward ported version of the patch from vlv_1.0.1_dev:
4b900f5 gpio-byt: Serialize GPIO registers access with global spinlock
- Removed remaining instances of vg->lock
Signed-off-by: Tan, Jui Nee <jui.nee.tan@intel.com>
Signed-off-by: Petallo, MauriceX R <mauricex.r.petallo@intel.com>
Change-Id: Ibf8f11bf292168021f9d2ef7c166e011749cd2ff
Reviewed-on: https://git-gar-1.devtools.intel.com/gerrit/4837
Reviewed-by: Wan Mohamad, Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
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Remove support for 192kHz feature from Baytrail audio - IA path.
Signed-off-by: Joshua Tan <joshua.chu.yeaw.tan@intel.com>
Change-Id: If9866ad2fdee1bb3ba82de6b0236dda165fd01d4
Reviewed-on: https://git-gar-1.devtools.intel.com/gerrit/4688
Reviewed-by: Sia, Jee Heng <jee.heng.sia@intel.com>
Tested-by: Sia, Jee Heng <jee.heng.sia@intel.com>
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There are cases when the serial8250 interrupt routine is being called
but there are really no data to process (IIR bit 3:0 is 0x1, UART_IIR_NO_INT).
The good thing is, the routine just ignores it and returns back
immediately.
There are also cases when the routine handles only rx-related interrupts.
When FIFO is enabled and THRE is disabled, LSR_THRE (LSR bit 5) will
indicate that TX FIFO is empty which is correct since the port, in this
case, is configured only for receiving. But, in the driver code, this will
cause the function serial8250_handle_irq() to call serial8250_tx_chars()
which only ends up returning from:
if (uart_circ_empty(xmit))
{
__stop_tx(up); return;
}
serial8250_handle_irq() returns 1 and the serial8250_interrupt() will then
continue executing the do-while loop which keeps on trying and trying to
process data even when there's actually nothing to transfer. This will
result to serial8250 driver saying:
"serial8250: too much work for irq..."
This patch will allow serial8250_handle_irq() to return 1 only when there's
actually some data that was processed. Otherwise, the routine ignores it just
like how UART_IIR_NO_INT is being handled. Also, we add an extra check before
calling serial8250_tx_chars() inside serial8250_handle_irq() to see
whether there are data to be transmitted and the tx is not stopped.
Signed-off-by: Maurice Petallo <mauricex.r.petallo@intel.com>
Change-Id: I75112a3e3c6f52133b7e201234186a2204142fb1
Reviewed-on: https://git-gar-1.devtools.intel.com/gerrit/4691
Reviewed-by: Wan Mohamad, Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
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commit "a15636e dmaengine: dw: move clock operations to platform.c"
already removes clock operations in Baytrail DMA PCI Mode as the
clock is provided only in ACPI / non-PCI cases. Thus, there is no need
for registering a clock for device 0x0F06's use.
Signed-off-by: Maurice Petallo <mauricex.r.petallo@intel.com>
Change-Id: I1b33e98f487b3d396fab34a7cf4481988a6d36fb
Reviewed-on: https://git-gar-1.devtools.intel.com/gerrit/4365
Reviewed-by: Wan Mohamad, Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
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On BayTrail platform DMA is not functional in the PCI mode, whereby it always
failed and exit at the point when it tries to get a clock. It causes the PCI
mode probe to exit with the error message:
dw_dmac_pci: probe of 0000:00:1e.0 failed with error -2
This patch moves clock operations to where it belongs to. Thus, the clock is
provided only in ACPI / non-PCI cases.
Reported-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
(cherry picked from commit a15636e83eb0dedefcb1221be729023e4c281748)
Conflicts:
drivers/dma/dw/core.c
- Backport to Kernel 3.10.61-ltsi. Make the patch apply but
retaining the essence of it which is to remove clk related
stuff out of core.c file.
Signed-off-by: Maurice Petallo <mauricex.r.petallo@intel.com>
Change-Id: Ia696de420231608cd820fd1e227191db71540a68
Reviewed-on: https://git-gar-1.devtools.intel.com/gerrit/4363
Reviewed-by: Wan Mohamad, Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
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Instead of exposing the possibility to set DMA registers CFG_HI and CFG_LO
strict user to provide handshake interfaces explicitly.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
(cherry picked from commit 7e1e2f27c5508518e58e5cbb11e26cbb815f4c56)
Conflicts:
arch/avr32/mach-at32ap/at32ap700x.c
- This file is not related to Baytrail
Signed-off-by: Maurice Petallo <mauricex.r.petallo@intel.com>
Change-Id: I12fce3217e13d4782ae5e179e7fb5b9c97ea5b29
Reviewed-on: https://git-gar-1.devtools.intel.com/gerrit/4361
Reviewed-by: Wan Mohamad, Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
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Baytrail SD Controller device 80860F14 card detection mechanism
relies on mmc_gpio_request_cd() in which a GPIO is used only to
wake-up from runtime suspend. But the GPIO is actually never
checked if it's a valid or not and thus causes a warning message
below. So, we add a check on gpio pin to avoid such problem.
Also, we add a device warning message that says sd card detection
setup failed for the controller.
WARNING: at drivers/gpio/gpiolib.c:126 gpio_to_desc+0x32/0x40()
invalid GPIO -19
Modules linked in:
CPU: 1 PID: 1 Comm: swapper/0 Not tainted 3.10.61-ltsi #19
Hardware name: Intel Corp. VALLEYVIEW B0 PLATFORM/NOTEBOOK, BIOS BYTICRB1.86C.0092.R32.1410021707 10/02/2014
c1c0260b c1c0260b f34c9d4c c17e7235 f34c9d74 c10325e9 c1c025fa f34c9da0
0000007e c12f0e54 c12f0e54 f374b800 f3687200 ffffffed f34c9d8c c103268b
00000009 f34c9d84 c1c025fa f34c9da0 f34c9da4 c12f0e54 c1c0260b 0000007e
Call Trace:
[<c17e7235>] dump_stack+0x16/0x18
[<c10325e9>] warn_slowpath_common+0x5e/0x75
[<c12f0e54>] ? gpio_to_desc+0x32/0x40
[<c12f0e54>] ? gpio_to_desc+0x32/0x40
[<c103268b>] warn_slowpath_fmt+0x33/0x35
[<c12f0e54>] gpio_to_desc+0x32/0x40
[<c12f0e6f>] __gpio_to_irq+0xd/0x14
[<c1587164>] mmc_gpio_request_cd+0x1c/0xcb
[<c1590014>] sdhci_acpi_probe+0x27a/0x2de
[<c13abf65>] platform_drv_probe+0x2b/0x4d
[<c13aa5ee>] really_probe+0xdc/0x297
[<c13b29fa>] ? rpm_idle+0x16f/0x185
[<c13b300b>] ? pm_runtime_barrier+0x5d/0x68
[<c13aa905>] driver_probe_device+0x72/0x8a
[<c17f4181>] ? __mutex_lock_slowpath+0x12/0x14
[<c13aa965>] __driver_attach+0x48/0x64
[<c13a907a>] bus_for_each_dev+0x42/0x63
[<c13aa20f>] driver_attach+0x1f/0x23
[<c13aa91d>] ? driver_probe_device+0x8a/0x8a
[<c13a9e11>] bus_add_driver+0xde/0x20f
[<c13aad84>] driver_register+0x7f/0xea
[<c1e3691f>] ? sdhci_driver_init+0x16/0x16
[<c13ab9fb>] platform_driver_register+0x3d/0x3f
[<c1e3692c>] sdhci_acpi_driver_init+0xd/0xf
[<c10001c4>] do_one_initcall+0x2e/0xba
[<c1df1a74>] do_basic_setup+0x8a/0xa8
[<c1df14bb>] ? do_early_param+0x74/0x74
[<c1df1b31>] kernel_init_freeable+0x9f/0x12b
[<c10564c4>] ? finish_task_switch+0x82/0xb4
[<c17cdf95>] kernel_init+0x10/0xc8
[<c17fb7f7>] ret_from_kernel_thread+0x1b/0x28
[<c17cdf85>] ? rest_init+0x79/0x79
---[ end trace 45cd186f4fe55d04 ]---
Signed-off-by: Maurice Petallo <mauricex.r.petallo@intel.com>
Change-Id: I516741896f2ca06abe97a9087aded2058bc9597d
Reviewed-on: https://git-gar-1.devtools.intel.com/gerrit/4283
Reviewed-by: Wan Mohamad, Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
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Signed-off-by: Karthikeyan Rajkumar <karthikeyanx.rajkumar@intel.com>
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Platform related default configs for Baytrail platform.
Signed-off-by: Karthikeyan Rajkumar <karthikeyanx.rajkumar@intel.com>
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sound/soc/mid-x86/byt_machine.h
ref-old-commit: 3d778b83e475eaebe0f17594a8f3cd3e7b84cbc6
Signed-off-by: venkatasubramanian pattu <venkatasubramanianx.pattu@intel.com>
Signed-off-by: Karthikeyan Rajkumar <karthikeyanx.rajkumar@intel.com>
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Dummy codec name is updated to avoid confusion with AK4614 selection.
HSD:4994943 : Confusing codec selection description in menuconfig
Signed-off By: Murasoliselvan Karunanithi <murasoliselvanx.karunanithi@intel.com>
Tested-By : Karthikeyan Rajkumar <karthikeyanx.rajkumar@intel.com>
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Re-formatted for white space removal
Signed-off-by: venkatasubramanian pattu <venkatasubramanianx.pattu@intel.com>
Change-Id: I7d3d377d80cbc4bc96585b9940e617b504c4f876
Reviewed-on: http://git-gar-1.devtools.intel.com/gerrit/1638
Reviewed-by: Mok, Tze Siong <tze.siong.mok@intel.com>
Tested-by: Karthikeyan Rajkumar <karthikeyanx.rajkumar@intel.com>
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feature. This is required to fix recording overrrun when running 192Khz mode.
White-spaces are removed and re-formatted
Signed-off-by: venkatasubramanian pattu <venkatasubramanianx.pattu@intel.com>
Tested-By: Karthikeyan Rajkumar <karthikeyanx.rajkumar@intel.com>
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1. Upon reset, set the bits for reset, reset vector and stall bits.
2. When load fw after reset, get physical memory address from mailbox. This was
previously done only in probe.
White-spaces are removed and re-formated
Signed-off-by: Joshua Tan <joshua.chu.yeaw.tan@intel.com>
Change-Id: I731f2586acf9e762b16e461304a9a19699738c39
Reviewed-on: http://git-gar-1.devtools.intel.com/gerrit/1407
Reviewed-by: Sia, Jee Heng <jee.heng.sia@intel.com>
Reviewed-by: Kweh, Hock Leong <hock.leong.kweh@intel.com>
Reviewed-by: Mok, Tze Siong <tze.siong.mok@intel.com>
Tested-by: Mok, Tze Siong <tze.siong.mok@intel.com>
(cherry picked from commit d0f24a0bacfcd3e06724f8b42c391681de94e9a7)
Signed-off-by: Ramachandran Durairaj <ramachandranx.durairaj@intel.com>
Tested-By: Karthikeyan Rajkumar <karthikeyanx.rajkumar@intel.com>
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support for IA sample machine driver. 192kHz is supported only in I2S mode
White-space HSD resolved : old commit id:
c823dee4efdb65cdb9dfa94ca8b1f38bb6f1a481
Signed-off-by: Ramachandran Durairaj <ramachandranx.durairaj@intel.com>
Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainiex.wan.mohamad@intel.com>
Tested-By: Karthikeyan Rajkumar <karthikeyanx.rajkumar@gmail.com>
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The xHCI driver currently uses a USB core internal field,
udev->lpm_capable, to indicate the xHCI driver knows how to calculate
the LPM timeout values. If this value is set for the host controller
udev, it means Link PM can be enabled for child devices under that host.
Change the code so the xHCI driver isn't mucking with USB core internal
fields. Instead, indicate the xHCI driver doesn't support Link PM on
this host by clearing the U1 and U2 exit latencies in the roothub
SuperSpeed Extended Capabilities BOS descriptor.
The code to check for the roothub setting U1 and U2 exit latencies to
zero will also disable LPM for external devices that do that same. This
was already effectively done with commit
ae8963adb4ad8c5f2a89ca1d99fb7bb721e7599f "usb: Don't enable LPM if the
exit latency is zero." Leave that code in place, so that if a device
sets one exit latency value to zero, but the other is set to a valid
value, LPM is only enabled for the U1 or U2 state that had the valid
value. This is the same behavior the code had before.
Also, change messages about missing Link PM information from warning
level to info level. Only print a warning about the first device that
doesn't support LPM, to avoid log spam. Further, cleanup some
unnecessary line breaks to help people to grep for the error messages.
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Cc: Alan Stern <stern@rowland.harvard.edu>
(cherry picked from commit 25cd2882e2fc8bd8ed7acaee0ec979f11feda6d7)
Conflicts:
drivers/usb/host/xhci-pci.c
Cherry-pick'd mainline commit bcffae7 "xhci: Prevent runtime pm
from autosuspending during initialization" added new lines that
caused conflict. That patch is cherry-pick'd to linux-stable
kernel 3.14.27 first. If this patch "25cd288" could have been
added first before "bcffae7", then we won't have conflicts.
Change-Id: Ica0efcfb4a37442f457fd66dfa01d6b01b050719
Reviewed-on: https://git-gar-1.devtools.intel.com/gerrit/4101
Tested-by: Petallo, MauriceX R <mauricex.r.petallo@intel.com>
Reviewed-by: Wan Mohamad, Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
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The code masking for TX completion interrupt was added by commit
"06d8641 ACPI / LPSS: mask the UART TX completion interrupt".
At that time, this code executes during initialization. Regression
test on power management suspend/resume reveals the need for this
bit to be masked again during controller resume. So, instead of
doing the mask during Baytrail LPSS initialization, put it in
byt_set_termios in the 8250 platform device code to make sure that
the bit is properly set even on the event of system suspend/resume.
Signed-off-by: Maurice Petallo <mauricex.r.petallo@intel.com>
Change-Id: Ie262e3a69c1a4ea582a7a7206f1c36745fe75618
Reviewed-on: https://git-gar-1.devtools.intel.com/gerrit/3950
Reviewed-by: Kweh, Hock Leong <hock.leong.kweh@intel.com>
Reviewed-by: Wan Mohamad, Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
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The code masking for TX completion interrupt was added as part of
enabling Intel Baytrail UART. At that time, this code executes
during initialization. Regression test on power management
suspend/resume reveals the need for this bit to be masked again
during controller resume. So, instead of doing the mask during
initialization, put it in byt_set_termios to make sure that the
bit is properly set even on the event of system suspend/resume.
Signed-off-by: Maurice Petallo <mauricex.r.petallo@intel.com>
Change-Id: I2518b8374b138b5bbae5d9fcdac7866591969eca
Reviewed-on: https://git-gar-1.devtools.intel.com/gerrit/3949
Reviewed-by: Kweh, Hock Leong <hock.leong.kweh@intel.com>
Reviewed-by: Wan Mohamad, Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
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Signed-off-by: Maurice Petallo <mauricex.r.petallo@intel.com>
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This commit includes BYT Fedora 18 default configurations.
v2:
- Remove byt related tizen configs.
- Synchronize configs for version 3.10.61
Signed-off-by: Ng Wei Tee <wei.tee.ng@intel.com>
Signed-off-by: Maurice Petallo <mauricex.r.petallo@intel.com>
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This is to fix the card detection failure when the
card detect status is read from the GPIO status register.
Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Signed-off-by: Maurice Petallo <mauricex.r.petallo@intel.com>
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The clock appears to be unstable when SDCARD host running with
DDR50 mode, thus causing CRC issue. This is to introduce a new
quirk to force host with broken DDR50 mode to run with SDR25
mode.
Signed-off-by: Chew, Kean Ho <kean.ho.chew@intel.com>
Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Signed-off-by: Maurice Petallo <mauricex.r.petallo@intel.com>
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There is channel resource contention between Intel MID DMA
driver and Designware DMA driver if Intel MID DMA driver is
enabled for LPE Audio usage. Since LPIO devices are tied to
fixed DMA channel numbers, so the Designware DMA controller
has to be first enumerated in order to occupy the required
channel number.
Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Signed-off-by: Maurice Petallo <mauricex.r.petallo@intel.com>
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BayTrail GPIO NORTH, SOUTH and SUS clusters use IRQ48,
49 and 50 respectively. On non-ACPI system, we need
to setup IOAPIC RTE for device that use interrupt
beyond IRQ23.
Signed-off-by: Chew, Kean Ho <kean.ho.chew@intel.com>
Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Signed-off-by: Sreeju Selvaraj <sreeju.armughanx.selvaraj@intel.com>
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This is to cater the need for non-ACPI system whereby
a platform device has to be created in order to bind
with the BYT Pinctrl GPIO platform driver.
Signed-off-by: Chew, Kean Ho <kean.ho.chew@intel.com>
Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Signed-off-by: Sreeju Selvaraj <sreeju.armughanx.selvaraj@intel.com>
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In to_irq() callback, we create the hwirq to linux irq
mapping for the requested GPIO pin. Hence, we unamp
the mapping when the gpio pin is being released.
Signed-off-by: Chew, Kean Ho <kean.ho.chew@intel.com>
Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Signed-off-by: Sreeju Selvaraj <sreeju.armughanx.selvaraj@intel.com>
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The requested gpio pin must has the func_pin_mux field set
to GPIO function by BIOS/FW in advanced. Else, the gpio pin
request would fail. This is to ensure that we do not expose
any gpio pins which shall be used for alternate functions,
for eg: wakeup pin, I/O interfaces for LPSS, etc.
Signed-off-by: Chew, Kean Ho <kean.ho.chew@intel.com>
Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Reviewed-by: Darren Hart <dvhart@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit 42bd00706ce95d74ad6ebcb8528ee1fbbb992f6a)
Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
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This commit enables the following:
- register SPI slave
- fix device name string for clkdev registration
- insert kernel module param to allow user to disable the BYT
PCI board file
Signed-off-by: Chew Chiau Ee <chiau.ee.chew@intel.com>
Signed-off-by: Maurice Petallo <mauricex.r.petallo@intel.com>
Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
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Allow CONFIG_X86_INTEL_LPSS to be set when ACPI
or PCI is set.
Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Signed-off-by: Maurice Petallo <mauricex.r.petallo@intel.com>
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There is a common storage for platform data related structures and definitions
inside kernel source tree. The patch moves file from include/linux to
include/linux/platform_data and renames it acoordingly. The users are also
updated.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
[For the arch/avr32/.* and .*sound/atmel.*]
Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
(cherry picked from commit 3d598f47e804a77208c6bb0a454123018e2f2281)
Signed-off-by: Ng Wei Tee <wei.tee.ng@intel.com>
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Even if a gpio pin is set to output, we still need to set INPUT_EN
functionality (by clearing INPUT_EN bit) to be able to read the pin's
level.
E.g. without this change, we'll always read low level state from sysfs.
Cc: <stable@vger.kernel.org> # v3.14+
Cc: Mathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: David Cohen <david.a.cohen@linux.intel.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit d90c33818967c5e5371961604ad98b4dea4fa3f4)
Signed-off-by: Ng Wei Tee <wei.tee.ng@intel.com>
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Function xhci_readl() is used to read 32bit xHC registers residing in MMIO
address space. It takes as first argument a pointer to the xhci_hcd although
it does not use it. xhci_readl() internally simply calls readl(). This creates
an illusion that xhci_readl() is an xhci specific function that has to be
called in a context where a pointer to xhci_hcd is available.
Remove the unnecessary xhci_readl() wrapper function and replace its calls to
with calls to readl() to make the code more straightforward.
Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
(cherry picked from commit b0ba9720846c980d053b1ffcd766fddfbef95d4c)
Signed-off-by: Ng Wei Tee <wei.tee.ng@intel.com>
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The function dma_set_mask() tests internally whether the dma_mask pointer
for the device is initialized and fails if the dma_mask pointer is NULL.
On pci platforms, the device dma_mask pointer is initialized, when pci
devices are enumerated, to point to the pci_dev->dma_mask which is 0xffffffff.
However, for non-pci platforms, the dma_mask pointer may not be initialized
and in that case dma_set_mask() will fail.
This patch initializes the dma_mask and the coherent_dma_mask to 32bits
in xhci_plat_probe(), before the call to usb_create_hcd() that sets the
"uses_dma" flag for the usb bus and the call to usb_add_hcd() that creates
coherent dma pools for the usb hcd.
Moreover, a call to dma_set_mask() does not set the device coherent_dma_mask.
Since the xhci-hcd driver calls dma_alloc_coherent() and dma_pool_alloc()
to allocate consistent DMA memory blocks, the coherent DMA address mask
has to be set explicitly.
This patch sets the coherent_dma_mask to 64bits in xhci_gen_setup() when
the xHC is capable for 64-bit DMA addressing.
If dma_set_mask() succeeds, for a given bitmask, it is guaranteed that
the given bitmask is also supported for consistent DMA mappings.
Other changes introduced in this patch are:
- The return value of dma_set_mask() is checked to ensure that the required
dma bitmask conforms with the host system's addressing capabilities.
- The dma_mask setup code for the non-primary hcd was removed since both
primary and non-primary hcd refer to the same generic device whose
dma_mask and coherent_dma_mask are already set during the setup of
the primary hcd.
- The code for reading the HCCPARAMS register to find out the addressing
capabilities of xHC was removed since its value is already cached in
xhci->hccparams.
- hcd->self.controller was replaced with the dev variable since it is
already available.
Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
(cherry picked from commit c10cf1189d7659ffd7dbe488a4cee7ec0dcdd9c6)
Signed-off-by: Ng Wei Tee <wei.tee.ng@intel.com>
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Add Device Tree match table to xhci-plat.c. Add DT bindings document.
Signed-off-by: Al Cooper <alcooperx@gmail.com>
Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Cc: Felipe Balbi <balbi@ti.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
(cherry picked from commit 1fe6c4524f765734d376c39d0f41e25519f6235d)
Signed-off-by: Ng Wei Tee <wei.tee.ng@intel.com>
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Adds power management support to xHCI platform driver.
This patch facilitates the transition of xHCI host controller
between S0 and S3/S4 power states, during suspend/resume cycles.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Vikas C Sajjan <vikas.sajjan@linaro.org>
CC: Doug Anderson <dianders@chromium.org>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
(cherry picked from commit 57d04eb131ec9df067028aef278867b4920177c3)
Signed-off-by: Ng Wei Tee <wei.tee.ng@intel.com>
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The RWE bit of the USB 2.0 PORTPMSC register is supposed to enable
remote wakeup for devices in the lower power link state L1. It has
nothing to do with the device suspend remote wakeup from L2. The RWE
bit is designed to be set once (when USB 2.0 LPM is enabled for the
port) and cleared only when USB 2.0 LPM is disabled for the port.
The xHCI bus suspend method was setting the RWE bit erroneously, and the
bus resume method was clearing it. The xHCI 1.0 specification with
errata up to Aug 12, 2012 says in section 4.23.5.1.1.1 "Hardware
Controlled LPM":
"While Hardware USB2 LPM is enabled, software shall not modify the
HIRDBESL or RWE fields of the USB2 PORTPMSC register..."
If we have previously enabled USB 2.0 LPM for a device, that means when
the USB 2.0 bus is resumed, we violate the xHCI specification by
clearing RWE. It also means that after a bus resume, the host would
think remote wakeup is disabled from L1 for ports with USB 2.0 Link PM
enabled, which is not what we want.
This patch should be backported to kernels as old as 3.2, that
contain the commit 65580b4321eb36f16ae8b5987bfa1bb948fc5112 "xHCI: set
USB2 hardware LPM". That was the first kernel that supported USB 2.0
Link PM.
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Cc: stable@vger.kernel.org
(cherry picked from commit f217c980ca980e3a645b7485ea5eae9a747f4945)
Signed-off-by: Ng Wei Tee <wei.tee.ng@intel.com>
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Haswell LynxPoint and LynxPoint-LP with the recent Intel BIOS show
mysterious wakeups after shutdown occasionally. After discussing with
BIOS engineers, they explained that the new BIOS expects that the
wakeup sources are cleared and set to D3 for all wakeup devices when
the system is going to sleep or power off, but the current xhci driver
doesn't do this properly (partly intentionally).
This patch introduces a new quirk, XHCI_SPURIOUS_WAKEUP, for
fixing the spurious wakeups at S5 by calling xhci_reset() in the xhci
shutdown ops as done in xhci_stop(), and setting the device to PCI D3
at shutdown and remove ops.
The PCI D3 call is based on the initial fix patch by Oliver Neukum.
[Note: Sarah changed the quirk name from XHCI_HSW_SPURIOUS_WAKEUP to
XHCI_SPURIOUS_WAKEUP, since none of the other quirks have system names
in them. Sarah also fixed a collision with a quirk submitted around the
same time, by changing the xhci->quirks bit from 17 to 18.]
This patch should be backported to kernels as old as 3.0, that
contain the commit 1c12443ab8eba71a658fae4572147e56d1f84f66 "xhci: Add
Lynx Point to list of Intel switchable hosts."
Cc: Oliver Neukum <oneukum@suse.de>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Cc: stable@vger.kernel.org
(cherry picked from commit 638298dc66ea36623dbc2757a24fc2c4ab41b016)
Signed-off-by: Ng Wei Tee <wei.tee.ng@intel.com>
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It has been reported that this chipset really cannot
sleep without this extraordinary delay.
This patch should be backported, in order to ensure this host functions
under stable kernels. The last quirk for Fresco Logic hosts (commit
bba18e33f25072ebf70fd8f7f0cdbf8cdb59a746 "xhci: Extend Fresco Logic MSI
quirk.") was backported to stable kernels as old as 2.6.36.
Signed-off-by: Oliver Neukum <oneukum@suse.de>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Cc: stable@vger.kernel.org
(cherry picked from commit 455f58925247e8a1a1941e159f3636ad6ee4c90b)
Signed-off-by: Ng Wei Tee <wei.tee.ng@intel.com>
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This patch defines a new trace event, which is called xhci_dbg_init
and belongs to the event class xhci_log_msg, and adds tracepoints that
trace the debug statements in the functions used to start and stop the
xhci-hcd driver.
Also, it removes an unnecessary cast of variable val to unsigned int
in xhci_mem_init(), since val is already declared as unsigned int.
Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
(cherry picked from commit d195fcffe4c82cc813cc43df5f27ab99ab38bc07)
Signed-off-by: Ng Wei Tee <wei.tee.ng@intel.com>
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This patch defines a new trace event, which is called xhci_dbg_cancel_urb
and belongs to the event class xhci_log_msg, and adds tracepoints that
trace the debug messages related to the removal of a cancelled URB from
the endpoint's transfer ring.
Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
(cherry picked from commit aa50b29061d3df896c494d92e9c8c2e1f295cc6e)
Signed-off-by: Ng Wei Tee <wei.tee.ng@intel.com>
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This patch creates a new event class, called xhci_log_event,
and defines the xhci_cmd_completion trace event used for
tracing the commands issued to xHC that generate a completion
event in the event ring.
This info can be used, later, to print, in a human readable
way, the completion status and flags as well as the command's
type and fields using the trace-cmd tool and the appropriate
plugin.
Also, a tracepoint is added in handle_cmd_completion().
Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
(cherry picked from commit 63a23b9a7451660525c90b08219e14e701e294f1)
Signed-off-by: Ng Wei Tee <wei.tee.ng@intel.com>
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This patch defines a new event class, called xhci_log_ctx,
that records in the ring buffer the context data, the
context type (input or output), the context dma and virtual
addresses, the context endpoint entries, the slot ID and
whether the xHC uses 64 byte context data structures.
This information can be used, later, to parse and display
the context data fields with the appropriate plugin using
the trace-cmd tool.
Also, this patch defines a trace event, called xhci_address_ctx,
to trace the contexts related to the Address Device command and
adds the associated tracepoints in xhci_address_device().
Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
(cherry picked from commit 1d27fabec068a204186c6af10e05f23911c0c902)
Signed-off-by: Ng Wei Tee <wei.tee.ng@intel.com>
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This patch defines a new trace event, which is called xhci_dbg_reset_ep
and belongs in the event class xhci_log_msg, and adds tracepoints that
trace the debug messages associated with resetting an endpoint after
the reception of a STALL packet.
Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
(cherry picked from commit a0254324eeea3b00676eeb54ba80774a46cb8afb)
Signed-off-by: Ng Wei Tee <wei.tee.ng@intel.com>
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This patch defines a new trace event, which is called xhci_dbg_quirks
and belongs in the event class xhci_log_msg, and adds tracepoints that
trace the debug messages associated with xHCs' quirks.
Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
(cherry picked from commit 4bdfe4c38fd5b06da558050a3288a0a48825a3e7)
Signed-off-by: Ng Wei Tee <wei.tee.ng@intel.com>
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This patch defines a new trace event, which is called xhci_dbg_context_change
and belongs in the event class xhci_log_msg, and adds tracepoints for tracing
the debug messages related to context updates performed with Configure Endpoint
and Evaluate Context commands.
Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
(cherry picked from commit 3a7fa5bef06e1757d1aded8d78afd041b4552e11)
Signed-off-by: Ng Wei Tee <wei.tee.ng@intel.com>
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This patch declares an event class for trace events that
trace messages with variadic arguments, called xhci_log_msg,
and defines a trace event for tracing the debug messages in
xhci_address_device() function, called xhci_dbg_address.
In order to implement this type of trace events, a wrapper function,
called xhci_dbg_trace(), was created that records the format string
and variadic arguments into a va_format structure which is passed as
argument to the tracepoints of the class xhci_log_msg.
All the xhci_dbg() calls in xhci_address_device() are replaced
with calls to xhci_dbg_trace(). The functionality of xhci_dbg()
log messages was not removed though, but it is placed inside
xhci_dbg_trace().
This trace event aims to give the ability to the user or the
developper to isolate and trace the debug messages generated
when an Address Device Command is issued to xHC.
Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
(cherry picked from commit 84a99f6fc5d4a2b7583aa287979268a8bb926367)
Signed-off-by: Ng Wei Tee <wei.tee.ng@intel.com>
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This patch adds codec ID (0x80862882) and module alias for
Valleyview2 display codec.
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
(cherry picked from commit cc1a95d9f6423ced191b6f264e9657d98844ea0d)
Signed-off-by: Ng Wei Tee <wei.tee.ng@intel.com>
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During system resume, if the event buffers are not setup before
the gadget controller starts then we start with invalid context
and this can lead to bus access errors. This is especially true for
platforms that loose the controller context during system suspend.
e.g. AM437x.
The following backtrace was found when the system is suspended
and resumed with g_zero loaded on AM437x-evm (USB cable connected
to host all the while).
[ 120.981506] WARNING: CPU: 0 PID: 1656 at drivers/bus/omap_l3_noc.c:137 l3_interrupt_handler+0x198/0x28c()
[ 120.981514] L3 custom error: MASTER:USB0 WR TARGET:GPMC
[ 120.981638] Modules linked in: g_mass_storage usb_f_mass_storage libcomposite configfs bufferclass_ti(O) omaplfb(O) cryptodev(O) dwc3 snd_soc_evm snd_soc_omap snd_pe
[ 120.981659] CPU: 0 PID: 1656 Comm: sh Tainted: G O 3.12.10-gc559824 #1
[ 120.981669] Backtrace:
[ 120.981705] [<c0017880>] (dump_backtrace+0x0/0x10c) from [<c0017a1c>] (show_stack+0x18/0x1c)
[ 120.981730] r6:c02819ac r5:00000009 r4:ec137cb8 r3:00000000
[ 120.981767] [<c0017a04>] (show_stack+0x0/0x1c) from [<c056c0b0>] (dump_stack+0x20/0x28)
[ 120.981802] [<c056c090>] (dump_stack+0x0/0x28) from [<c0046d08>] (warn_slowpath_common+0x70/0x90)
[ 120.981830] [<c0046c98>] (warn_slowpath_common+0x0/0x90) from [<c0046dcc>] (warn_slowpath_fmt+0x38/0x40)
[ 120.981856] r8:c0855eb0 r7:00000002 r6:f1000700 r5:00000007 r4:80080003
[ 120.981886] [<c0046d94>] (warn_slowpath_fmt+0x0/0x40) from [<c02819ac>] (l3_interrupt_handler+0x198/0x28c)
[ 120.981900] r3:c0801ab8 r2:c06cb354
[ 120.981936] [<c0281814>] (l3_interrupt_handler+0x0/0x28c) from [<c007162c>] (handle_irq_event_percpu+0x54/0x1b8)
[ 120.981962] [<c00715d8>] (handle_irq_event_percpu+0x0/0x1b8) from [<c00717c0>] (handle_irq_event+0x30/0x40)
[ 120.981993] [<c0071790>] (handle_irq_event+0x0/0x40) from [<c0074058>] (handle_fasteoi_irq+0x74/0x128)
[ 120.982006] r4:ed0056c0 r3:00000000
[ 120.982033] [<c0073fe4>] (handle_fasteoi_irq+0x0/0x128) from [<c0070f34>] (generic_handle_irq+0x28/0x38)
[ 120.982046] r4:0000002a r3:c0073fe4
[ 120.982085] [<c0070f0c>] (generic_handle_irq+0x0/0x38) from [<c0015560>] (handle_IRQ+0x38/0x8c)
[ 120.982098] r4:c080137c r3:00000182
[ 120.982124] [<c0015528>] (handle_IRQ+0x0/0x8c) from [<c00087e0>] (gic_handle_irq+0x30/0x5c)
[ 120.982145] r6:ec137dd0 r5:c07ac480 r4:fa24010c r3:00000100
[ 120.982169] [<c00087b0>] (gic_handle_irq+0x0/0x5c) from [<c056fcc0>] (__irq_svc+0x40/0x54)
[ 120.982179] Exception stack(0xec137dd0 to 0xec137e18)
[ 120.982195] 7dc0: 00000000 a00001d3 00000000 00000004
[ 120.982216] 7de0: a0000153 ec1d9010 c080de90 ec137e30 c080debc 00000000 ed756e44 ec137e2c
[ 120.982232] 7e00: ec137de0 ec137e18 bf1150e4 bf115474 60000153 ffffffff
[ 120.982253] r7:ec137e04 r6:ffffffff r5:60000153 r4:bf115474
[ 120.982327] [<bf115438>] (dwc3_complete+0x0/0x40 [dwc3]) from [<c0338f50>] (dpm_complete+0xd4/0x19c)
[ 120.982341] r5:ed756e10 r4:ed756e64
[ 120.982370] [<c0338e7c>] (dpm_complete+0x0/0x19c) from [<c0339034>] (dpm_resume_end+0x1c/0x20)
[ 120.982400] [<c0339018>] (dpm_resume_end+0x0/0x20) from [<c006d4ec>] (suspend_devices_and_enter+0x118/0x33c)
[ 120.982412] r4:c0833da4 r3:00000000
[ 120.982436] [<c006d3d4>] (suspend_devices_and_enter+0x0/0x33c) from [<c006d928>] (pm_suspend+0x218/0x254)
[ 120.982458] [<c006d710>] (pm_suspend+0x0/0x254) from [<c006c594>] (state_store+0x70/0xc0)
[ 120.982478] r6:c057a6cc r5:c06a8320 r4:00000003 r3:0000006d
[ 120.982515] [<c006c524>] (state_store+0x0/0xc0) from [<c0264cc0>] (kobj_attr_store+0x1c/0x28)
[ 120.982546] [<c0264ca4>] (kobj_attr_store+0x0/0x28) from [<c012ccb8>] (sysfs_write_file+0x170/0x1a4)
[ 120.982583] [<c012cb48>] (sysfs_write_file+0x0/0x1a4) from [<c00d17e4>] (vfs_write+0xb8/0x190)
[ 120.982611] [<c00d172c>] (vfs_write+0x0/0x190) from [<c00d1bf8>] (SyS_write+0x44/0x78)
[ 120.982641] [<c00d1bb4>] (SyS_write+0x0/0x78) from [<c0014660>] (ret_fast_syscall+0x0/0x30)
Signed-off-by: Roger Quadros <rogerq@ti.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit f45e5f00dacf09362a16339d372fcc96705e40c7)
Conflicts:
drivers/usb/dwc3/core.c
Signed-off-by: Maurice Petallo <mauricex.r.petallo@intel.com>
Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com>
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This is the 3.10.65 stable release
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This is the 3.10.64 stable release
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Tan, Jui Nee
Joshua Tan
Maurice Petallo
Andy Shevchenko
Karthikeyan Rajkumar
Sarah Sharp
Ng Wei Tee
Chew, Chiau Ee
Chew, Kean Ho
Chang Rebecca Swee Fun
David Cohen
Xenia Ragiadakou
Al Cooper
Vikas Sajjan
Takashi Iwai
Oliver Neukum
Mengdong Lin
Roger Quadros
Bruce Ashfield