summaryrefslogtreecommitdiffstats
path: root/drivers/scsi/bnx2i/57xx_iscsi_hsi.h
blob: f2db5fe7bdc2ba8f8a9c0cbb8458593494eef98a (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
/* 57xx_iscsi_hsi.h: Broadcom NetXtreme II iSCSI HSI.
 *
 * Copyright (c) 2006 - 2012 Broadcom Corporation
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation.
 *
 * Written by: Anil Veerabhadrappa (anilgv@broadcom.com)
 * Maintained by: Eddie Wai (eddie.wai@broadcom.com)
 */
#ifndef __57XX_ISCSI_HSI_LINUX_LE__
#define __57XX_ISCSI_HSI_LINUX_LE__

/*
 * iSCSI Async CQE
 */
struct bnx2i_async_msg {
#if defined(__BIG_ENDIAN)
	u8 op_code;
	u8 reserved1;
	u16 reserved0;
#elif defined(__LITTLE_ENDIAN)
	u16 reserved0;
	u8 reserved1;
	u8 op_code;
#endif
	u32 reserved2;
	u32 exp_cmd_sn;
	u32 max_cmd_sn;
	u32 reserved3[2];
#if defined(__BIG_ENDIAN)
	u16 reserved5;
	u8 err_code;
	u8 reserved4;
#elif defined(__LITTLE_ENDIAN)
	u8 reserved4;
	u8 err_code;
	u16 reserved5;
#endif
	u32 reserved6;
	u32 lun[2];
#if defined(__BIG_ENDIAN)
	u8 async_event;
	u8 async_vcode;
	u16 param1;
#elif defined(__LITTLE_ENDIAN)
	u16 param1;
	u8 async_vcode;
	u8 async_event;
#endif
#if defined(__BIG_ENDIAN)
	u16 param2;
	u16 param3;
#elif defined(__LITTLE_ENDIAN)
	u16 param3;
	u16 param2;
#endif
	u32 reserved7[3];
	u32 cq_req_sn;
};


/*
 * iSCSI Buffer Descriptor (BD)
 */
struct iscsi_bd {
	u32 buffer_addr_hi;
	u32 buffer_addr_lo;
#if defined(__BIG_ENDIAN)
	u16 reserved0;
	u16 buffer_length;
#elif defined(__LITTLE_ENDIAN)
	u16 buffer_length;
	u16 reserved0;
#endif
#if defined(__BIG_ENDIAN)
	u16 reserved3;
	u16 flags;
#define ISCSI_BD_RESERVED1 (0x3F<<0)
#define ISCSI_BD_RESERVED1_SHIFT 0
#define ISCSI_BD_LAST_IN_BD_CHAIN (0x1<<6)
#define ISCSI_BD_LAST_IN_BD_CHAIN_SHIFT 6
#define ISCSI_BD_FIRST_IN_BD_CHAIN (0x1<<7)
#define ISCSI_BD_FIRST_IN_BD_CHAIN_SHIFT 7
#define ISCSI_BD_RESERVED2 (0xFF<<8)
#define ISCSI_BD_RESERVED2_SHIFT 8
#elif defined(__LITTLE_ENDIAN)
	u16 flags;
#define ISCSI_BD_RESERVED1 (0x3F<<0)
#define ISCSI_BD_RESERVED1_SHIFT 0
#define ISCSI_BD_LAST_IN_BD_CHAIN (0x1<<6)
#define ISCSI_BD_LAST_IN_BD_CHAIN_SHIFT 6
#define ISCSI_BD_FIRST_IN_BD_CHAIN (0x1<<7)
#define ISCSI_BD_FIRST_IN_BD_CHAIN_SHIFT 7
#define ISCSI_BD_RESERVED2 (0xFF<<8)
#define ISCSI_BD_RESERVED2_SHIFT 8
	u16 reserved3;
#endif
};


/*
 * iSCSI Cleanup SQ WQE
 */
struct bnx2i_cleanup_request {
#if defined(__BIG_ENDIAN)
	u8 op_code;
	u8 reserved1;
	u16 reserved0;
#elif defined(__LITTLE_ENDIAN)
	u16 reserved0;
	u8 reserved1;
	u8 op_code;
#endif
	u32 reserved2[3];
#if defined(__BIG_ENDIAN)
	u16 reserved3;
	u16 itt;
#define ISCSI_CLEANUP_REQUEST_INDEX (0x3FFF<<0)
#define ISCSI_CLEANUP_REQUEST_INDEX_SHIFT 0
#define ISCSI_CLEANUP_REQUEST_TYPE (0x3<<14)
#define ISCSI_CLEANUP_REQUEST_TYPE_SHIFT 14
#elif defined(__LITTLE_ENDIAN)
	u16 itt;
#define ISCSI_CLEANUP_REQUEST_INDEX (0x3FFF<<0)
#define ISCSI_CLEANUP_REQUEST_INDEX_SHIFT 0
#define ISCSI_CLEANUP_REQUEST_TYPE (0x3<<14)
#define ISCSI_CLEANUP_REQUEST_TYPE_SHIFT 14
	u16 reserved3;
#endif
	u32 reserved4[10];
#if defined(__BIG_ENDIAN)
	u8 cq_index;
	u8 reserved6;
	u16 reserved5;
#elif defined(__LITTLE_ENDIAN)
	u16 reserved5;
	u8 reserved6;
	u8 cq_index;
#endif
};


/*
 * iSCSI Cleanup CQE
 */
struct bnx2i_cleanup_response {
#if defined(__BIG_ENDIAN)
	u8 op_code;
	u8 status;
	u16 reserved0;
#elif defined(__LITTLE_ENDIAN)
	u16 reserved0;
	u8 status;
	u8 op_code;
#endif
	u32 reserved1[3];
	u32 reserved2[2];
#if defined(__BIG_ENDIAN)
	u16 reserved4;
	u8 err_code;
	u8 reserved3;
#elif defined(__LITTLE_ENDIAN)
	u8 reserved3;
	u8 err_code;
	u16 reserved4;
#endif
	u32 reserved5[7];
#if defined(__BIG_ENDIAN)
	u16 reserved6;
	u16 itt;
#define ISCSI_CLEANUP_RESPONSE_INDEX (0x3FFF<<0)
#define ISCSI_CLEANUP_RESPONSE_INDEX_SHIFT 0
#define ISCSI_CLEANUP_RESPONSE_TYPE (0x3<<14)
#define ISCSI_CLEANUP_RESPONSE_TYPE_SHIFT 14
#elif defined(__LITTLE_ENDIAN)
	u16 itt;
#define ISCSI_CLEANUP_RESPONSE_INDEX (0x3FFF<<0)
#define ISCSI_CLEANUP_RESPONSE_INDEX_SHIFT 0
#define ISCSI_CLEANUP_RESPONSE_TYPE (0x3<<14)
#define ISCSI_CLEANUP_RESPONSE_TYPE_SHIFT 14
	u16 reserved6;
#endif
	u32 cq_req_sn;
};


/*
 * SCSI read/write SQ WQE
 */
struct bnx2i_cmd_request {
#if defined(__BIG_ENDIAN)
	u8 op_code;
	u8 op_attr;
#define ISCSI_CMD_REQUEST_TASK_ATTR (0x7<<0)
#define ISCSI_CMD_REQUEST_TASK_ATTR_SHIFT 0
#define ISCSI_CMD_REQUEST_RESERVED1 (0x3<<3)
#define ISCSI_CMD_REQUEST_RESERVED1_SHIFT 3
#define ISCSI_CMD_REQUEST_WRITE (0x1<<5)
#define ISCSI_CMD_REQUEST_WRITE_SHIFT 5
#define ISCSI_CMD_REQUEST_READ (0x1<<6)
#define ISCSI_CMD_REQUEST_READ_SHIFT 6
#define ISCSI_CMD_REQUEST_FINAL (0x1<<7)
#define ISCSI_CMD_REQUEST_FINAL_SHIFT 7
	u16 reserved0;
#elif defined(__LITTLE_ENDIAN)
	u16 reserved0;
	u8 op_attr;
#define ISCSI_CMD_REQUEST_TASK_ATTR (0x7<<0)
#define ISCSI_CMD_REQUEST_TASK_ATTR_SHIFT 0
#define ISCSI_CMD_REQUEST_RESERVED1 (0x3<<3)
#define ISCSI_CMD_REQUEST_RESERVED1_SHIFT 3
#define ISCSI_CMD_REQUEST_WRITE (0x1<<5)
#define ISCSI_CMD_REQUEST_WRITE_SHIFT 5
#define ISCSI_CMD_REQUEST_READ (0x1<<6)
#define ISCSI_CMD_REQUEST_READ_SHIFT 6
#define ISCSI_CMD_REQUEST_FINAL (0x1<<7)
#define ISCSI_CMD_REQUEST_FINAL_SHIFT 7
	u8 op_code;
#endif
#if defined(__BIG_ENDIAN)
	u16 ud_buffer_offset;
	u16 sd_buffer_offset;
#elif defined(__LITTLE_ENDIAN)
	u16 sd_buffer_offset;
	u16 ud_buffer_offset;
#endif
	u32 lun[2];
#if defined(__BIG_ENDIAN)
	u16 reserved2;
	u16 itt;
#define ISCSI_CMD_REQUEST_INDEX (0x3FFF<<0)
#define ISCSI_CMD_REQUEST_INDEX_SHIFT 0
#define ISCSI_CMD_REQUEST_TYPE (0x3<<14)
#define ISCSI_CMD_REQUEST_TYPE_SHIFT 14
#elif defined(__LITTLE_ENDIAN)
	u16 itt;
#define ISCSI_CMD_REQUEST_INDEX (0x3FFF<<0)
#define ISCSI_CMD_REQUEST_INDEX_SHIFT 0
#define ISCSI_CMD_REQUEST_TYPE (0x3<<14)
#define ISCSI_CMD_REQUEST_TYPE_SHIFT 14
	u16 reserved2;
#endif
	u32 total_data_transfer_length;
	u32 cmd_sn;
	u32 reserved3;
	u32 cdb[4];
	u32 zero_fill;
	u32 bd_list_addr_lo;
	u32 bd_list_addr_hi;
#if defined(__BIG_ENDIAN)
	u8 cq_index;
	u8 sd_start_bd_index;
	u8 ud_start_bd_index;
	u8 num_bds;
#elif defined(__LITTLE_ENDIAN)
	u8 num_bds;
	u8 ud_start_bd_index;
	u8 sd_start_bd_index;
	u8 cq_index;
#endif
};


/*
 * task statistics for write response
 */
struct bnx2i_write_resp_task_stat {
#if defined(__BIG_ENDIAN)
	u16 num_r2ts;
	u16 num_data_outs;
#elif defined(__LITTLE_ENDIAN)
	u16 num_data_outs;
	u16 num_r2ts;
#endif
};

/*
 * task statistics for read response
 */
struct bnx2i_read_resp_task_stat {
#if defined(__BIG_ENDIAN)
	u16 reserved;
	u16 num_data_ins;
#elif defined(__LITTLE_ENDIAN)
	u16 num_data_ins;
	u16 reserved;
#endif
};

/*
 * task statistics for iSCSI cmd response
 */
union bnx2i_cmd_resp_task_stat {
	struct bnx2i_write_resp_task_stat write_stat;
	struct bnx2i_read_resp_task_stat read_stat;
};

/*
 * SCSI Command CQE
 */
struct bnx2i_cmd_response {
#if defined(__BIG_ENDIAN)
	u8 op_code;
	u8 response_flags;
#define ISCSI_CMD_RESPONSE_RESERVED0 (0x1<<0)
#define ISCSI_CMD_RESPONSE_RESERVED0_SHIFT 0
#define ISCSI_CMD_RESPONSE_RESIDUAL_UNDERFLOW (0x1<<1)
#define ISCSI_CMD_RESPONSE_RESIDUAL_UNDERFLOW_SHIFT 1
#define ISCSI_CMD_RESPONSE_RESIDUAL_OVERFLOW (0x1<<2)
#define ISCSI_CMD_RESPONSE_RESIDUAL_OVERFLOW_SHIFT 2
#define ISCSI_CMD_RESPONSE_BR_RESIDUAL_UNDERFLOW (0x1<<3)
#define ISCSI_CMD_RESPONSE_BR_RESIDUAL_UNDERFLOW_SHIFT 3
#define ISCSI_CMD_RESPONSE_BR_RESIDUAL_OVERFLOW (0x1<<4)
#define ISCSI_CMD_RESPONSE_BR_RESIDUAL_OVERFLOW_SHIFT 4
#define ISCSI_CMD_RESPONSE_RESERVED1 (0x7<<5)
#define ISCSI_CMD_RESPONSE_RESERVED1_SHIFT 5
	u8 response;
	u8 status;
#elif defined(__LITTLE_ENDIAN)
	u8 status;
	u8 response;
	u8 response_flags;
#define ISCSI_CMD_RESPONSE_RESERVED0 (0x1<<0)
#define ISCSI_CMD_RESPONSE_RESERVED0_SHIFT 0
#define ISCSI_CMD_RESPONSE_RESIDUAL_UNDERFLOW (0x1<<1)
#define ISCSI_CMD_RESPONSE_RESIDUAL_UNDERFLOW_SHIFT 1
#define ISCSI_CMD_RESPONSE_RESIDUAL_OVERFLOW (0x1<<2)
#define ISCSI_CMD_RESPONSE_RESIDUAL_OVERFLOW_SHIFT 2
#define ISCSI_CMD_RESPONSE_BR_RESIDUAL_UNDERFLOW (0x1<<3)
#define ISCSI_CMD_RESPONSE_BR_RESIDUAL_UNDERFLOW_SHIFT 3
#define ISCSI_CMD_RESPONSE_BR_RESIDUAL_OVERFLOW (0x1<<4)
#define ISCSI_CMD_RESPONSE_BR_RESIDUAL_OVERFLOW_SHIFT 4
#define ISCSI_CMD_RESPONSE_RESERVED1 (0x7<<5)
#define ISCSI_CMD_RESPONSE_RESERVED1_SHIFT 5
	u8 op_code;
#endif
	u32 data_length;
	u32 exp_cmd_sn;
	u32 max_cmd_sn;
	u32 reserved2;
	u32 residual_count;
#if defined(__BIG_ENDIAN)
	u16 reserved4;
	u8 err_code;
	u8 reserved3;
#elif defined(__LITTLE_ENDIAN)
	u8 reserved3;
	u8 err_code;
	u16 reserved4;
#endif
	u32 reserved5[5];
	union bnx2i_cmd_resp_task_stat task_stat;
	u32 reserved6;
#if defined(__BIG_ENDIAN)
	u16 reserved7;
	u16 itt;
#define ISCSI_CMD_RESPONSE_INDEX (0x3FFF<<0)
#define ISCSI_CMD_RESPONSE_INDEX_SHIFT 0
#define ISCSI_CMD_RESPONSE_TYPE (0x3<<14)
#define ISCSI_CMD_RESPONSE_TYPE_SHIFT 14
#elif defined(__LITTLE_ENDIAN)
	u16 itt;
#define ISCSI_CMD_RESPONSE_INDEX (0x3FFF<<0)
#define ISCSI_CMD_RESPONSE_INDEX_SHIFT 0
#define ISCSI_CMD_RESPONSE_TYPE (0x3<<14)
#define ISCSI_CMD_RESPONSE_TYPE_SHIFT 14
	u16 reserved7;
#endif
	u32 cq_req_sn;
};



/*
 * firmware middle-path request SQ WQE
 */
struct bnx2i_fw_mp_request {
#if defined(__BIG_ENDIAN)
	u8 op_code;
	u8 op_attr;
	u16 hdr_opaque1;
#elif defined(__LITTLE_ENDIAN)
	u16 hdr_opaque1;
	u8 op_attr;
	u8 op_code;
#endif
	u32 data_length;
	u32 hdr_opaque2[2];
#if defined(__BIG_ENDIAN)
	u16 reserved0;
	u16 itt;
#define ISCSI_FW_MP_REQUEST_INDEX (0x3FFF<<0)
#define ISCSI_FW_MP_REQUEST_INDEX_SHIFT 0
#define ISCSI_FW_MP_REQUEST_TYPE (0x3<<14)
#define ISCSI_FW_MP_REQUEST_TYPE_SHIFT 14
#elif defined(__LITTLE_ENDIAN)
	u16 itt;
#define ISCSI_FW_MP_REQUEST_INDEX (0x3FFF<<0)
#define ISCSI_FW_MP_REQUEST_INDEX_SHIFT 0
#define ISCSI_FW_MP_REQUEST_TYPE (0x3<<14)
#define ISCSI_FW_MP_REQUEST_TYPE_SHIFT 14
	u16 reserved0;
#endif
	u32 hdr_opaque3[4];
	u32 resp_bd_list_addr_lo;
	u32 resp_bd_list_addr_hi;
	u32 resp_buffer;
#define ISCSI_FW_MP_REQUEST_RESP_BUFFER_LENGTH (0xFFFFFF<<0)
#define ISCSI_FW_MP_REQUEST_RESP_BUFFER_LENGTH_SHIFT 0
#define ISCSI_FW_MP_REQUEST_NUM_RESP_BDS (0xFF<<24)
#define ISCSI_FW_MP_REQUEST_NUM_RESP_BDS_SHIFT 24
#if defined(__BIG_ENDIAN)
	u16 reserved4;
	u8 reserved3;
	u8 flags;
#define ISCSI_FW_MP_REQUEST_RESERVED1 (0x1<<0)
#define ISCSI_FW_MP_REQUEST_RESERVED1_SHIFT 0
#define ISCSI_FW_MP_REQUEST_LOCAL_COMPLETION (0x1<<1)
#define ISCSI_FW_MP_REQUEST_LOCAL_COMPLETION_SHIFT 1
#define ISCSI_FW_MP_REQUEST_UPDATE_EXP_STAT_SN (0x1<<2)
#define ISCSI_FW_MP_REQUEST_UPDATE_EXP_STAT_SN_SHIFT 2
#define ISCSI_FW_MP_REQUEST_RESERVED2 (0x1F<<3)
#define ISCSI_FW_MP_REQUEST_RESERVED2_SHIFT 3
#elif defined(__LITTLE_ENDIAN)
	u8 flags;
#define ISCSI_FW_MP_REQUEST_RESERVED1 (0x1<<0)
#define ISCSI_FW_MP_REQUEST_RESERVED1_SHIFT 0
#define ISCSI_FW_MP_REQUEST_LOCAL_COMPLETION (0x1<<1)
#define ISCSI_FW_MP_REQUEST_LOCAL_COMPLETION_SHIFT 1
#define ISCSI_FW_MP_REQUEST_UPDATE_EXP_STAT_SN (0x1<<2)
#define ISCSI_FW_MP_REQUEST_UPDATE_EXP_STAT_SN_SHIFT 2
#define ISCSI_FW_MP_REQUEST_RESERVED2 (0x1F<<3)
#define ISCSI_FW_MP_REQUEST_RESERVED2_SHIFT 3
	u8 reserved3;
	u16 reserved4;
#endif
	u32 bd_list_addr_lo;
	u32 bd_list_addr_hi;
#if defined(__BIG_ENDIAN)
	u8 cq_index;
	u8 reserved6;
	u8 reserved5;
	u8 num_bds;
#elif defined(__LITTLE_ENDIAN)
	u8 num_bds;
	u8 reserved5;
	u8 reserved6;
	u8 cq_index;
#endif
};


/*
 * firmware response - CQE: used only by firmware
 */
struct bnx2i_fw_response {
	u32 hdr_dword1[2];
	u32 hdr_exp_cmd_sn;
	u32 hdr_max_cmd_sn;
	u32 hdr_ttt;
	u32 hdr_res_cnt;
	u32 cqe_flags;
#define ISCSI_FW_RESPONSE_RESERVED2 (0xFF<<0)
#define ISCSI_FW_RESPONSE_RESERVED2_SHIFT 0
#define ISCSI_FW_RESPONSE_ERR_CODE (0xFF<<8)
#define ISCSI_FW_RESPONSE_ERR_CODE_SHIFT 8
#define ISCSI_FW_RESPONSE_RESERVED3 (0xFFFF<<16)
#define ISCSI_FW_RESPONSE_RESERVED3_SHIFT 16
	u32 stat_sn;
	u32 hdr_dword2[2];
	u32 hdr_dword3[2];
	u32 task_stat;
	u32 reserved0;
	u32 hdr_itt;
	u32 cq_req_sn;
};


/*
 * iSCSI KCQ CQE parameters
 */
union iscsi_kcqe_params {
	u32 reserved0[4];
};

/*
 * iSCSI KCQ CQE
 */
struct iscsi_kcqe {
	u32 iscsi_conn_id;
	u32 completion_status;
	u32 iscsi_conn_context_id;
	union iscsi_kcqe_params params;
#if defined(__BIG_ENDIAN)
	u8 flags;
#define ISCSI_KCQE_RESERVED0 (0xF<<0)
#define ISCSI_KCQE_RESERVED0_SHIFT 0
#define ISCSI_KCQE_LAYER_CODE (0x7<<4)
#define ISCSI_KCQE_LAYER_CODE_SHIFT 4
#define ISCSI_KCQE_RESERVED1 (0x1<<7)
#define ISCSI_KCQE_RESERVED1_SHIFT 7
	u8 op_code;
	u16 qe_self_seq;
#elif defined(__LITTLE_ENDIAN)
	u16 qe_self_seq;
	u8 op_code;
	u8 flags;
#define ISCSI_KCQE_RESERVED0 (0xF<<0)
#define ISCSI_KCQE_RESERVED0_SHIFT 0
#define ISCSI_KCQE_LAYER_CODE (0x7<<4)
#define ISCSI_KCQE_LAYER_CODE_SHIFT 4
#define ISCSI_KCQE_RESERVED1 (0x1<<7)
#define ISCSI_KCQE_RESERVED1_SHIFT 7
#endif
};



/*
 * iSCSI KWQE header
 */
struct iscsi_kwqe_header {
#if defined(__BIG_ENDIAN)
	u8 flags;
#define ISCSI_KWQE_HEADER_RESERVED0 (0xF<<0)
#define ISCSI_KWQE_HEADER_RESERVED0_SHIFT 0
#define ISCSI_KWQE_HEADER_LAYER_CODE (0x7<<4)
#define ISCSI_KWQE_HEADER_LAYER_CODE_SHIFT 4
#define ISCSI_KWQE_HEADER_RESERVED1 (0x1<<7)
#define ISCSI_KWQE_HEADER_RESERVED1_SHIFT 7
	u8 op_code;
#elif defined(__LITTLE_ENDIAN)
	u8 op_code;
	u8 flags;
#define ISCSI_KWQE_HEADER_RESERVED0 (0xF<<0)
#define ISCSI_KWQE_HEADER_RESERVED0_SHIFT 0
#define ISCSI_KWQE_HEADER_LAYER_CODE (0x7<<4)
#define ISCSI_KWQE_HEADER_LAYER_CODE_SHIFT 4
#define ISCSI_KWQE_HEADER_RESERVED1 (0x1<<7)
#define ISCSI_KWQE_HEADER_RESERVED1_SHIFT 7
#endif
};

/*
 * iSCSI firmware init request 1
 */
struct iscsi_kwqe_init1 {
#if defined(__BIG_ENDIAN)
	struct iscsi_kwqe_header hdr;
	u8 reserved0;
	u8 num_cqs;
#elif defined(__LITTLE_ENDIAN)
	u8 num_cqs;
	u8 reserved0;
	struct iscsi_kwqe_header hdr;
#endif
	u32 dummy_buffer_addr_lo;
	u32 dummy_buffer_addr_hi;
#if defined(__BIG_ENDIAN)
	u16 num_ccells_per_conn;
	u16 num_tasks_per_conn;
#elif defined(__LITTLE_ENDIAN)
	u16 num_tasks_per_conn;
	u16 num_ccells_per_conn;
#endif
#if defined(__BIG_ENDIAN)
	u16 sq_wqes_per_page;
	u16 sq_num_wqes;
#elif defined(__LITTLE_ENDIAN)
	u16 sq_num_wqes;
	u16 sq_wqes_per_page;
#endif
#if defined(__BIG_ENDIAN)
	u8 cq_log_wqes_per_page;
	u8 flags;
#define ISCSI_KWQE_INIT1_PAGE_SIZE (0xF<<0)
#define ISCSI_KWQE_INIT1_PAGE_SIZE_SHIFT 0
#define ISCSI_KWQE_INIT1_DELAYED_ACK_ENABLE (0x1<<4)
#define ISCSI_KWQE_INIT1_DELAYED_ACK_ENABLE_SHIFT 4
#define ISCSI_KWQE_INIT1_KEEP_ALIVE_ENABLE (0x1<<5)
#define ISCSI_KWQE_INIT1_KEEP_ALIVE_ENABLE_SHIFT 5
#define ISCSI_KWQE_INIT1_RESERVED1 (0x3<<6)
#define ISCSI_KWQE_INIT1_RESERVED1_SHIFT 6
	u16 cq_num_wqes;
#elif defined(__LITTLE_ENDIAN)
	u16 cq_num_wqes;
	u8 flags;
#define ISCSI_KWQE_INIT1_PAGE_SIZE (0xF<<0)
#define ISCSI_KWQE_INIT1_PAGE_SIZE_SHIFT 0
#define ISCSI_KWQE_INIT1_DELAYED_ACK_ENABLE (0x1<<4)
#define ISCSI_KWQE_INIT1_DELAYED_ACK_ENABLE_SHIFT 4
#define ISCSI_KWQE_INIT1_KEEP_ALIVE_ENABLE (0x1<<5)
#define ISCSI_KWQE_INIT1_KEEP_ALIVE_ENABLE_SHIFT 5
#define ISCSI_KWQE_INIT1_RESERVED1 (0x3<<6)
#define ISCSI_KWQE_INIT1_RESERVED1_SHIFT 6
	u8 cq_log_wqes_per_page;
#endif
#if defined(__BIG_ENDIAN)
	u16 cq_num_pages;
	u16 sq_num_pages;
#elif defined(__LITTLE_ENDIAN)
	u16 sq_num_pages;
	u16 cq_num_pages;
#endif
#if defined(__BIG_ENDIAN)
	u16 rq_buffer_size;
	u16 rq_num_wqes;
#elif defined(__LITTLE_ENDIAN)
	u16 rq_num_wqes;
	u16 rq_buffer_size;
#endif
};

/*
 * iSCSI firmware init request 2
 */
struct iscsi_kwqe_init2 {
#if defined(__BIG_ENDIAN)
	struct iscsi_kwqe_header hdr;
	u16 max_cq_sqn;
#elif defined(__LITTLE_ENDIAN)
	u16 max_cq_sqn;
	struct iscsi_kwqe_header hdr;
#endif
	u32 error_bit_map[2];
	u32 reserved1[5];
};

/*
 * Initial iSCSI connection offload request 1
 */
struct iscsi_kwqe_conn_offload1 {
#if defined(__BIG_ENDIAN)
	struct iscsi_kwqe_header hdr;
	u16 iscsi_conn_id;
#elif defined(__LITTLE_ENDIAN)
	u16 iscsi_conn_id;
	struct iscsi_kwqe_header hdr;
#endif
	u32 sq_page_table_addr_lo;
	u32 sq_page_table_addr_hi;
	u32 cq_page_table_addr_lo;
	u32 cq_page_table_addr_hi;
	u32 reserved0[3];
};

/*
 * iSCSI Page Table Entry (PTE)
 */
struct iscsi_pte {
	u32 hi;
	u32 lo;
};

/*
 * Initial iSCSI connection offload request 2
 */
struct iscsi_kwqe_conn_offload2 {
#if defined(__BIG_ENDIAN)
	struct iscsi_kwqe_header hdr;
	u16 reserved0;
#elif defined(__LITTLE_ENDIAN)
	u16 reserved0;
	struct iscsi_kwqe_header hdr;
#endif
	u32 rq_page_table_addr_lo;
	u32 rq_page_table_addr_hi;
	struct iscsi_pte sq_first_pte;
	struct iscsi_pte cq_first_pte;
	u32 num_additional_wqes;
};


/*
 * Initial iSCSI connection offload request 3
 */
struct iscsi_kwqe_conn_offload3 {
#if defined(__BIG_ENDIAN)
	struct iscsi_kwqe_header hdr;
	u16 reserved0;
#elif defined(__LITTLE_ENDIAN)
	u16 reserved0;
	struct iscsi_kwqe_header hdr;
#endif
	u32 reserved1;
	struct iscsi_pte qp_first_pte[3];
};


/*
 * iSCSI connection update request
 */
struct iscsi_kwqe_conn_update {
#if defined(__BIG_ENDIAN)
	struct iscsi_kwqe_header hdr;
	u16 reserved0;
#elif defined(__LITTLE_ENDIAN)
	u16 reserved0;
	struct iscsi_kwqe_header hdr;
#endif
#if defined(__BIG_ENDIAN)
	u8 session_error_recovery_level;
	u8 max_outstanding_r2ts;
	u8 reserved2;
	u8 conn_flags;
#define ISCSI_KWQE_CONN_UPDATE_HEADER_DIGEST (0x1<<0)
#define ISCSI_KWQE_CONN_UPDATE_HEADER_DIGEST_SHIFT 0
#define ISCSI_KWQE_CONN_UPDATE_DATA_DIGEST (0x1<<1)
#define ISCSI_KWQE_CONN_UPDATE_DATA_DIGEST_SHIFT 1
#define ISCSI_KWQE_CONN_UPDATE_INITIAL_R2T (0x1<<2)
#define ISCSI_KWQE_CONN_UPDATE_INITIAL_R2T_SHIFT 2
#define ISCSI_KWQE_CONN_UPDATE_IMMEDIATE_DATA (0x1<<3)
#define ISCSI_KWQE_CONN_UPDATE_IMMEDIATE_DATA_SHIFT 3
#define ISCSI_KWQE_CONN_UPDATE_OOO_SUPPORT_MODE (0x3<<4)
#define ISCSI_KWQE_CONN_UPDATE_OOO_SUPPORT_MODE_SHIFT 4
#define ISCSI_KWQE_CONN_UPDATE_RESERVED1 (0x3<<6)
#define ISCSI_KWQE_CONN_UPDATE_RESERVED1_SHIFT 6
#elif defined(__LITTLE_ENDIAN)
	u8 conn_flags;
#define ISCSI_KWQE_CONN_UPDATE_HEADER_DIGEST (0x1<<0)
#define ISCSI_KWQE_CONN_UPDATE_HEADER_DIGEST_SHIFT 0
#define ISCSI_KWQE_CONN_UPDATE_DATA_DIGEST (0x1<<1)
#define ISCSI_KWQE_CONN_UPDATE_DATA_DIGEST_SHIFT 1
#define ISCSI_KWQE_CONN_UPDATE_INITIAL_R2T (0x1<<2)
#define ISCSI_KWQE_CONN_UPDATE_INITIAL_R2T_SHIFT 2
#define ISCSI_KWQE_CONN_UPDATE_IMMEDIATE_DATA (0x1<<3)
#define ISCSI_KWQE_CONN_UPDATE_IMMEDIATE_DATA_SHIFT 3
#define ISCSI_KWQE_CONN_UPDATE_OOO_SUPPORT_MODE (0x3<<4)
#define ISCSI_KWQE_CONN_UPDATE_OOO_SUPPORT_MODE_SHIFT 4
#define ISCSI_KWQE_CONN_UPDATE_RESERVED1 (0x3<<6)
#define ISCSI_KWQE_CONN_UPDATE_RESERVED1_SHIFT 6
	u8 reserved2;
	u8 max_outstanding_r2ts;
	u8 session_error_recovery_level;
#endif
	u32 context_id;
	u32 max_send_pdu_length;
	u32 max_recv_pdu_length;
	u32 first_burst_length;
	u32 max_burst_length;
	u32 exp_stat_sn;
};

/*
 * iSCSI destroy connection request
 */
struct iscsi_kwqe_conn_destroy {
#if defined(__BIG_ENDIAN)
	struct iscsi_kwqe_header hdr;
	u16 reserved0;
#elif defined(__LITTLE_ENDIAN)
	u16 reserved0;
	struct iscsi_kwqe_header hdr;
#endif
	u32 context_id;
	u32 reserved1[6];
};

/*
 * iSCSI KWQ WQE
 */
union iscsi_kwqe {
	struct iscsi_kwqe_init1 init1;
	struct iscsi_kwqe_init2 init2;
	struct iscsi_kwqe_conn_offload1 conn_offload1;
	struct iscsi_kwqe_conn_offload2 conn_offload2;
	struct iscsi_kwqe_conn_update conn_update;
	struct iscsi_kwqe_conn_destroy conn_destroy;
};

/*
 * iSCSI Login SQ WQE
 */
struct bnx2i_login_request {
#if defined(__BIG_ENDIAN)
	u8 op_code;
	u8 op_attr;
#define ISCSI_LOGIN_REQUEST_NEXT_STAGE (0x3<<0)
#define ISCSI_LOGIN_REQUEST_NEXT_STAGE_SHIFT 0
#define ISCSI_LOGIN_REQUEST_CURRENT_STAGE (0x3<<2)
#define ISCSI_LOGIN_REQUEST_CURRENT_STAGE_SHIFT 2
#define ISCSI_LOGIN_REQUEST_RESERVED0 (0x3<<4)
#define ISCSI_LOGIN_REQUEST_RESERVED0_SHIFT 4
#define ISCSI_LOGIN_REQUEST_CONT (0x1<<6)
#define ISCSI_LOGIN_REQUEST_CONT_SHIFT 6
#define ISCSI_LOGIN_REQUEST_TRANSIT (0x1<<7)
#define ISCSI_LOGIN_REQUEST_TRANSIT_SHIFT 7
	u8 version_max;
	u8 version_min;
#elif defined(__LITTLE_ENDIAN)
	u8 version_min;
	u8 version_max;
	u8 op_attr;
#define ISCSI_LOGIN_REQUEST_NEXT_STAGE (0x3<<0)
#define ISCSI_LOGIN_REQUEST_NEXT_STAGE_SHIFT 0
#define ISCSI_LOGIN_REQUEST_CURRENT_STAGE (0x3<<2)
#define ISCSI_LOGIN_REQUEST_CURRENT_STAGE_SHIFT 2
#define ISCSI_LOGIN_REQUEST_RESERVED0 (0x3<<4)
#define ISCSI_LOGIN_REQUEST_RESERVED0_SHIFT 4
#define ISCSI_LOGIN_REQUEST_CONT (0x1<<6)
#define ISCSI_LOGIN_REQUEST_CONT_SHIFT 6
#define ISCSI_LOGIN_REQUEST_TRANSIT (0x1<<7)
#define ISCSI_LOGIN_REQUEST_TRANSIT_SHIFT 7
	u8 op_code;
#endif
	u32 data_length;
	u32 isid_lo;
#if defined(__BIG_ENDIAN)
	u16 isid_hi;
	u16 tsih;
#elif defined(__LITTLE_ENDIAN)
	u16 tsih;
	u16 isid_hi;
#endif
#if defined(__BIG_ENDIAN)
	u16 reserved2;
	u16 itt;
#define ISCSI_LOGIN_REQUEST_INDEX (0x3FFF<<0)
#define ISCSI_LOGIN_REQUEST_INDEX_SHIFT 0
#define ISCSI_LOGIN_REQUEST_TYPE (0x3<<14)
#define ISCSI_LOGIN_REQUEST_TYPE_SHIFT 14
#elif defined(__LITTLE_ENDIAN)
	u16 itt;
#define ISCSI_LOGIN_REQUEST_INDEX (0x3FFF<<0)
#define ISCSI_LOGIN_REQUEST_INDEX_SHIFT 0
#define ISCSI_LOGIN_REQUEST_TYPE (0x3<<14)
#define ISCSI_LOGIN_REQUEST_TYPE_SHIFT 14
	u16 reserved2;
#endif
#if defined(__BIG_ENDIAN)
	u16 cid;
	u16 reserved3;
#elif defined(__LITTLE_ENDIAN)
	u16 reserved3;
	u16 cid;
#endif
	u32 cmd_sn;
	u32 exp_stat_sn;
	u32 reserved4;
	u32 resp_bd_list_addr_lo;
	u32 resp_bd_list_addr_hi;
	u32 resp_buffer;
#define ISCSI_LOGIN_REQUEST_RESP_BUFFER_LENGTH (0xFFFFFF<<0)
#define ISCSI_LOGIN_REQUEST_RESP_BUFFER_LENGTH_SHIFT 0
#define ISCSI_LOGIN_REQUEST_NUM_RESP_BDS (0xFF<<24)
#define ISCSI_LOGIN_REQUEST_NUM_RESP_BDS_SHIFT 24
#if defined(__BIG_ENDIAN)
	u16 reserved8;
	u8 reserved7;
	u8 flags;
#define ISCSI_LOGIN_REQUEST_RESERVED5 (0x3<<0)
#define ISCSI_LOGIN_REQUEST_RESERVED5_SHIFT 0
#define ISCSI_LOGIN_REQUEST_UPDATE_EXP_STAT_SN (0x1<<2)
#define ISCSI_LOGIN_REQUEST_UPDATE_EXP_STAT_SN_SHIFT 2
#define ISCSI_LOGIN_REQUEST_RESERVED6 (0x1F<<3)
#define ISCSI_LOGIN_REQUEST_RESERVED6_SHIFT 3
#elif defined(__LITTLE_ENDIAN)
	u8 flags;
#define ISCSI_LOGIN_REQUEST_RESERVED5 (0x3<<0)
#define ISCSI_LOGIN_REQUEST_RESERVED5_SHIFT 0
#define ISCSI_LOGIN_REQUEST_UPDATE_EXP_STAT_SN (0x1<<2)
#define ISCSI_LOGIN_REQUEST_UPDATE_EXP_STAT_SN_SHIFT 2
#define ISCSI_LOGIN_REQUEST_RESERVED6 (0x1F<<3)
#define ISCSI_LOGIN_REQUEST_RESERVED6_SHIFT 3
	u8 reserved7;
	u16 reserved8;
#endif
	u32 bd_list_addr_lo;
	u32 bd_list_addr_hi;
#if defined(__BIG_ENDIAN)
	u8 cq_index;
	u8 reserved10;
	u8 reserved9;
	u8 num_bds;
#elif defined(__LITTLE_ENDIAN)
	u8 num_bds;
	u8 reserved9;
	u8 reserved10;
	u8 cq_index;
#endif
};


/*
 * iSCSI Login CQE
 */
struct bnx2i_login_response {
#if defined(__BIG_ENDIAN)
	u8 op_code;
	u8 response_flags;
#define ISCSI_LOGIN_RESPONSE_NEXT_STAGE (0x3<<0)
#define ISCSI_LOGIN_RESPONSE_NEXT_STAGE_SHIFT 0
#define ISCSI_LOGIN_RESPONSE_CURRENT_STAGE (0x3<<2)
#define ISCSI_LOGIN_RESPONSE_CURRENT_STAGE_SHIFT 2
#define ISCSI_LOGIN_RESPONSE_RESERVED0 (0x3<<4)
#define ISCSI_LOGIN_RESPONSE_RESERVED0_SHIFT 4
#define ISCSI_LOGIN_RESPONSE_CONT (0x1<<6)
#define ISCSI_LOGIN_RESPONSE_CONT_SHIFT 6
#define ISCSI_LOGIN_RESPONSE_TRANSIT (0x1<<7)
#define ISCSI_LOGIN_RESPONSE_TRANSIT_SHIFT 7
	u8 version_max;
	u8 version_active;
#elif defined(__LITTLE_ENDIAN)
	u8 version_active;
	u8 version_max;
	u8 response_flags;
#define ISCSI_LOGIN_RESPONSE_NEXT_STAGE (0x3<<0)
#define ISCSI_LOGIN_RESPONSE_NEXT_STAGE_SHIFT 0
#define ISCSI_LOGIN_RESPONSE_CURRENT_STAGE (0x3<<2)
#define ISCSI_LOGIN_RESPONSE_CURRENT_STAGE_SHIFT 2
#define ISCSI_LOGIN_RESPONSE_RESERVED0 (0x3<<4)
#define ISCSI_LOGIN_RESPONSE_RESERVED0_SHIFT 4
#define ISCSI_LOGIN_RESPONSE_CONT (0x1<<6)
#define ISCSI_LOGIN_RESPONSE_CONT_SHIFT 6
#define ISCSI_LOGIN_RESPONSE_TRANSIT (0x1<<7)
#define ISCSI_LOGIN_RESPONSE_TRANSIT_SHIFT 7
	u8 op_code;
#endif
	u32 data_length;
	u32 exp_cmd_sn;
	u32 max_cmd_sn;
	u32 reserved1[2];
#if defined(__BIG_ENDIAN)
	u16 reserved3;
	u8 err_code;
	u8 reserved2;
#elif defined(__LITTLE_ENDIAN)
	u8 reserved2;
	u8 err_code;
	u16 reserved3;
#endif
	u32 stat_sn;
	u32 isid_lo;
#if defined(__BIG_ENDIAN)
	u16 isid_hi;
	u16 tsih;
#elif defined(__LITTLE_ENDIAN)
	u16 tsih;
	u16 isid_hi;
#endif
#if defined(__BIG_ENDIAN)
	u8 status_class;
	u8 status_detail;
	u16 reserved4;
#elif defined(__LITTLE_ENDIAN)
	u16 reserved4;
	u8 status_detail;
	u8 status_class;
#endif
	u32 reserved5[3];
#if defined(__BIG_ENDIAN)
	u16 reserved6;
	u16 itt;
#define ISCSI_LOGIN_RESPONSE_INDEX (0x3FFF<<0)
#define ISCSI_LOGIN_RESPONSE_INDEX_SHIFT 0
#define ISCSI_LOGIN_RESPONSE_TYPE (0x3<<14)
#define ISCSI_LOGIN_RESPONSE_TYPE_SHIFT 14
#elif defined(__LITTLE_ENDIAN)
	u16 itt;
#define ISCSI_LOGIN_RESPONSE_INDEX (0x3FFF<<0)
#define ISCSI_LOGIN_RESPONSE_INDEX_SHIFT 0
#define ISCSI_LOGIN_RESPONSE_TYPE (0x3<<14)
#define ISCSI_LOGIN_RESPONSE_TYPE_SHIFT 14
	u16 reserved6;
#endif
	u32 cq_req_sn;
};


/*
 * iSCSI Logout SQ WQE
 */
struct bnx2i_logout_request {
#if defined(__BIG_ENDIAN)
	u8 op_code;
	u8 op_attr;
#define ISCSI_LOGOUT_REQUEST_REASON (0x7F<<0)
#define ISCSI_LOGOUT_REQUEST_REASON_SHIFT 0
#define ISCSI_LOGOUT_REQUEST_ALWAYS_ONE (0x1<<7)
#define ISCSI_LOGOUT_REQUEST_ALWAYS_ONE_SHIFT 7
	u16 reserved0;
#elif defined(__LITTLE_ENDIAN)
	u16 reserved0;
	u8 op_attr;
#define ISCSI_LOGOUT_REQUEST_REASON (0x7F<<0)
#define ISCSI_LOGOUT_REQUEST_REASON_SHIFT 0
#define ISCSI_LOGOUT_REQUEST_ALWAYS_ONE (0x1<<7)
#define ISCSI_LOGOUT_REQUEST_ALWAYS_ONE_SHIFT 7
	u8 op_code;
#endif
	u32 data_length;
	u32 reserved1[2];
#if defined(__BIG_ENDIAN)
	u16 reserved2;
	u16 itt;
#define ISCSI_LOGOUT_REQUEST_INDEX (0x3FFF<<0)
#define ISCSI_LOGOUT_REQUEST_INDEX_SHIFT 0
#define ISCSI_LOGOUT_REQUEST_TYPE (0x3<<14)
#define ISCSI_LOGOUT_REQUEST_TYPE_SHIFT 14
#elif defined(__LITTLE_ENDIAN)
	u16 itt;
#define ISCSI_LOGOUT_REQUEST_INDEX (0x3FFF<<0)
#define ISCSI_LOGOUT_REQUEST_INDEX_SHIFT 0
#define ISCSI_LOGOUT_REQUEST_TYPE (0x3<<14)
#define ISCSI_LOGOUT_REQUEST_TYPE_SHIFT 14
	u16 reserved2;
#endif
#if defined(__BIG_ENDIAN)
	u16 cid;
	u16 reserved3;
#elif defined(__LITTLE_ENDIAN)
	u16 reserved3;
	u16 cid;
#endif
	u32 cmd_sn;
	u32 reserved4[5];
	u32 zero_fill;
	u32 bd_list_addr_lo;
	u32 bd_list_addr_hi;
#if defined(__BIG_ENDIAN)
	u8 cq_index;
	u8 reserved6;
	u8 reserved5;
	u8 num_bds;
#elif defined(__LITTLE_ENDIAN)
	u8 num_bds;
	u8 reserved5;
	u8 reserved6;
	u8 cq_index;
#endif
};


/*
 * iSCSI Logout CQE
 */
struct bnx2i_logout_response {
#if defined(__BIG_ENDIAN)
	u8 op_code;
	u8 reserved1;
	u8 response;
	u8 reserved0;
#elif defined(__LITTLE_ENDIAN)
	u8 reserved0;
	u8 response;
	u8 reserved1;
	u8 op_code;
#endif
	u32 reserved2;
	u32 exp_cmd_sn;
	u32 max_cmd_sn;
	u32 reserved3[2];
#if defined(__BIG_ENDIAN)
	u16 reserved5;
	u8 err_code;
	u8 reserved4;
#elif defined(__LITTLE_ENDIAN)
	u8 reserved4;
	u8 err_code;
	u16 reserved5;
#endif
	u32 reserved6[3];
#if defined(__BIG_ENDIAN)
	u16 time_to_wait;
	u16 time_to_retain;
#elif defined(__LITTLE_ENDIAN)
	u16 time_to_retain;
	u16 time_to_wait;
#endif
	u32 reserved7[3];
#if defined(__BIG_ENDIAN)
	u16 reserved8;
	u16 itt;
#define ISCSI_LOGOUT_RESPONSE_INDEX (0x3FFF<<0)
#define ISCSI_LOGOUT_RESPONSE_INDEX_SHIFT 0
#define ISCSI_LOGOUT_RESPONSE_TYPE (0x3<<14)
#define ISCSI_LOGOUT_RESPONSE_TYPE_SHIFT 14
#elif defined(__LITTLE_ENDIAN)
	u16 itt;
#define ISCSI_LOGOUT_RESPONSE_INDEX (0x3FFF<<0)
#define ISCSI_LOGOUT_RESPONSE_INDEX_SHIFT 0
#define ISCSI_LOGOUT_RESPONSE_TYPE (0x3<<14)
#define ISCSI_LOGOUT_RESPONSE_TYPE_SHIFT 14
	u16 reserved8;
#endif
	u32 cq_req_sn;
};


/*
 * iSCSI Nop-In CQE
 */
struct bnx2i_nop_in_msg {
#if defined(__BIG_ENDIAN)
	u8 op_code;
	u8 reserved1;
	u16 reserved0;
#elif defined(__LITTLE_ENDIAN)
	u16 reserved0;
	u8 reserved1;
	u8 op_code;
#endif
	u32 data_length;
	u32 exp_cmd_sn;
	u32 max_cmd_sn;
	u32 ttt;
	u32 reserved2;
#if defined(__BIG_ENDIAN)
	u16 reserved4;
	u8 err_code;
	u8 reserved3;
#elif defined(__LITTLE_ENDIAN)
	u8 reserved3;
	u8 err_code;
	u16 reserved4;
#endif
	u32 reserved5;
	u32 lun[2];
	u32 reserved6[4];
#if defined(__BIG_ENDIAN)
	u16 reserved7;
	u16 itt;
#define ISCSI_NOP_IN_MSG_INDEX (0x3FFF<<0)
#define ISCSI_NOP_IN_MSG_INDEX_SHIFT 0
#define ISCSI_NOP_IN_MSG_TYPE (0x3<<14)
#define ISCSI_NOP_IN_MSG_TYPE_SHIFT 14
#elif defined(__LITTLE_ENDIAN)
	u16 itt;
#define ISCSI_NOP_IN_MSG_INDEX (0x3FFF<<0)
#define ISCSI_NOP_IN_MSG_INDEX_SHIFT 0
#define ISCSI_NOP_IN_MSG_TYPE (0x3<<14)
#define ISCSI_NOP_IN_MSG_TYPE_SHIFT 14
	u16 reserved7;
#endif
	u32 cq_req_sn;
};


/*
 * iSCSI NOP-OUT SQ WQE
 */
struct bnx2i_nop_out_request {
#if defined(__BIG_ENDIAN)
	u8 op_code;
	u8 op_attr;
#define ISCSI_NOP_OUT_REQUEST_RESERVED1 (0x7F<<0)
#define ISCSI_NOP_OUT_REQUEST_RESERVED1_SHIFT 0
#define ISCSI_NOP_OUT_REQUEST_ALWAYS_ONE (0x1<<7)
#define ISCSI_NOP_OUT_REQUEST_ALWAYS_ONE_SHIFT 7
	u16 reserved0;
#elif defined(__LITTLE_ENDIAN)
	u16 reserved0;
	u8 op_attr;
#define ISCSI_NOP_OUT_REQUEST_RESERVED1 (0x7F<<0)
#define ISCSI_NOP_OUT_REQUEST_RESERVED1_SHIFT 0
#define ISCSI_NOP_OUT_REQUEST_ALWAYS_ONE (0x1<<7)
#define ISCSI_NOP_OUT_REQUEST_ALWAYS_ONE_SHIFT 7
	u8 op_code;
#endif
	u32 data_length;
	u32 lun[2];
#if defined(__BIG_ENDIAN)
	u16 reserved2;
	u16 itt;
#define ISCSI_NOP_OUT_REQUEST_INDEX (0x3FFF<<0)
#define ISCSI_NOP_OUT_REQUEST_INDEX_SHIFT 0
#define ISCSI_NOP_OUT_REQUEST_TYPE (0x3<<14)
#define ISCSI_NOP_OUT_REQUEST_TYPE_SHIFT 14
#elif defined(__LITTLE_ENDIAN)
	u16 itt;
#define ISCSI_NOP_OUT_REQUEST_INDEX (0x3FFF<<0)
#define ISCSI_NOP_OUT_REQUEST_INDEX_SHIFT 0
#define ISCSI_NOP_OUT_REQUEST_TYPE (0x3<<14)
#define ISCSI_NOP_OUT_REQUEST_TYPE_SHIFT 14
	u16 reserved2;
#endif
	u32 ttt;
	u32 cmd_sn;
	u32 reserved3[2];
	u32 resp_bd_list_addr_lo;
	u32 resp_bd_list_addr_hi;
	u32 resp_buffer;
#define ISCSI_NOP_OUT_REQUEST_RESP_BUFFER_LENGTH (0xFFFFFF<<0)
#define ISCSI_NOP_OUT_REQUEST_RESP_BUFFER_LENGTH_SHIFT 0
#define ISCSI_NOP_OUT_REQUEST_NUM_RESP_BDS (0xFF<<24)
#define ISCSI_NOP_OUT_REQUEST_NUM_RESP_BDS_SHIFT 24
#if defined(__BIG_ENDIAN)
	u16 reserved7;
	u8 reserved6;
	u8 flags;
#define ISCSI_NOP_OUT_REQUEST_RESERVED4 (0x1<<0)
#define ISCSI_NOP_OUT_REQUEST_RESERVED4_SHIFT 0
#define ISCSI_NOP_OUT_REQUEST_LOCAL_COMPLETION (0x1<<1)
#define ISCSI_NOP_OUT_REQUEST_LOCAL_COMPLETION_SHIFT 1
#define ISCSI_NOP_OUT_REQUEST_ZERO_FILL (0x3F<<2)
#define ISCSI_NOP_OUT_REQUEST_ZERO_FILL_SHIFT 2
#elif defined(__LITTLE_ENDIAN)
	u8 flags;
#define ISCSI_NOP_OUT_REQUEST_RESERVED4 (0x1<<0)
#define ISCSI_NOP_OUT_REQUEST_RESERVED4_SHIFT 0
#define ISCSI_NOP_OUT_REQUEST_LOCAL_COMPLETION (0x1<<1)
#define ISCSI_NOP_OUT_REQUEST_LOCAL_COMPLETION_SHIFT 1
#define ISCSI_NOP_OUT_REQUEST_ZERO_FILL (0x3F<<2)
#define ISCSI_NOP_OUT_REQUEST_ZERO_FILL_SHIFT 2
	u8 reserved6;
	u16 reserved7;
#endif
	u32 bd_list_addr_lo;
	u32 bd_list_addr_hi;
#if defined(__BIG_ENDIAN)
	u8 cq_index;
	u8 reserved9;
	u8 reserved8;
	u8 num_bds;
#elif defined(__LITTLE_ENDIAN)
	u8 num_bds;
	u8 reserved8;
	u8 reserved9;
	u8 cq_index;
#endif
};

/*
 * iSCSI Reject CQE
 */
struct bnx2i_reject_msg {
#if defined(__BIG_ENDIAN)
	u8 op_code;
	u8 reserved1;
	u8 reason;
	u8 reserved0;
#elif defined(__LITTLE_ENDIAN)
	u8 reserved0;
	u8 reason;
	u8 reserved1;
	u8 op_code;
#endif
	u32 data_length;
	u32 exp_cmd_sn;
	u32 max_cmd_sn;
	u32 reserved2[2];
#if defined(__BIG_ENDIAN)
	u16 reserved4;
	u8 err_code;
	u8 reserved3;
#elif defined(__LITTLE_ENDIAN)
	u8 reserved3;
	u8 err_code;
	u16 reserved4;
#endif
	u32 reserved5[8];
	u32 cq_req_sn;
};

/*
 * bnx2i iSCSI TMF SQ WQE
 */
struct bnx2i_tmf_request {
#if defined(__BIG_ENDIAN)
	u8 op_code;
	u8 op_attr;
#define ISCSI_TMF_REQUEST_FUNCTION (0x7F<<0)
#define ISCSI_TMF_REQUEST_FUNCTION_SHIFT 0
#define ISCSI_TMF_REQUEST_ALWAYS_ONE (0x1<<7)
#define ISCSI_TMF_REQUEST_ALWAYS_ONE_SHIFT 7
	u16 reserved0;
#elif defined(__LITTLE_ENDIAN)
	u16 reserved0;
	u8 op_attr;
#define ISCSI_TMF_REQUEST_FUNCTION (0x7F<<0)
#define ISCSI_TMF_REQUEST_FUNCTION_SHIFT 0
#define ISCSI_TMF_REQUEST_ALWAYS_ONE (0x1<<7)
#define ISCSI_TMF_REQUEST_ALWAYS_ONE_SHIFT 7
	u8 op_code;
#endif
	u32 data_length;
	u32 lun[2];
#if defined(__BIG_ENDIAN)
	u16 reserved1;
	u16 itt;
#define ISCSI_TMF_REQUEST_INDEX (0x3FFF<<0)
#define ISCSI_TMF_REQUEST_INDEX_SHIFT 0
#define ISCSI_TMF_REQUEST_TYPE (0x3<<14)
#define ISCSI_TMF_REQUEST_TYPE_SHIFT 14
#elif defined(__LITTLE_ENDIAN)
	u16 itt;
#define ISCSI_TMF_REQUEST_INDEX (0x3FFF<<0)
#define ISCSI_TMF_REQUEST_INDEX_SHIFT 0
#define ISCSI_TMF_REQUEST_TYPE (0x3<<14)
#define ISCSI_TMF_REQUEST_TYPE_SHIFT 14
	u16 reserved1;
#endif
	u32 ref_itt;
	u32 cmd_sn;
	u32 reserved2;
	u32 ref_cmd_sn;
	u32 reserved3[3];
	u32 zero_fill;
	u32 bd_list_addr_lo;
	u32 bd_list_addr_hi;
#if defined(__BIG_ENDIAN)
	u8 cq_index;
	u8 reserved5;
	u8 reserved4;
	u8 num_bds;
#elif defined(__LITTLE_ENDIAN)
	u8 num_bds;
	u8 reserved4;
	u8 reserved5;
	u8 cq_index;
#endif
};

/*
 * iSCSI Text SQ WQE
 */
struct bnx2i_text_request {
#if defined(__BIG_ENDIAN)
	u8 op_code;
	u8 op_attr;
#define ISCSI_TEXT_REQUEST_RESERVED1 (0x3F<<0)
#define ISCSI_TEXT_REQUEST_RESERVED1_SHIFT 0
#define ISCSI_TEXT_REQUEST_CONT (0x1<<6)
#define ISCSI_TEXT_REQUEST_CONT_SHIFT 6
#define ISCSI_TEXT_REQUEST_FINAL (0x1<<7)
#define ISCSI_TEXT_REQUEST_FINAL_SHIFT 7
	u16 reserved0;
#elif defined(__LITTLE_ENDIAN)
	u16 reserved0;
	u8 op_attr;
#define ISCSI_TEXT_REQUEST_RESERVED1 (0x3F<<0)
#define ISCSI_TEXT_REQUEST_RESERVED1_SHIFT 0
#define ISCSI_TEXT_REQUEST_CONT (0x1<<6)
#define ISCSI_TEXT_REQUEST_CONT_SHIFT 6
#define ISCSI_TEXT_REQUEST_FINAL (0x1<<7)
#define ISCSI_TEXT_REQUEST_FINAL_SHIFT 7
	u8 op_code;
#endif
	u32 data_length;
	u32 lun[2];
#if defined(__BIG_ENDIAN)
	u16 reserved3;
	u16 itt;
#define ISCSI_TEXT_REQUEST_INDEX (0x3FFF<<0)
#define ISCSI_TEXT_REQUEST_INDEX_SHIFT 0
#define ISCSI_TEXT_REQUEST_TYPE (0x3<<14)
#define ISCSI_TEXT_REQUEST_TYPE_SHIFT 14
#elif defined(__LITTLE_ENDIAN)
	u16 itt;
#define ISCSI_TEXT_REQUEST_INDEX (0x3FFF<<0)
#define ISCSI_TEXT_REQUEST_INDEX_SHIFT 0
#define ISCSI_TEXT_REQUEST_TYPE (0x3<<14)
#define ISCSI_TEXT_REQUEST_TYPE_SHIFT 14
	u16 reserved3;
#endif
	u32 ttt;
	u32 cmd_sn;
	u32 reserved4[2];
	u32 resp_bd_list_addr_lo;
	u32 resp_bd_list_addr_hi;
	u32 resp_buffer;
#define ISCSI_TEXT_REQUEST_RESP_BUFFER_LENGTH (0xFFFFFF<<0)
#define ISCSI_TEXT_REQUEST_RESP_BUFFER_LENGTH_SHIFT 0
#define ISCSI_TEXT_REQUEST_NUM_RESP_BDS (0xFF<<24)
#define ISCSI_TEXT_REQUEST_NUM_RESP_BDS_SHIFT 24
	u32 zero_fill;
	u32 bd_list_addr_lo;
	u32 bd_list_addr_hi;
#if defined(__BIG_ENDIAN)
	u8 cq_index;
	u8 reserved7;
	u8 reserved6;
	u8 num_bds;
#elif defined(__LITTLE_ENDIAN)
	u8 num_bds;
	u8 reserved6;
	u8 reserved7;
	u8 cq_index;
#endif
};

/*
 * iSCSI SQ WQE
 */
union iscsi_request {
	struct bnx2i_cmd_request cmd;
	struct bnx2i_tmf_request tmf;
	struct bnx2i_nop_out_request nop_out;
	struct bnx2i_login_request login_req;
	struct bnx2i_text_request text;
	struct bnx2i_logout_request logout_req;
	struct bnx2i_cleanup_request cleanup;
};


/*
 * iSCSI TMF CQE
 */
struct bnx2i_tmf_response {
#if defined(__BIG_ENDIAN)
	u8 op_code;
	u8 reserved1;
	u8 response;
	u8 reserved0;
#elif defined(__LITTLE_ENDIAN)
	u8 reserved0;
	u8 response;
	u8 reserved1;
	u8 op_code;
#endif
	u32 reserved2;
	u32 exp_cmd_sn;
	u32 max_cmd_sn;
	u32 reserved3[2];
#if defined(__BIG_ENDIAN)
	u16 reserved5;
	u8 err_code;
	u8 reserved4;
#elif defined(__LITTLE_ENDIAN)
	u8 reserved4;
	u8 err_code;
	u16 reserved5;
#endif
	u32 reserved6[7];
#if defined(__BIG_ENDIAN)
	u16 reserved7;
	u16 itt;
#define ISCSI_TMF_RESPONSE_INDEX (0x3FFF<<0)
#define ISCSI_TMF_RESPONSE_INDEX_SHIFT 0
#define ISCSI_TMF_RESPONSE_TYPE (0x3<<14)
#define ISCSI_TMF_RESPONSE_TYPE_SHIFT 14
#elif defined(__LITTLE_ENDIAN)
	u16 itt;
#define ISCSI_TMF_RESPONSE_INDEX (0x3FFF<<0)
#define ISCSI_TMF_RESPONSE_INDEX_SHIFT 0
#define ISCSI_TMF_RESPONSE_TYPE (0x3<<14)
#define ISCSI_TMF_RESPONSE_TYPE_SHIFT 14
	u16 reserved7;
#endif
	u32 cq_req_sn;
};

/*
 * iSCSI Text CQE
 */
struct bnx2i_text_response {
#if defined(__BIG_ENDIAN)
	u8 op_code;
	u8 response_flags;
#define ISCSI_TEXT_RESPONSE_RESERVED1 (0x3F<<0)
#define ISCSI_TEXT_RESPONSE_RESERVED1_SHIFT 0
#define ISCSI_TEXT_RESPONSE_CONT (0x1<<6)
#define ISCSI_TEXT_RESPONSE_CONT_SHIFT 6
#define ISCSI_TEXT_RESPONSE_FINAL (0x1<<7)
#define ISCSI_TEXT_RESPONSE_FINAL_SHIFT 7
	u16 reserved0;
#elif defined(__LITTLE_ENDIAN)
	u16 reserved0;
	u8 response_flags;
#define ISCSI_TEXT_RESPONSE_RESERVED1 (0x3F<<0)
#define ISCSI_TEXT_RESPONSE_RESERVED1_SHIFT 0
#define ISCSI_TEXT_RESPONSE_CONT (0x1<<6)
#define ISCSI_TEXT_RESPONSE_CONT_SHIFT 6
#define ISCSI_TEXT_RESPONSE_FINAL (0x1<<7)
#define ISCSI_TEXT_RESPONSE_FINAL_SHIFT 7
	u8 op_code;
#endif
	u32 data_length;
	u32 exp_cmd_sn;
	u32 max_cmd_sn;
	u32 ttt;
	u32 reserved2;
#if defined(__BIG_ENDIAN)
	u16 reserved4;
	u8 err_code;
	u8 reserved3;
#elif defined(__LITTLE_ENDIAN)
	u8 reserved3;
	u8 err_code;
	u16 reserved4;
#endif
	u32 reserved5;
	u32 lun[2];
	u32 reserved6[4];
#if defined(__BIG_ENDIAN)
	u16 reserved7;
	u16 itt;
#define ISCSI_TEXT_RESPONSE_INDEX (0x3FFF<<0)
#define ISCSI_TEXT_RESPONSE_INDEX_SHIFT 0
#define ISCSI_TEXT_RESPONSE_TYPE (0x3<<14)
#define ISCSI_TEXT_RESPONSE_TYPE_SHIFT 14
#elif defined(__LITTLE_ENDIAN)
	u16 itt;
#define ISCSI_TEXT_RESPONSE_INDEX (0x3FFF<<0)
#define ISCSI_TEXT_RESPONSE_INDEX_SHIFT 0
#define ISCSI_TEXT_RESPONSE_TYPE (0x3<<14)
#define ISCSI_TEXT_RESPONSE_TYPE_SHIFT 14
	u16 reserved7;
#endif
	u32 cq_req_sn;
};

/*
 * iSCSI CQE
 */
union iscsi_response {
	struct bnx2i_cmd_response cmd;
	struct bnx2i_tmf_response tmf;
	struct bnx2i_login_response login_resp;
	struct bnx2i_text_response text;
	struct bnx2i_logout_response logout_resp;
	struct bnx2i_cleanup_response cleanup;
	struct bnx2i_reject_msg reject;
	struct bnx2i_async_msg async;
	struct bnx2i_nop_in_msg nop_in;
};

#endif /* __57XX_ISCSI_HSI_LINUX_LE__ */