summaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/omap3-cm-t3x30.dtsi
blob: d00055809e31d79b9d1730c06efe02c7e2e6f747 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
/*
 * Common support for CompuLab CM-T3x30 CoMs
 */

#include "omap3-cm-t3x.dtsi"

/ {
	cpus {
		cpu@0 {
			cpu0-supply = <&vcc>;
		};
	};

	vddvario: regulator-vddvario {
		compatible = "regulator-fixed";
		regulator-name = "vddvario";
		regulator-always-on;
	};

	vdd33a: regulator-vdd33a {
		compatible = "regulator-fixed";
		regulator-name = "vdd33a";
		regulator-always-on;
	};
};

&omap3_pmx_core {

	smsc1_pins: pinmux_smsc1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x20b8, PIN_OUTPUT | MUX_MODE0)	/* gpmc_ncs5.gpmc_ncs5 */
			OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLUP | MUX_MODE4)	/* uart3_cts_rctx.gpio_163 */
		>;
	};

 	hsusb0_pins: pinmux_hsusb0_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)		/* hsusb0_clk.hsusb0_clk */
			OMAP3_CORE1_IOPAD(0x21a2, PIN_OUTPUT | MUX_MODE0)		/* hsusb0_stp.hsusb0_stp */
			OMAP3_CORE1_IOPAD(0x21a4, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* hsusb0_dir.hsusb0_dir */
			OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* hsusb0_nxt.hsusb0_nxt */
			OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* hsusb0_data0.hsusb2_data0 */
			OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* hsusb0_data1.hsusb0_data1 */
			OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* hsusb0_data2.hsusb0_data2 */
			OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* hsusb0_data7.hsusb0_data3 */
			OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* hsusb0_data7.hsusb0_data4 */
			OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* hsusb0_data7.hsusb0_data5 */
			OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* hsusb0_data7.hsusb0_data6 */
			OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* hsusb0_data7.hsusb0_data7 */
		>;
	};
};

&gpmc {
	ranges = <5 0 0x2c000000 0x01000000>;

	smsc1: ethernet@5,0 {
		compatible = "smsc,lan9221", "smsc,lan9115";
		pinctrl-names = "default";
		pinctrl-0 = <&smsc1_pins>;
		interrupt-parent = <&gpio6>;
		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
		reg = <5 0 0xff>;
		bank-width = <2>;
		gpmc,mux-add-data;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <186>;
		gpmc,cs-wr-off-ns = <186>;
		gpmc,adv-on-ns = <12>;
		gpmc,adv-rd-off-ns = <48>;
		gpmc,adv-wr-off-ns = <48>;
		gpmc,oe-on-ns = <54>;
		gpmc,oe-off-ns = <168>;
		gpmc,we-on-ns = <54>;
		gpmc,we-off-ns = <168>;
		gpmc,rd-cycle-ns = <186>;
		gpmc,wr-cycle-ns = <186>;
		gpmc,access-ns = <114>;
		gpmc,page-burst-access-ns = <6>;
		gpmc,bus-turnaround-ns = <12>;
		gpmc,cycle2cycle-delay-ns = <18>;
		gpmc,wr-data-mux-bus-ns = <90>;
		gpmc,wr-access-ns = <186>;
		gpmc,cycle2cycle-samecsen;
		gpmc,cycle2cycle-diffcsen;
		vddvario-supply = <&vddvario>;
		vdd33a-supply = <&vdd33a>;
		reg-io-width = <4>;
		smsc,save-mac-address;
	};
};

&i2c1 {
	twl: twl@48 {
		reg = <0x48>;
		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
		interrupt-parent = <&intc>;
	};
};

#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"

&mmc1 {
	vmmc-supply = <&vmmc1>;
};

&twl_gpio {
	ti,use-leds;
	/* pullups: BIT(0) */
	ti,pullups = <0x000001>;
};

&hsusb1_phy {
	reset-gpios = <&twl_gpio 6 GPIO_ACTIVE_LOW>;
};

&hsusb2_phy {
	reset-gpios = <&twl_gpio 7 GPIO_ACTIVE_LOW>;
};

&usb_otg_hs {
	pinctrl-names = "default";
	pinctrl-0 = <&hsusb0_pins>;
	interface-type = <0>;
	usb-phy = <&usb2_phy>;
	phys = <&usb2_phy>;
	phy-names = "usb2-phy";
	mode = <3>;
	power = <50>;
};