diff options
Diffstat (limited to 'arch/arm/mach-at91')
29 files changed, 357 insertions, 1201 deletions
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 2395c68b3e32..c74a44324e5b 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -6,15 +6,6 @@ config HAVE_AT91_UTMI config HAVE_AT91_USB_CLK bool -config HAVE_AT91_DBGU0 - bool - -config HAVE_AT91_DBGU1 - bool - -config HAVE_AT91_DBGU2 - bool - config COMMON_CLK_AT91 bool select COMMON_CLK @@ -25,15 +16,6 @@ config HAVE_AT91_SMD config HAVE_AT91_H32MX bool -config SOC_AT91SAM9 - bool - select ATMEL_AIC_IRQ - select COMMON_CLK_AT91 - select CPU_ARM926T - select GENERIC_CLOCKEVENTS - select MEMORY - select ATMEL_SDRAMC - config SOC_SAMA5 bool select ATMEL_AIC5_IRQ @@ -70,7 +52,6 @@ config SOC_SAMA5D3 bool "SAMA5D3 family" select SOC_SAMA5 select HAVE_FB_ATMEL - select HAVE_AT91_DBGU1 select HAVE_AT91_UTMI select HAVE_AT91_SMD select HAVE_AT91_USB_CLK @@ -81,10 +62,8 @@ config SOC_SAMA5D3 config SOC_SAMA5D4 bool "SAMA5D4 family" select SOC_SAMA5 - select HAVE_AT91_DBGU2 select CLKSRC_MMIO select CACHE_L2X0 - select CACHE_PL310 select HAVE_FB_ATMEL select HAVE_AT91_UTMI select HAVE_AT91_SMD @@ -101,91 +80,45 @@ config SOC_AT91RM9200 select COMMON_CLK_AT91 select CPU_ARM920T select GENERIC_CLOCKEVENTS - select HAVE_AT91_DBGU0 - select HAVE_AT91_USB_CLK - -config SOC_AT91SAM9260 - bool "AT91SAM9260, AT91SAM9XE or AT91SAM9G20" - select HAVE_AT91_DBGU0 - select SOC_AT91SAM9 - select HAVE_AT91_USB_CLK - help - Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE - or AT91SAM9G20 SoC. - -config SOC_AT91SAM9261 - bool "AT91SAM9261 or AT91SAM9G10" - select HAVE_AT91_DBGU0 - select HAVE_FB_ATMEL - select SOC_AT91SAM9 - select HAVE_AT91_USB_CLK - help - Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC. - -config SOC_AT91SAM9263 - bool "AT91SAM9263" - select HAVE_AT91_DBGU1 - select HAVE_FB_ATMEL - select SOC_AT91SAM9 select HAVE_AT91_USB_CLK -config SOC_AT91SAM9RL - bool "AT91SAM9RL" - select HAVE_AT91_DBGU0 - select HAVE_FB_ATMEL - select SOC_AT91SAM9 - select HAVE_AT91_UTMI - -config SOC_AT91SAM9G45 - bool "AT91SAM9G45 or AT91SAM9M10 families" - select HAVE_AT91_DBGU1 - select HAVE_FB_ATMEL - select SOC_AT91SAM9 - select HAVE_AT91_UTMI - select HAVE_AT91_USB_CLK - help - Select this if you are using one of Atmel's AT91SAM9G45 family SoC. - This support covers AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11. - -config SOC_AT91SAM9X5 - bool "AT91SAM9x5 family" - select HAVE_AT91_DBGU0 - select HAVE_FB_ATMEL - select SOC_AT91SAM9 - select HAVE_AT91_UTMI +config SOC_AT91SAM9 + bool "AT91SAM9" + select ATMEL_AIC_IRQ + select ATMEL_SDRAMC + select COMMON_CLK_AT91 + select CPU_ARM926T + select GENERIC_CLOCKEVENTS select HAVE_AT91_SMD select HAVE_AT91_USB_CLK - help - Select this if you are using one of Atmel's AT91SAM9x5 family SoC. - This means that your SAM9 name finishes with a '5' (except if it is - AT91SAM9G45!). - This support covers AT91SAM9G15, AT91SAM9G25, AT91SAM9X25, AT91SAM9G35 - and AT91SAM9X35. - -config SOC_AT91SAM9N12 - bool "AT91SAM9N12 family" - select HAVE_AT91_DBGU0 + select HAVE_AT91_UTMI select HAVE_FB_ATMEL - select SOC_AT91SAM9 - select HAVE_AT91_USB_CLK + select MEMORY help - Select this if you are using Atmel's AT91SAM9N12 SoC. - -# ---------------------------------------------------------- + Select this if you are using one of those Atmel SoC: + AT91SAM9260 + AT91SAM9261 + AT91SAM9263 + AT91SAM9G15 + AT91SAM9G20 + AT91SAM9G25 + AT91SAM9G35 + AT91SAM9G45 + AT91SAM9G46 + AT91SAM9M10 + AT91SAM9M11 + AT91SAM9N12 + AT91SAM9RL + AT91SAM9X25 + AT91SAM9X35 + AT91SAM9XE endif # SOC_SAM_V4_V5 -config MACH_AT91RM9200_DT - def_bool SOC_AT91RM9200 - -config MACH_AT91SAM9_DT - def_bool SOC_AT91SAM9 - -# ---------------------------------------------------------- - comment "AT91 Feature Selections" config AT91_SLOW_CLOCK bool "Suspend-to-RAM disables main oscillator" + select SRAM depends on SUSPEND help Select this if you want Suspend-to-RAM to save the most power diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 7b6424d40764..827fdbcce1c7 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -2,28 +2,14 @@ # Makefile for the linux kernel. # -obj-y := setup.o sysirq_mask.o +obj-y := setup.o obj-$(CONFIG_SOC_AT91SAM9) += sam9_smc.o # CPU-specific support obj-$(CONFIG_SOC_AT91RM9200) += at91rm9200.o at91rm9200_time.o -obj-$(CONFIG_SOC_AT91SAM9260) += at91sam9260.o -obj-$(CONFIG_SOC_AT91SAM9261) += at91sam9261.o -obj-$(CONFIG_SOC_AT91SAM9263) += at91sam9263.o -obj-$(CONFIG_SOC_AT91SAM9G45) += at91sam9g45.o -obj-$(CONFIG_SOC_AT91SAM9N12) += at91sam9n12.o -obj-$(CONFIG_SOC_AT91SAM9X5) += at91sam9x5.o -obj-$(CONFIG_SOC_AT91SAM9RL) += at91sam9rl.o -obj-$(CONFIG_SOC_SAMA5D3) += sama5d3.o -obj-$(CONFIG_SOC_SAMA5D4) += sama5d4.o - -# AT91SAM board with device-tree -obj-$(CONFIG_MACH_AT91RM9200_DT) += board-dt-rm9200.o -obj-$(CONFIG_MACH_AT91SAM9_DT) += board-dt-sam9.o - -# SAMA5 board with device-tree -obj-$(CONFIG_SOC_SAMA5) += board-dt-sama5.o +obj-$(CONFIG_SOC_AT91SAM9) += at91sam9.o +obj-$(CONFIG_SOC_SAMA5) += sama5.o # Power Management obj-$(CONFIG_PM) += pm.o diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c index b52916947535..8fcfb70f7124 100644 --- a/arch/arm/mach-at91/at91rm9200.c +++ b/arch/arm/mach-at91/at91rm9200.c @@ -1,35 +1,33 @@ /* - * arch/arm/mach-at91/at91rm9200.c + * Setup code for AT91RM9200 * - * Copyright (C) 2005 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. + * Copyright (C) 2011 Atmel, + * 2011 Nicolas Ferre <nicolas.ferre@atmel.com> + * 2012 Joachim Eastwood <manabian@gmail.com> * + * Licensed under GPLv2 or later. */ +#include <linux/types.h> +#include <linux/init.h> #include <linux/module.h> -#include <linux/clk/at91_pmc.h> +#include <linux/gpio.h> +#include <linux/of.h> +#include <linux/of_irq.h> +#include <linux/of_platform.h> +#include <linux/clk-provider.h> +#include <asm/setup.h> +#include <asm/irq.h> +#include <asm/mach/arch.h> #include <asm/mach/map.h> +#include <asm/mach/irq.h> #include <asm/system_misc.h> + #include <mach/at91_st.h> -#include <mach/hardware.h> -#include "soc.h" #include "generic.h" -static void at91rm9200_idle(void) -{ - /* - * Disable the processor clock. The processor will be automatically - * re-enabled by an interrupt or by a reset. - */ - at91_pmc_write(AT91_PMC_SCDR, AT91_PMC_PCK); -} - static void at91rm9200_restart(enum reboot_mode reboot_mode, const char *cmd) { /* @@ -39,23 +37,31 @@ static void at91rm9200_restart(enum reboot_mode reboot_mode, const char *cmd) at91_st_write(AT91_ST_CR, AT91_ST_WDRST); } -/* -------------------------------------------------------------------- - * AT91RM9200 processor initialization - * -------------------------------------------------------------------- */ -static void __init at91rm9200_map_io(void) +static void __init at91rm9200_dt_timer_init(void) { - /* Map peripherals */ - at91_init_sram(0, AT91RM9200_SRAM_BASE, AT91RM9200_SRAM_SIZE); + of_clk_init(NULL); + at91rm9200_timer_init(); } -static void __init at91rm9200_initialize(void) +static void __init at91rm9200_dt_device_init(void) { + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); + arm_pm_idle = at91rm9200_idle; arm_pm_restart = at91rm9200_restart; + at91rm9200_pm_init(); } -AT91_SOC_START(at91rm9200) - .map_io = at91rm9200_map_io, - .init = at91rm9200_initialize, -AT91_SOC_END + +static const char *at91rm9200_dt_board_compat[] __initconst = { + "atmel,at91rm9200", + NULL +}; + +DT_MACHINE_START(at91rm9200_dt, "Atmel AT91RM9200") + .init_time = at91rm9200_dt_timer_init, + .map_io = at91_map_io, + .init_machine = at91rm9200_dt_device_init, + .dt_compat = at91rm9200_dt_board_compat, +MACHINE_END diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c index 51761f8927b7..b00d09555f2b 100644 --- a/arch/arm/mach-at91/at91rm9200_time.c +++ b/arch/arm/mach-at91/at91rm9200_time.c @@ -183,7 +183,7 @@ static struct clock_event_device clkevt = { void __iomem *at91_st_base; EXPORT_SYMBOL_GPL(at91_st_base); -static struct of_device_id at91rm9200_st_timer_ids[] = { +static const struct of_device_id at91rm9200_st_timer_ids[] = { { .compatible = "atmel,at91rm9200-st" }, { /* sentinel */ } }; diff --git a/arch/arm/mach-at91/at91sam9.c b/arch/arm/mach-at91/at91sam9.c new file mode 100644 index 000000000000..56e3ba73ec40 --- /dev/null +++ b/arch/arm/mach-at91/at91sam9.c @@ -0,0 +1,87 @@ +/* + * Setup code for AT91SAM9 + * + * Copyright (C) 2011 Atmel, + * 2011 Nicolas Ferre <nicolas.ferre@atmel.com> + * + * Licensed under GPLv2 or later. + */ + +#include <linux/types.h> +#include <linux/init.h> +#include <linux/module.h> +#include <linux/gpio.h> +#include <linux/of.h> +#include <linux/of_irq.h> +#include <linux/of_platform.h> +#include <linux/clk-provider.h> + +#include <asm/system_misc.h> +#include <asm/setup.h> +#include <asm/irq.h> +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/mach/irq.h> + +#include "generic.h" + +static void __init at91sam9_dt_device_init(void) +{ + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); + + arm_pm_idle = at91sam9_idle; + at91sam9260_pm_init(); +} + +static const char *at91_dt_board_compat[] __initconst = { + "atmel,at91sam9", + NULL +}; + +DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM9") + /* Maintainer: Atmel */ + .map_io = at91_map_io, + .init_machine = at91sam9_dt_device_init, + .dt_compat = at91_dt_board_compat, +MACHINE_END + +static void __init at91sam9g45_dt_device_init(void) +{ + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); + + arm_pm_idle = at91sam9_idle; + at91sam9g45_pm_init(); +} + +static const char *at91sam9g45_board_compat[] __initconst = { + "atmel,at91sam9g45", + NULL +}; + +DT_MACHINE_START(at91sam9g45_dt, "Atmel AT91SAM9G45") + /* Maintainer: Atmel */ + .map_io = at91_map_io, + .init_machine = at91sam9g45_dt_device_init, + .dt_compat = at91sam9g45_board_compat, +MACHINE_END + +static void __init at91sam9x5_dt_device_init(void) +{ + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); + + arm_pm_idle = at91sam9_idle; + at91sam9x5_pm_init(); +} + +static const char *at91sam9x5_board_compat[] __initconst = { + "atmel,at91sam9x5", + "atmel,at91sam9n12", + NULL +}; + +DT_MACHINE_START(at91sam9x5_dt, "Atmel AT91SAM9") + /* Maintainer: Atmel */ + .map_io = at91_map_io, + .init_machine = at91sam9x5_dt_device_init, + .dt_compat = at91sam9x5_board_compat, +MACHINE_END diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c deleted file mode 100644 index 78137c24d90b..000000000000 --- a/arch/arm/mach-at91/at91sam9260.c +++ /dev/null @@ -1,61 +0,0 @@ -/* - * arch/arm/mach-at91/at91sam9260.c - * - * Copyright (C) 2006 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - */ - -#include <asm/system_misc.h> -#include <mach/cpu.h> -#include <mach/at91_dbgu.h> -#include <mach/hardware.h> - -#include "soc.h" -#include "generic.h" - -/* -------------------------------------------------------------------- - * AT91SAM9260 processor initialization - * -------------------------------------------------------------------- */ - -static void __init at91sam9xe_map_io(void) -{ - unsigned long sram_size; - - switch (at91_soc_initdata.cidr & AT91_CIDR_SRAMSIZ) { - case AT91_CIDR_SRAMSIZ_32K: - sram_size = 2 * SZ_16K; - break; - case AT91_CIDR_SRAMSIZ_16K: - default: - sram_size = SZ_16K; - } - - at91_init_sram(0, AT91SAM9XE_SRAM_BASE, sram_size); -} - -static void __init at91sam9260_map_io(void) -{ - if (cpu_is_at91sam9xe()) - at91sam9xe_map_io(); - else if (cpu_is_at91sam9g20()) - at91_init_sram(0, AT91SAM9G20_SRAM_BASE, AT91SAM9G20_SRAM_SIZE); - else - at91_init_sram(0, AT91SAM9260_SRAM_BASE, AT91SAM9260_SRAM_SIZE); -} - -static void __init at91sam9260_initialize(void) -{ - arm_pm_idle = at91sam9_idle; - - at91_sysirq_mask_rtt(AT91SAM9260_BASE_RTT); -} - -AT91_SOC_START(at91sam9260) - .map_io = at91sam9260_map_io, - .init = at91sam9260_initialize, -AT91_SOC_END diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c deleted file mode 100644 index d29953ecb0c4..000000000000 --- a/arch/arm/mach-at91/at91sam9261.c +++ /dev/null @@ -1,42 +0,0 @@ -/* - * arch/arm/mach-at91/at91sam9261.c - * - * Copyright (C) 2005 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - */ - -#include <asm/system_misc.h> -#include <mach/cpu.h> -#include <mach/hardware.h> - -#include "soc.h" -#include "generic.h" - -/* -------------------------------------------------------------------- - * AT91SAM9261 processor initialization - * -------------------------------------------------------------------- */ - -static void __init at91sam9261_map_io(void) -{ - if (cpu_is_at91sam9g10()) - at91_init_sram(0, AT91SAM9G10_SRAM_BASE, AT91SAM9G10_SRAM_SIZE); - else - at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE); -} - -static void __init at91sam9261_initialize(void) -{ - arm_pm_idle = at91sam9_idle; - - at91_sysirq_mask_rtt(AT91SAM9261_BASE_RTT); -} - -AT91_SOC_START(at91sam9261) - .map_io = at91sam9261_map_io, - .init = at91sam9261_initialize, -AT91_SOC_END diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c deleted file mode 100644 index e7ad14864083..000000000000 --- a/arch/arm/mach-at91/at91sam9263.c +++ /dev/null @@ -1,40 +0,0 @@ -/* - * arch/arm/mach-at91/at91sam9263.c - * - * Copyright (C) 2007 Atmel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - */ - -#include <asm/system_misc.h> -#include <mach/hardware.h> - -#include "soc.h" -#include "generic.h" - -/* -------------------------------------------------------------------- - * AT91SAM9263 processor initialization - * -------------------------------------------------------------------- */ - -static void __init at91sam9263_map_io(void) -{ - at91_init_sram(0, AT91SAM9263_SRAM0_BASE, AT91SAM9263_SRAM0_SIZE); - at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE); -} - -static void __init at91sam9263_initialize(void) -{ - arm_pm_idle = at91sam9_idle; - - at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT0); - at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT1); -} - -AT91_SOC_START(at91sam9263) - .map_io = at91sam9263_map_io, - .init = at91sam9263_initialize, -AT91_SOC_END diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c deleted file mode 100644 index b6117bea9a6f..000000000000 --- a/arch/arm/mach-at91/at91sam9g45.c +++ /dev/null @@ -1,40 +0,0 @@ -/* - * Chip-specific setup code for the AT91SAM9G45 family - * - * Copyright (C) 2009 Atmel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - */ - -#include <asm/system_misc.h> -#include <asm/irq.h> -#include <mach/hardware.h> - -#include "soc.h" -#include "generic.h" - -/* -------------------------------------------------------------------- - * AT91SAM9G45 processor initialization - * -------------------------------------------------------------------- */ - -static void __init at91sam9g45_map_io(void) -{ - at91_init_sram(0, AT91SAM9G45_SRAM_BASE, AT91SAM9G45_SRAM_SIZE); -} - -static void __init at91sam9g45_initialize(void) -{ - arm_pm_idle = at91sam9_idle; - - at91_sysirq_mask_rtc(AT91SAM9G45_BASE_RTC); - at91_sysirq_mask_rtt(AT91SAM9G45_BASE_RTT); -} - -AT91_SOC_START(at91sam9g45) - .map_io = at91sam9g45_map_io, - .init = at91sam9g45_initialize, -AT91_SOC_END diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c deleted file mode 100644 index dee569b1987e..000000000000 --- a/arch/arm/mach-at91/at91sam9n12.c +++ /dev/null @@ -1,32 +0,0 @@ -/* - * SoC specific setup code for the AT91SAM9N12 - * - * Copyright (C) 2012 Atmel Corporation. - * - * Licensed under GPLv2 or later. - */ - -#include <asm/system_misc.h> -#include <mach/hardware.h> - -#include "soc.h" -#include "generic.h" - -/* -------------------------------------------------------------------- - * AT91SAM9N12 processor initialization - * -------------------------------------------------------------------- */ - -static void __init at91sam9n12_map_io(void) -{ - at91_init_sram(0, AT91SAM9N12_SRAM_BASE, AT91SAM9N12_SRAM_SIZE); -} - -static void __init at91sam9n12_initialize(void) -{ - at91_sysirq_mask_rtc(AT91SAM9N12_BASE_RTC); -} - -AT91_SOC_START(at91sam9n12) - .map_io = at91sam9n12_map_io, - .init = at91sam9n12_initialize, -AT91_SOC_END diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c deleted file mode 100644 index f25b9aec9c50..000000000000 --- a/arch/arm/mach-at91/at91sam9rl.c +++ /dev/null @@ -1,53 +0,0 @@ -/* - * arch/arm/mach-at91/at91sam9rl.c - * - * Copyright (C) 2005 SAN People - * Copyright (C) 2007 Atmel Corporation - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive for - * more details. - */ - -#include <asm/system_misc.h> -#include <asm/irq.h> -#include <mach/cpu.h> -#include <mach/at91_dbgu.h> -#include <mach/hardware.h> - -#include "soc.h" -#include "generic.h" - -/* -------------------------------------------------------------------- - * AT91SAM9RL processor initialization - * -------------------------------------------------------------------- */ - -static void __init at91sam9rl_map_io(void) -{ - unsigned long sram_size; - - switch (at91_soc_initdata.cidr & AT91_CIDR_SRAMSIZ) { - case AT91_CIDR_SRAMSIZ_32K: - sram_size = 2 * SZ_16K; - break; - case AT91_CIDR_SRAMSIZ_16K: - default: - sram_size = SZ_16K; - } - - /* Map SRAM */ - at91_init_sram(0, AT91SAM9RL_SRAM_BASE, sram_size); -} - -static void __init at91sam9rl_initialize(void) -{ - arm_pm_idle = at91sam9_idle; - - at91_sysirq_mask_rtc(AT91SAM9RL_BASE_RTC); - at91_sysirq_mask_rtt(AT91SAM9RL_BASE_RTT); -} - -AT91_SOC_START(at91sam9rl) - .map_io = at91sam9rl_map_io, - .init = at91sam9rl_initialize, -AT91_SOC_END diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c deleted file mode 100644 index f0d5a69a7237..000000000000 --- a/arch/arm/mach-at91/at91sam9x5.c +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Chip-specific setup code for the AT91SAM9x5 family - * - * Copyright (C) 2010-2012 Atmel Corporation. - * - * Licensed under GPLv2 or later. - */ - -#include <asm/system_misc.h> -#include <mach/hardware.h> - -#include "soc.h" -#include "generic.h" - -/* -------------------------------------------------------------------- - * AT91SAM9x5 processor initialization - * -------------------------------------------------------------------- */ - -static void __init at91sam9x5_map_io(void) -{ - at91_init_sram(0, AT91SAM9X5_SRAM_BASE, AT91SAM9X5_SRAM_SIZE); -} - -static void __init at91sam9x5_initialize(void) -{ - at91_sysirq_mask_rtc(AT91SAM9X5_BASE_RTC); -} - -/* -------------------------------------------------------------------- - * Interrupt initialization - * -------------------------------------------------------------------- */ - -AT91_SOC_START(at91sam9x5) - .map_io = at91sam9x5_map_io, - .init = at91sam9x5_initialize, -AT91_SOC_END diff --git a/arch/arm/mach-at91/board-dt-rm9200.c b/arch/arm/mach-at91/board-dt-rm9200.c deleted file mode 100644 index 76dfe8f9af50..000000000000 --- a/arch/arm/mach-at91/board-dt-rm9200.c +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Setup code for AT91RM9200 Evaluation Kits with Device Tree support - * - * Copyright (C) 2011 Atmel, - * 2011 Nicolas Ferre <nicolas.ferre@atmel.com> - * 2012 Joachim Eastwood <manabian@gmail.com> - * - * Licensed under GPLv2 or later. - */ - -#include <linux/types.h> -#include <linux/init.h> -#include <linux/module.h> -#include <linux/gpio.h> -#include <linux/of.h> -#include <linux/of_irq.h> -#include <linux/clk-provider.h> - -#include <asm/setup.h> -#include <asm/irq.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include "generic.h" - -static void __init at91rm9200_dt_timer_init(void) -{ - of_clk_init(NULL); - at91rm9200_timer_init(); -} - -static const char *at91rm9200_dt_board_compat[] __initdata = { - "atmel,at91rm9200", - NULL -}; - -DT_MACHINE_START(at91rm9200_dt, "Atmel AT91RM9200 (Device Tree)") - .init_time = at91rm9200_dt_timer_init, - .map_io = at91_map_io, - .init_early = at91rm9200_dt_initialize, - .dt_compat = at91rm9200_dt_board_compat, -MACHINE_END diff --git a/arch/arm/mach-at91/board-dt-sam9.c b/arch/arm/mach-at91/board-dt-sam9.c deleted file mode 100644 index f99246aa9b38..000000000000 --- a/arch/arm/mach-at91/board-dt-sam9.c +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Setup code for AT91SAM Evaluation Kits with Device Tree support - * - * Copyright (C) 2011 Atmel, - * 2011 Nicolas Ferre <nicolas.ferre@atmel.com> - * - * Licensed under GPLv2 or later. - */ - -#include <linux/types.h> -#include <linux/init.h> -#include <linux/module.h> -#include <linux/gpio.h> -#include <linux/of.h> -#include <linux/of_irq.h> -#include <linux/clk-provider.h> - -#include <asm/setup.h> -#include <asm/irq.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include "generic.h" - -static const char *at91_dt_board_compat[] __initdata = { - "atmel,at91sam9", - NULL -}; - -DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)") - /* Maintainer: Atmel */ - .map_io = at91_map_io, - .init_early = at91_dt_initialize, - .dt_compat = at91_dt_board_compat, -MACHINE_END diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index d53324210adf..583369ffc284 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h @@ -17,24 +17,28 @@ /* Map io */ extern void __init at91_map_io(void); extern void __init at91_alt_map_io(void); -extern void __init at91_init_sram(int bank, unsigned long base, - unsigned int length); - - /* Processors */ -extern void __init at91rm9200_set_type(int type); -extern void __init at91rm9200_dt_initialize(void); -extern void __init at91_dt_initialize(void); - - /* Interrupts */ -extern void __init at91_sysirq_mask_rtc(u32 rtc_base); -extern void __init at91_sysirq_mask_rtt(u32 rtt_base); /* Timer */ extern void at91rm9200_timer_init(void); /* idle */ +extern void at91rm9200_idle(void); extern void at91sam9_idle(void); /* Matrix */ extern void at91_ioremap_matrix(u32 base_addr); + + +#ifdef CONFIG_PM +extern void __init at91rm9200_pm_init(void); +extern void __init at91sam9260_pm_init(void); +extern void __init at91sam9g45_pm_init(void); +extern void __init at91sam9x5_pm_init(void); +#else +static inline void __init at91rm9200_pm_init(void) { } +static inline void __init at91sam9260_pm_init(void) { } +static inline void __init at91sam9g45_pm_init(void) { } +static inline void __init at91sam9x5_pm_init(void) { } +#endif + #endif /* _AT91_GENERIC_H */ diff --git a/arch/arm/mach-at91/include/mach/at91_pio.h b/arch/arm/mach-at91/include/mach/at91_pio.h deleted file mode 100644 index 7b7366253ceb..000000000000 --- a/arch/arm/mach-at91/include/mach/at91_pio.h +++ /dev/null @@ -1,80 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/at91_pio.h - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * - * Parallel I/O Controller (PIO) - System peripherals registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_PIO_H -#define AT91_PIO_H - -#define PIO_PER 0x00 /* Enable Register */ -#define PIO_PDR 0x04 /* Disable Register */ -#define PIO_PSR 0x08 /* Status Register */ -#define PIO_OER 0x10 /* Output Enable Register */ -#define PIO_ODR 0x14 /* Output Disable Register */ -#define PIO_OSR 0x18 /* Output Status Register */ -#define PIO_IFER 0x20 /* Glitch Input Filter Enable */ -#define PIO_IFDR 0x24 /* Glitch Input Filter Disable */ -#define PIO_IFSR 0x28 /* Glitch Input Filter Status */ -#define PIO_SODR 0x30 /* Set Output Data Register */ -#define PIO_CODR 0x34 /* Clear Output Data Register */ -#define PIO_ODSR 0x38 /* Output Data Status Register */ -#define PIO_PDSR 0x3c /* Pin Data Status Register */ -#define PIO_IER 0x40 /* Interrupt Enable Register */ -#define PIO_IDR 0x44 /* Interrupt Disable Register */ -#define PIO_IMR 0x48 /* Interrupt Mask Register */ -#define PIO_ISR 0x4c /* Interrupt Status Register */ -#define PIO_MDER 0x50 /* Multi-driver Enable Register */ -#define PIO_MDDR 0x54 /* Multi-driver Disable Register */ -#define PIO_MDSR 0x58 /* Multi-driver Status Register */ -#define PIO_PUDR 0x60 /* Pull-up Disable Register */ -#define PIO_PUER 0x64 /* Pull-up Enable Register */ -#define PIO_PUSR 0x68 /* Pull-up Status Register */ -#define PIO_ASR 0x70 /* Peripheral A Select Register */ -#define PIO_ABCDSR1 0x70 /* Peripheral ABCD Select Register 1 [some sam9 only] */ -#define PIO_BSR 0x74 /* Peripheral B Select Register */ -#define PIO_ABCDSR2 0x74 /* Peripheral ABCD Select Register 2 [some sam9 only] */ -#define PIO_ABSR 0x78 /* AB Status Register */ -#define PIO_IFSCDR 0x80 /* Input Filter Slow Clock Disable Register */ -#define PIO_IFSCER 0x84 /* Input Filter Slow Clock Enable Register */ -#define PIO_IFSCSR 0x88 /* Input Filter Slow Clock Status Register */ -#define PIO_SCDR 0x8c /* Slow Clock Divider Debouncing Register */ -#define PIO_SCDR_DIV (0x3fff << 0) /* Slow Clock Divider Mask */ -#define PIO_PPDDR 0x90 /* Pad Pull-down Disable Register */ -#define PIO_PPDER 0x94 /* Pad Pull-down Enable Register */ -#define PIO_PPDSR 0x98 /* Pad Pull-down Status Register */ -#define PIO_OWER 0xa0 /* Output Write Enable Register */ -#define PIO_OWDR 0xa4 /* Output Write Disable Register */ -#define PIO_OWSR 0xa8 /* Output Write Status Register */ -#define PIO_AIMER 0xb0 /* Additional Interrupt Modes Enable Register */ -#define PIO_AIMDR 0xb4 /* Additional Interrupt Modes Disable Register */ -#define PIO_AIMMR 0xb8 /* Additional Interrupt Modes Mask Register */ -#define PIO_ESR 0xc0 /* Edge Select Register */ -#define PIO_LSR 0xc4 /* Level Select Register */ -#define PIO_ELSR 0xc8 /* Edge/Level Status Register */ -#define PIO_FELLSR 0xd0 /* Falling Edge/Low Level Select Register */ -#define PIO_REHLSR 0xd4 /* Rising Edge/ High Level Select Register */ -#define PIO_FRLHSR 0xd8 /* Fall/Rise - Low/High Status Register */ -#define PIO_SCHMITT 0x100 /* Schmitt Trigger Register */ - -#define ABCDSR_PERIPH_A 0x0 -#define ABCDSR_PERIPH_B 0x1 -#define ABCDSR_PERIPH_C 0x2 -#define ABCDSR_PERIPH_D 0x3 - -#define SAMA5D3_PIO_DRIVER1 0x118 /*PIO Driver 1 register offset*/ -#define SAMA5D3_PIO_DRIVER2 0x11C /*PIO Driver 2 register offset*/ - -#define AT91SAM9X5_PIO_DRIVER1 0x114 /*PIO Driver 1 register offset*/ -#define AT91SAM9X5_PIO_DRIVER2 0x118 /*PIO Driver 2 register offset*/ - -#endif diff --git a/arch/arm/mach-at91/include/mach/at91_rtt.h b/arch/arm/mach-at91/include/mach/at91_rtt.h deleted file mode 100644 index 7ec75de8bbb6..000000000000 --- a/arch/arm/mach-at91/include/mach/at91_rtt.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/at91_rtt.h - * - * Copyright (C) 2007 Andrew Victor - * Copyright (C) 2007 Atmel Corporation. - * - * Real-time Timer (RTT) - System peripherals regsters. - * Based on AT91SAM9261 datasheet revision D. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_RTT_H -#define AT91_RTT_H - -#define AT91_RTT_MR 0x00 /* Real-time Mode Register */ -#define AT91_RTT_RTPRES (0xffff << 0) /* Real-time Timer Prescaler Value */ -#define AT91_RTT_ALMIEN (1 << 16) /* Alarm Interrupt Enable */ -#define AT91_RTT_RTTINCIEN (1 << 17) /* Real Time Timer Increment Interrupt Enable */ -#define AT91_RTT_RTTRST (1 << 18) /* Real Time Timer Restart */ - -#define AT91_RTT_AR 0x04 /* Real-time Alarm Register */ -#define AT91_RTT_ALMV (0xffffffff) /* Alarm Value */ - -#define AT91_RTT_VR 0x08 /* Real-time Value Register */ -#define AT91_RTT_CRTV (0xffffffff) /* Current Real-time Value */ - -#define AT91_RTT_SR 0x0c /* Real-time Status Register */ -#define AT91_RTT_ALMS (1 << 0) /* Real-time Alarm Status */ -#define AT91_RTT_RTTINC (1 << 1) /* Real-time Timer Increment */ - -#endif diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h index 61914fb35f5d..ce7c80a44983 100644 --- a/arch/arm/mach-at91/include/mach/cpu.h +++ b/arch/arm/mach-at91/include/mach/cpu.h @@ -152,69 +152,45 @@ static inline int at91_soc_is_detected(void) #define cpu_is_at91rm9200_pqfp() (0) #endif -#ifdef CONFIG_SOC_AT91SAM9260 +#ifdef CONFIG_SOC_AT91SAM9 #define cpu_is_at91sam9xe() (at91_soc_initdata.subtype == AT91_SOC_SAM9XE) #define cpu_is_at91sam9260() (at91_soc_initdata.type == AT91_SOC_SAM9260) #define cpu_is_at91sam9g20() (at91_soc_initdata.type == AT91_SOC_SAM9G20) -#else -#define cpu_is_at91sam9xe() (0) -#define cpu_is_at91sam9260() (0) -#define cpu_is_at91sam9g20() (0) -#endif - -#ifdef CONFIG_SOC_AT91SAM9261 #define cpu_is_at91sam9261() (at91_soc_initdata.type == AT91_SOC_SAM9261) #define cpu_is_at91sam9g10() (at91_soc_initdata.type == AT91_SOC_SAM9G10) -#else -#define cpu_is_at91sam9261() (0) -#define cpu_is_at91sam9g10() (0) -#endif - -#ifdef CONFIG_SOC_AT91SAM9263 #define cpu_is_at91sam9263() (at91_soc_initdata.type == AT91_SOC_SAM9263) -#else -#define cpu_is_at91sam9263() (0) -#endif - -#ifdef CONFIG_SOC_AT91SAM9RL #define cpu_is_at91sam9rl() (at91_soc_initdata.type == AT91_SOC_SAM9RL) -#else -#define cpu_is_at91sam9rl() (0) -#endif - -#ifdef CONFIG_SOC_AT91SAM9G45 #define cpu_is_at91sam9g45() (at91_soc_initdata.type == AT91_SOC_SAM9G45) #define cpu_is_at91sam9g45es() (at91_soc_initdata.subtype == AT91_SOC_SAM9G45ES) #define cpu_is_at91sam9m10() (at91_soc_initdata.subtype == AT91_SOC_SAM9M10) #define cpu_is_at91sam9g46() (at91_soc_initdata.subtype == AT91_SOC_SAM9G46) #define cpu_is_at91sam9m11() (at91_soc_initdata.subtype == AT91_SOC_SAM9M11) -#else -#define cpu_is_at91sam9g45() (0) -#define cpu_is_at91sam9g45es() (0) -#define cpu_is_at91sam9m10() (0) -#define cpu_is_at91sam9g46() (0) -#define cpu_is_at91sam9m11() (0) -#endif - -#ifdef CONFIG_SOC_AT91SAM9X5 #define cpu_is_at91sam9x5() (at91_soc_initdata.type == AT91_SOC_SAM9X5) #define cpu_is_at91sam9g15() (at91_soc_initdata.subtype == AT91_SOC_SAM9G15) #define cpu_is_at91sam9g35() (at91_soc_initdata.subtype == AT91_SOC_SAM9G35) #define cpu_is_at91sam9x35() (at91_soc_initdata.subtype == AT91_SOC_SAM9X35) #define cpu_is_at91sam9g25() (at91_soc_initdata.subtype == AT91_SOC_SAM9G25) #define cpu_is_at91sam9x25() (at91_soc_initdata.subtype == AT91_SOC_SAM9X25) +#define cpu_is_at91sam9n12() (at91_soc_initdata.type == AT91_SOC_SAM9N12) #else +#define cpu_is_at91sam9xe() (0) +#define cpu_is_at91sam9260() (0) +#define cpu_is_at91sam9g20() (0) +#define cpu_is_at91sam9261() (0) +#define cpu_is_at91sam9g10() (0) +#define cpu_is_at91sam9263() (0) +#define cpu_is_at91sam9rl() (0) +#define cpu_is_at91sam9g45() (0) +#define cpu_is_at91sam9g45es() (0) +#define cpu_is_at91sam9m10() (0) +#define cpu_is_at91sam9g46() (0) +#define cpu_is_at91sam9m11() (0) #define cpu_is_at91sam9x5() (0) #define cpu_is_at91sam9g15() (0) #define cpu_is_at91sam9g35() (0) #define cpu_is_at91sam9x35() (0) #define cpu_is_at91sam9g25() (0) #define cpu_is_at91sam9x25() (0) -#endif - -#ifdef CONFIG_SOC_AT91SAM9N12 -#define cpu_is_at91sam9n12() (at91_soc_initdata.type == AT91_SOC_SAM9N12) -#else #define cpu_is_at91sam9n12() (0) #endif diff --git a/arch/arm/mach-at91/include/mach/debug-macro.S b/arch/arm/mach-at91/include/mach/debug-macro.S deleted file mode 100644 index 2103a90f2261..000000000000 --- a/arch/arm/mach-at91/include/mach/debug-macro.S +++ /dev/null @@ -1,46 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/debug-macro.S - * - * Copyright (C) 2003-2005 SAN People - * - * Debugging macro include header - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * -*/ - -#include <mach/hardware.h> -#include <mach/at91_dbgu.h> - -#if defined(CONFIG_AT91_DEBUG_LL_DBGU0) -#define AT91_DBGU AT91_BASE_DBGU0 -#elif defined(CONFIG_AT91_DEBUG_LL_DBGU1) -#define AT91_DBGU AT91_BASE_DBGU1 -#else -/* On sama5d4, use USART3 as low level serial console */ -#define AT91_DBGU SAMA5D4_BASE_USART3 -#endif - - .macro addruart, rp, rv, tmp - ldr \rp, =AT91_DBGU @ System peripherals (phys address) - ldr \rv, =AT91_IO_P2V(AT91_DBGU) @ System peripherals (virt address) - .endm - - .macro senduart,rd,rx - strb \rd, [\rx, #(AT91_DBGU_THR)] @ Write to Transmitter Holding Register - .endm - - .macro waituart,rd,rx -1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register - tst \rd, #AT91_DBGU_TXRDY @ DBGU_TXRDY = 1 when ready to transmit - beq 1001b - .endm - - .macro busyuart,rd,rx -1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register - tst \rd, #AT91_DBGU_TXEMPTY @ DBGU_TXEMPTY = 1 when transmission complete - beq 1001b - .endm - diff --git a/arch/arm/mach-at91/include/mach/memory.h b/arch/arm/mach-at91/include/mach/memory.h deleted file mode 100644 index 401c207f2f39..000000000000 --- a/arch/arm/mach-at91/include/mach/memory.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/memory.h - * - * Copyright (C) 2004 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#include <mach/hardware.h> - -#endif diff --git a/arch/arm/mach-at91/include/mach/system_rev.h b/arch/arm/mach-at91/include/mach/system_rev.h deleted file mode 100644 index ef79a9aafc08..000000000000 --- a/arch/arm/mach-at91/include/mach/system_rev.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> - * - * Under GPLv2 only - */ - -#ifndef __ARCH_SYSTEM_REV_H__ -#define __ARCH_SYSTEM_REV_H__ - -#include <asm/system_info.h> - -/* - * board revision encoding - * mach specific - * the 16-31 bit are reserved for at91 generic information - * - * bit 31: - * 0 => nand 8 bit - * 1 => nand 16 bit - */ -#define BOARD_HAVE_NAND_16BIT (1 << 31) -static inline int board_have_nand_16bit(void) -{ - return (system_rev & BOARD_HAVE_NAND_16BIT) ? 1 : 0; -} - -#endif /* __ARCH_SYSTEM_REV_H__ */ diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 9b15169a1c62..5e34fb143309 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -14,9 +14,13 @@ #include <linux/suspend.h> #include <linux/sched.h> #include <linux/proc_fs.h> +#include <linux/genalloc.h> #include <linux/interrupt.h> #include <linux/sysfs.h> #include <linux/module.h> +#include <linux/of.h> +#include <linux/of_platform.h> +#include <linux/of_address.h> #include <linux/platform_device.h> #include <linux/io.h> #include <linux/clk/at91_pmc.h> @@ -32,7 +36,13 @@ #include "generic.h" #include "pm.h" +static struct { + unsigned long uhp_udp_mask; + int memctrl; +} at91_pm_data; + static void (*at91_pm_standby)(void); +void __iomem *at91_ramc_base[2]; static int at91_pm_valid_state(suspend_state_t state) { @@ -71,17 +81,9 @@ static int at91_pm_verify_clocks(void) scsr = at91_pmc_read(AT91_PMC_SCSR); /* USB must not be using PLLB */ - if (cpu_is_at91rm9200()) { - if ((scsr & (AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP)) != 0) { - pr_err("AT91: PM - Suspend-to-RAM with USB still active\n"); - return 0; - } - } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263() - || cpu_is_at91sam9g20() || cpu_is_at91sam9g10()) { - if ((scsr & (AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP)) != 0) { - pr_err("AT91: PM - Suspend-to-RAM with USB still active\n"); - return 0; - } + if ((scsr & at91_pm_data.uhp_udp_mask) != 0) { + pr_err("AT91: PM - Suspend-to-RAM with USB still active\n"); + return 0; } /* PCK0..PCK3 must be disabled, or configured to use clk32k */ @@ -149,18 +151,13 @@ static int at91_pm_enter(suspend_state_t state) * turning off the main oscillator; reverse on wakeup. */ if (slow_clock) { - int memctrl = AT91_MEMCTRL_SDRAMC; - - if (cpu_is_at91rm9200()) - memctrl = AT91_MEMCTRL_MC; - else if (cpu_is_at91sam9g45()) - memctrl = AT91_MEMCTRL_DDRSDR; #ifdef CONFIG_AT91_SLOW_CLOCK /* copy slow_clock handler to SRAM, and call it */ memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz); #endif slow_clock(at91_pmc_base, at91_ramc_base[0], - at91_ramc_base[1], memctrl); + at91_ramc_base[1], + at91_pm_data.memctrl); break; } else { pr_info("AT91: PM - no slow clock mode enabled ...\n"); @@ -229,23 +226,134 @@ void at91_pm_set_standby(void (*at91_standby)(void)) } } -static int __init at91_pm_init(void) +static const struct of_device_id ramc_ids[] __initconst = { + { .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby }, + { .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby }, + { .compatible = "atmel,at91sam9g45-ddramc", .data = at91_ddr_standby }, + { .compatible = "atmel,sama5d3-ddramc", .data = at91_ddr_standby }, + { /*sentinel*/ } +}; + +static __init void at91_dt_ramc(void) { + struct device_node *np; + const struct of_device_id *of_id; + int idx = 0; + const void *standby = NULL; + + for_each_matching_node_and_match(np, ramc_ids, &of_id) { + at91_ramc_base[idx] = of_iomap(np, 0); + if (!at91_ramc_base[idx]) + panic(pr_fmt("unable to map ramc[%d] cpu registers\n"), idx); + + if (!standby) + standby = of_id->data; + + idx++; + } + + if (!idx) + panic(pr_fmt("unable to find compatible ram controller node in dtb\n")); + + if (!standby) { + pr_warn("ramc no standby function available\n"); + return; + } + + at91_pm_set_standby(standby); +} + #ifdef CONFIG_AT91_SLOW_CLOCK - slow_clock = (void *) (AT91_IO_VIRT_BASE - at91_slow_clock_sz); +static void __init at91_pm_sram_init(void) +{ + struct gen_pool *sram_pool; + phys_addr_t sram_pbase; + unsigned long sram_base; + struct device_node *node; + struct platform_device *pdev; + + node = of_find_compatible_node(NULL, NULL, "mmio-sram"); + if (!node) { + pr_warn("%s: failed to find sram node!\n", __func__); + return; + } + + pdev = of_find_device_by_node(node); + if (!pdev) { + pr_warn("%s: failed to find sram device!\n", __func__); + goto put_node; + } + + sram_pool = dev_get_gen_pool(&pdev->dev); + if (!sram_pool) { + pr_warn("%s: sram pool unavailable!\n", __func__); + goto put_node; + } + + sram_base = gen_pool_alloc(sram_pool, at91_slow_clock_sz); + if (!sram_base) { + pr_warn("%s: unable to alloc ocram!\n", __func__); + goto put_node; + } + + sram_pbase = gen_pool_virt_to_phys(sram_pool, sram_base); + slow_clock = __arm_ioremap_exec(sram_pbase, at91_slow_clock_sz, false); + +put_node: + of_node_put(node); +} +#endif + + +static void __init at91_pm_init(void) +{ +#ifdef CONFIG_AT91_SLOW_CLOCK + at91_pm_sram_init(); #endif pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : "")); - /* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */ - if (cpu_is_at91rm9200()) - at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0); - if (at91_cpuidle_device.dev.platform_data) platform_device_register(&at91_cpuidle_device); suspend_set_ops(&at91_pm_ops); +} - return 0; +void __init at91rm9200_pm_init(void) +{ + at91_dt_ramc(); + + /* + * AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. + */ + at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0); + + at91_pm_data.uhp_udp_mask = AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP; + at91_pm_data.memctrl = AT91_MEMCTRL_MC; + + at91_pm_init(); +} + +void __init at91sam9260_pm_init(void) +{ + at91_dt_ramc(); + at91_pm_data.memctrl = AT91_MEMCTRL_SDRAMC; + at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP; + return at91_pm_init(); +} + +void __init at91sam9g45_pm_init(void) +{ + at91_dt_ramc(); + at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP; + at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR; + return at91_pm_init(); +} + +void __init at91sam9x5_pm_init(void) +{ + at91_dt_ramc(); + at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP; + at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR; + return at91_pm_init(); } -arch_initcall(at91_pm_init); diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S index 20018779bae7..556151e85ec4 100644 --- a/arch/arm/mach-at91/pm_slowclock.S +++ b/arch/arm/mach-at91/pm_slowclock.S @@ -17,15 +17,6 @@ #include <mach/hardware.h> #include <mach/at91_ramc.h> - -#ifdef CONFIG_SOC_AT91SAM9263 -/* - * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use; - * handle those cases both here and in the Suspend-To-RAM support. - */ -#warning Assuming EB1 SDRAM controller is *NOT* used -#endif - /* * When SLOWDOWN_MASTER_CLOCK is defined we will also slow down the Master * clock during suspend by adjusting its prescalar and divisor. diff --git a/arch/arm/mach-at91/board-dt-sama5.c b/arch/arm/mach-at91/sama5.c index 97f7367d32b8..03dcb441f3d2 100644 --- a/arch/arm/mach-at91/board-dt-sama5.c +++ b/arch/arm/mach-at91/sama5.c @@ -1,5 +1,5 @@ /* - * Setup code for SAMA5 Evaluation Kits with Device Tree support + * Setup code for SAMA5 * * Copyright (C) 2013 Atmel, * 2013 Ludovic Desroches <ludovic.desroches@atmel.com> @@ -19,6 +19,8 @@ #include <linux/clk-provider.h> #include <linux/phy.h> +#include <mach/hardware.h> + #include <asm/setup.h> #include <asm/irq.h> #include <asm/mach/arch.h> @@ -47,6 +49,7 @@ static void __init sama5_dt_device_init(void) } of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); + at91sam9x5_pm_init(); } static const char *sama5_dt_board_compat[] __initconst = { @@ -54,23 +57,54 @@ static const char *sama5_dt_board_compat[] __initconst = { NULL }; -DT_MACHINE_START(sama5_dt, "Atmel SAMA5 (Device Tree)") +DT_MACHINE_START(sama5_dt, "Atmel SAMA5") /* Maintainer: Atmel */ .map_io = at91_map_io, - .init_early = at91_dt_initialize, .init_machine = sama5_dt_device_init, .dt_compat = sama5_dt_board_compat, MACHINE_END +static struct map_desc at91_io_desc[] __initdata = { + { + .virtual = (unsigned long)AT91_ALT_IO_P2V(SAMA5D4_BASE_MPDDRC), + .pfn = __phys_to_pfn(SAMA5D4_BASE_MPDDRC), + .length = SZ_512, + .type = MT_DEVICE, + }, + { + .virtual = (unsigned long)AT91_ALT_IO_P2V(SAMA5D4_BASE_PMC), + .pfn = __phys_to_pfn(SAMA5D4_BASE_PMC), + .length = SZ_512, + .type = MT_DEVICE, + }, + { /* On sama5d4, we use USART3 as serial console */ + .virtual = (unsigned long)AT91_ALT_IO_P2V(SAMA5D4_BASE_USART3), + .pfn = __phys_to_pfn(SAMA5D4_BASE_USART3), + .length = SZ_256, + .type = MT_DEVICE, + }, + { /* A bunch of peripheral with fine grained IO space */ + .virtual = (unsigned long)AT91_ALT_IO_P2V(SAMA5D4_BASE_SYS2), + .pfn = __phys_to_pfn(SAMA5D4_BASE_SYS2), + .length = SZ_2K, + .type = MT_DEVICE, + }, +}; + +static void __init sama5_alt_map_io(void) +{ + at91_alt_map_io(); + iotable_init(at91_io_desc, ARRAY_SIZE(at91_io_desc)); +} + static const char *sama5_alt_dt_board_compat[] __initconst = { "atmel,sama5d4", NULL }; -DT_MACHINE_START(sama5_alt_dt, "Atmel SAMA5 (Device Tree)") +DT_MACHINE_START(sama5_alt_dt, "Atmel SAMA5") /* Maintainer: Atmel */ - .map_io = at91_alt_map_io, - .init_early = at91_dt_initialize, + .map_io = sama5_alt_map_io, .init_machine = sama5_dt_device_init, .dt_compat = sama5_alt_dt_board_compat, .l2c_aux_mask = ~0UL, diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c deleted file mode 100644 index 3d775d08de08..000000000000 --- a/arch/arm/mach-at91/sama5d3.c +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Chip-specific setup code for the SAMA5D3 family - * - * Copyright (C) 2013 Atmel, - * 2013 Ludovic Desroches <ludovic.desroches@atmel.com> - * - * Licensed under GPLv2 or later. - */ - -#include <linux/module.h> -#include <linux/dma-mapping.h> -#include <linux/clk/at91_pmc.h> - -#include <asm/irq.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <mach/sama5d3.h> -#include <mach/cpu.h> - -#include "soc.h" -#include "generic.h" -#include "sam9_smc.h" - -/* -------------------------------------------------------------------- - * AT91SAM9x5 processor initialization - * -------------------------------------------------------------------- */ - -static void __init sama5d3_map_io(void) -{ - at91_init_sram(0, SAMA5D3_SRAM_BASE, SAMA5D3_SRAM_SIZE); -} - -static void __init sama5d3_initialize(void) -{ - at91_sysirq_mask_rtc(SAMA5D3_BASE_RTC); -} - -AT91_SOC_START(sama5d3) - .map_io = sama5d3_map_io, - .init = sama5d3_initialize, -AT91_SOC_END diff --git a/arch/arm/mach-at91/sama5d4.c b/arch/arm/mach-at91/sama5d4.c deleted file mode 100644 index 7638509639f4..000000000000 --- a/arch/arm/mach-at91/sama5d4.c +++ /dev/null @@ -1,64 +0,0 @@ -/* - * Chip-specific setup code for the SAMA5D4 family - * - * Copyright (C) 2013 Atmel Corporation, - * Nicolas Ferre <nicolas.ferre@atmel.com> - * - * Licensed under GPLv2 or later. - */ - -#include <linux/module.h> -#include <linux/dma-mapping.h> -#include <linux/clk/at91_pmc.h> - -#include <asm/irq.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <mach/sama5d4.h> -#include <mach/cpu.h> -#include <mach/hardware.h> - -#include "soc.h" -#include "generic.h" -#include "sam9_smc.h" - -/* -------------------------------------------------------------------- - * Processor initialization - * -------------------------------------------------------------------- */ -static struct map_desc at91_io_desc[] __initdata = { - { - .virtual = (unsigned long)AT91_ALT_IO_P2V(SAMA5D4_BASE_MPDDRC), - .pfn = __phys_to_pfn(SAMA5D4_BASE_MPDDRC), - .length = SZ_512, - .type = MT_DEVICE, - }, - { - .virtual = (unsigned long)AT91_ALT_IO_P2V(SAMA5D4_BASE_PMC), - .pfn = __phys_to_pfn(SAMA5D4_BASE_PMC), - .length = SZ_512, - .type = MT_DEVICE, - }, - { /* On sama5d4, we use USART3 as serial console */ - .virtual = (unsigned long)AT91_ALT_IO_P2V(SAMA5D4_BASE_USART3), - .pfn = __phys_to_pfn(SAMA5D4_BASE_USART3), - .length = SZ_256, - .type = MT_DEVICE, - }, - { /* A bunch of peripheral with fine grained IO space */ - .virtual = (unsigned long)AT91_ALT_IO_P2V(SAMA5D4_BASE_SYS2), - .pfn = __phys_to_pfn(SAMA5D4_BASE_SYS2), - .length = SZ_2K, - .type = MT_DEVICE, - }, -}; - - -static void __init sama5d4_map_io(void) -{ - iotable_init(at91_io_desc, ARRAY_SIZE(at91_io_desc)); - at91_init_sram(0, SAMA5D4_NS_SRAM_BASE, SAMA5D4_NS_SRAM_SIZE); -} - -AT91_SOC_START(sama5d4) - .map_io = sama5d4_map_io, -AT91_SOC_END diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c index ce25e85720fb..4e58bc90ed21 100644 --- a/arch/arm/mach-at91/setup.c +++ b/arch/arm/mach-at91/setup.c @@ -22,49 +22,12 @@ #include <mach/cpu.h> #include <mach/at91_dbgu.h> -#include "soc.h" #include "generic.h" #include "pm.h" -struct at91_init_soc __initdata at91_boot_soc; - struct at91_socinfo at91_soc_initdata; EXPORT_SYMBOL(at91_soc_initdata); -void __init at91rm9200_set_type(int type) -{ - if (type == ARCH_REVISON_9200_PQFP) - at91_soc_initdata.subtype = AT91_SOC_RM9200_PQFP; - else - at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA; - - pr_info("filled in soc subtype: %s\n", - at91_get_soc_subtype(&at91_soc_initdata)); -} - -void __iomem *at91_ramc_base[2]; -EXPORT_SYMBOL_GPL(at91_ramc_base); - -static struct map_desc sram_desc[2] __initdata; - -void __init at91_init_sram(int bank, unsigned long base, unsigned int length) -{ - struct map_desc *desc = &sram_desc[bank]; - - desc->virtual = (unsigned long)AT91_IO_VIRT_BASE - length; - if (bank > 0) - desc->virtual -= sram_desc[bank - 1].length; - - desc->pfn = __phys_to_pfn(base); - desc->length = length; - desc->type = MT_MEMORY_RWX_NONCACHED; - - pr_info("sram at 0x%lx of 0x%x mapped at 0x%lx\n", - base, length, desc->virtual); - - iotable_init(desc, 1); -} - static struct map_desc at91_io_desc __initdata __maybe_unused = { .virtual = (unsigned long)AT91_VA_BASE_SYS, .pfn = __phys_to_pfn(AT91_BASE_SYS), @@ -91,61 +54,51 @@ static void __init soc_detect(u32 dbgu_base) at91_soc_initdata.type = AT91_SOC_RM9200; if (at91_soc_initdata.subtype == AT91_SOC_SUBTYPE_UNKNOWN) at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA; - at91_boot_soc = at91rm9200_soc; break; case ARCH_ID_AT91SAM9260: at91_soc_initdata.type = AT91_SOC_SAM9260; at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; - at91_boot_soc = at91sam9260_soc; break; case ARCH_ID_AT91SAM9261: at91_soc_initdata.type = AT91_SOC_SAM9261; at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; - at91_boot_soc = at91sam9261_soc; break; case ARCH_ID_AT91SAM9263: at91_soc_initdata.type = AT91_SOC_SAM9263; at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; - at91_boot_soc = at91sam9263_soc; break; case ARCH_ID_AT91SAM9G20: at91_soc_initdata.type = AT91_SOC_SAM9G20; at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; - at91_boot_soc = at91sam9260_soc; break; case ARCH_ID_AT91SAM9G45: at91_soc_initdata.type = AT91_SOC_SAM9G45; if (cidr == ARCH_ID_AT91SAM9G45ES) at91_soc_initdata.subtype = AT91_SOC_SAM9G45ES; - at91_boot_soc = at91sam9g45_soc; break; case ARCH_ID_AT91SAM9RL64: at91_soc_initdata.type = AT91_SOC_SAM9RL; at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; - at91_boot_soc = at91sam9rl_soc; break; case ARCH_ID_AT91SAM9X5: at91_soc_initdata.type = AT91_SOC_SAM9X5; - at91_boot_soc = at91sam9x5_soc; break; case ARCH_ID_AT91SAM9N12: at91_soc_initdata.type = AT91_SOC_SAM9N12; - at91_boot_soc = at91sam9n12_soc; break; case ARCH_ID_SAMA5: at91_soc_initdata.exid = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_EXID); if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D3) { at91_soc_initdata.type = AT91_SOC_SAMA5D3; - at91_boot_soc = sama5d3_soc; } break; } @@ -154,13 +107,11 @@ static void __init soc_detect(u32 dbgu_base) if ((socid & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) { at91_soc_initdata.type = AT91_SOC_SAM9G10; at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; - at91_boot_soc = at91sam9261_soc; } /* at91sam9xe */ else if ((cidr & AT91_CIDR_ARCH) == ARCH_FAMILY_AT91SAM9XE) { at91_soc_initdata.type = AT91_SOC_SAM9260; at91_soc_initdata.subtype = AT91_SOC_SAM9XE; - at91_boot_soc = at91sam9260_soc; } if (!at91_soc_is_detected()) @@ -240,10 +191,8 @@ static void __init alt_soc_detect(u32 dbgu_base) at91_soc_initdata.exid = __raw_readl(AT91_ALT_IO_P2V(dbgu_base) + AT91_DBGU_EXID); if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D3) { at91_soc_initdata.type = AT91_SOC_SAMA5D3; - at91_boot_soc = sama5d3_soc; } else if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D4) { at91_soc_initdata.type = AT91_SOC_SAMA5D4; - at91_boot_soc = sama5d4_soc; } break; } @@ -349,12 +298,6 @@ void __init at91_map_io(void) if (at91_soc_initdata.subtype != AT91_SOC_SUBTYPE_NONE) pr_info("Detected soc subtype: %s\n", at91_get_soc_subtype(&at91_soc_initdata)); - - if (!at91_soc_is_enabled()) - panic(pr_fmt("Soc not enabled")); - - if (at91_boot_soc.map_io) - at91_boot_soc.map_io(); } void __init at91_alt_map_io(void) @@ -374,12 +317,6 @@ void __init at91_alt_map_io(void) if (at91_soc_initdata.subtype != AT91_SOC_SUBTYPE_NONE) pr_info("AT91: Detected soc subtype: %s\n", at91_get_soc_subtype(&at91_soc_initdata)); - - if (!at91_soc_is_enabled()) - panic("AT91: Soc not enabled"); - - if (at91_boot_soc.map_io) - at91_boot_soc.map_io(); } void __iomem *at91_matrix_base; @@ -391,55 +328,3 @@ void __init at91_ioremap_matrix(u32 base_addr) if (!at91_matrix_base) panic(pr_fmt("Impossible to ioremap at91_matrix_base\n")); } - -static struct of_device_id ramc_ids[] = { - { .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby }, - { .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby }, - { .compatible = "atmel,at91sam9g45-ddramc", .data = at91_ddr_standby }, - { .compatible = "atmel,sama5d3-ddramc", .data = at91_ddr_standby }, - { /*sentinel*/ } -}; - -static void at91_dt_ramc(void) -{ - struct device_node *np; - const struct of_device_id *of_id; - int idx = 0; - const void *standby = NULL; - - for_each_matching_node_and_match(np, ramc_ids, &of_id) { - at91_ramc_base[idx] = of_iomap(np, 0); - if (!at91_ramc_base[idx]) - panic(pr_fmt("unable to map ramc[%d] cpu registers\n"), idx); - - if (!standby) - standby = of_id->data; - - idx++; - } - - if (!idx) - panic(pr_fmt("unable to find compatible ram controller node in dtb\n")); - - if (!standby) { - pr_warn("ramc no standby function available\n"); - return; - } - - at91_pm_set_standby(standby); -} - -void __init at91rm9200_dt_initialize(void) -{ - at91_dt_ramc(); - - at91_boot_soc.init(); -} - -void __init at91_dt_initialize(void) -{ - at91_dt_ramc(); - - if (at91_boot_soc.init) - at91_boot_soc.init(); -} diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h deleted file mode 100644 index ae6c0b2f1146..000000000000 --- a/arch/arm/mach-at91/soc.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> - * - * Under GPLv2 - */ - -struct at91_init_soc { - int builtin; - void (*map_io)(void); - void (*init)(void); -}; - -extern struct at91_init_soc at91_boot_soc; -extern struct at91_init_soc at91rm9200_soc; -extern struct at91_init_soc at91sam9260_soc; -extern struct at91_init_soc at91sam9261_soc; -extern struct at91_init_soc at91sam9263_soc; -extern struct at91_init_soc at91sam9g45_soc; -extern struct at91_init_soc at91sam9rl_soc; -extern struct at91_init_soc at91sam9x5_soc; -extern struct at91_init_soc at91sam9n12_soc; -extern struct at91_init_soc sama5d3_soc; -extern struct at91_init_soc sama5d4_soc; - -#define AT91_SOC_START(_name) \ -struct at91_init_soc __initdata _name##_soc \ - __used \ - = { \ - .builtin = 1, \ - -#define AT91_SOC_END \ -}; - -static inline int at91_soc_is_enabled(void) -{ - return at91_boot_soc.builtin; -} - -#if !defined(CONFIG_SOC_AT91RM9200) -#define at91rm9200_soc at91_boot_soc -#endif - -#if !defined(CONFIG_SOC_AT91SAM9260) -#define at91sam9260_soc at91_boot_soc -#endif - -#if !defined(CONFIG_SOC_AT91SAM9261) -#define at91sam9261_soc at91_boot_soc -#endif - -#if !defined(CONFIG_SOC_AT91SAM9263) -#define at91sam9263_soc at91_boot_soc -#endif - -#if !defined(CONFIG_SOC_AT91SAM9G45) -#define at91sam9g45_soc at91_boot_soc -#endif - -#if !defined(CONFIG_SOC_AT91SAM9RL) -#define at91sam9rl_soc at91_boot_soc -#endif - -#if !defined(CONFIG_SOC_AT91SAM9X5) -#define at91sam9x5_soc at91_boot_soc -#endif - -#if !defined(CONFIG_SOC_AT91SAM9N12) -#define at91sam9n12_soc at91_boot_soc -#endif - -#if !defined(CONFIG_SOC_SAMA5D3) -#define sama5d3_soc at91_boot_soc -#endif - -#if !defined(CONFIG_SOC_SAMA5D4) -#define sama5d4_soc at91_boot_soc -#endif diff --git a/arch/arm/mach-at91/sysirq_mask.c b/arch/arm/mach-at91/sysirq_mask.c deleted file mode 100644 index f8bc3511a8c8..000000000000 --- a/arch/arm/mach-at91/sysirq_mask.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - * sysirq_mask.c - System-interrupt masking - * - * Copyright (C) 2013 Johan Hovold <jhovold@gmail.com> - * - * Functions to disable system interrupts from backup-powered peripherals. - * - * The RTC and RTT-peripherals are generally powered by backup power (VDDBU) - * and are not reset on wake-up, user, watchdog or software reset. This means - * that their interrupts may be enabled during early boot (e.g. after a user - * reset). - * - * As the RTC and RTT share the system-interrupt line with the PIT, an - * interrupt occurring before a handler has been installed would lead to the - * system interrupt being disabled and prevent the system from booting. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#include <linux/io.h> -#include <mach/at91_rtt.h> - -#include "generic.h" - -#define AT91_RTC_IDR 0x24 /* Interrupt Disable Register */ -#define AT91_RTC_IMR 0x28 /* Interrupt Mask Register */ -#define AT91_RTC_IRQ_MASK 0x1f /* Available IRQs mask */ - -void __init at91_sysirq_mask_rtc(u32 rtc_base) -{ - void __iomem *base; - - base = ioremap(rtc_base, 64); - if (!base) - return; - - /* - * sam9x5 SoCs have the following errata: - * "RTC: Interrupt Mask Register cannot be used - * Interrupt Mask Register read always returns 0." - * - * Hence we're not relying on IMR values to disable - * interrupts. - */ - writel_relaxed(AT91_RTC_IRQ_MASK, base + AT91_RTC_IDR); - (void)readl_relaxed(base + AT91_RTC_IMR); /* flush */ - - iounmap(base); -} - -void __init at91_sysirq_mask_rtt(u32 rtt_base) -{ - void __iomem *base; - void __iomem *reg; - u32 mode; - - base = ioremap(rtt_base, 16); - if (!base) - return; - - reg = base + AT91_RTT_MR; - - mode = readl_relaxed(reg); - if (mode & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN)) { - pr_info("AT91: Disabling rtt irq\n"); - mode &= ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN); - writel_relaxed(mode, reg); - (void)readl_relaxed(reg); /* flush */ - } - - iounmap(base); -} |