diff options
Diffstat (limited to 'arch/arm/include/debug')
| -rw-r--r-- | arch/arm/include/debug/at91.S | 49 | ||||
| -rw-r--r-- | arch/arm/include/debug/digicolor.S | 35 | ||||
| -rw-r--r-- | arch/arm/include/debug/ks8695.S | 40 | ||||
| -rw-r--r-- | arch/arm/include/debug/msm.S | 6 | ||||
| -rw-r--r-- | arch/arm/include/debug/netx.S | 36 | ||||
| -rw-r--r-- | arch/arm/include/debug/sirf.S | 30 |
6 files changed, 179 insertions, 17 deletions
diff --git a/arch/arm/include/debug/at91.S b/arch/arm/include/debug/at91.S new file mode 100644 index 000000000000..80a6501b4d50 --- /dev/null +++ b/arch/arm/include/debug/at91.S @@ -0,0 +1,49 @@ +/* + * Copyright (C) 2003-2005 SAN People + * + * Debugging macro include header + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * +*/ + +#if defined(CONFIG_AT91_DEBUG_LL_DBGU0) +#define AT91_DBGU 0xfffff200 /* AT91_BASE_DBGU0 */ +#elif defined(CONFIG_AT91_DEBUG_LL_DBGU1) +#define AT91_DBGU 0xffffee00 /* AT91_BASE_DBGU1 */ +#else +/* On sama5d4, use USART3 as low level serial console */ +#define AT91_DBGU 0xfc00c000 /* SAMA5D4_BASE_USART3 */ +#endif + +/* Keep in sync with mach-at91/include/mach/hardware.h */ +#define AT91_IO_P2V(x) ((x) - 0x01000000) + +#define AT91_DBGU_SR (0x14) /* Status Register */ +#define AT91_DBGU_THR (0x1c) /* Transmitter Holding Register */ +#define AT91_DBGU_TXRDY (1 << 1) /* Transmitter Ready */ +#define AT91_DBGU_TXEMPTY (1 << 9) /* Transmitter Empty */ + + .macro addruart, rp, rv, tmp + ldr \rp, =AT91_DBGU @ System peripherals (phys address) + ldr \rv, =AT91_IO_P2V(AT91_DBGU) @ System peripherals (virt address) + .endm + + .macro senduart,rd,rx + strb \rd, [\rx, #(AT91_DBGU_THR)] @ Write to Transmitter Holding Register + .endm + + .macro waituart,rd,rx +1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register + tst \rd, #AT91_DBGU_TXRDY @ DBGU_TXRDY = 1 when ready to transmit + beq 1001b + .endm + + .macro busyuart,rd,rx +1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register + tst \rd, #AT91_DBGU_TXEMPTY @ DBGU_TXEMPTY = 1 when transmission complete + beq 1001b + .endm + diff --git a/arch/arm/include/debug/digicolor.S b/arch/arm/include/debug/digicolor.S new file mode 100644 index 000000000000..c9517150766a --- /dev/null +++ b/arch/arm/include/debug/digicolor.S @@ -0,0 +1,35 @@ +/* + * Debugging macro include header for Conexant Digicolor USART + * + * Copyright (C) 2014 Paradox Innovation Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * +*/ + +#define UA0_STATUS 0x0742 +#define UA0_EMI_REC 0x0744 + +#define UA0_STATUS_TX_READY 0x40 + +#ifdef CONFIG_DEBUG_UART_PHYS + .macro addruart, rp, rv, tmp + ldr \rp, =CONFIG_DEBUG_UART_PHYS + ldr \rv, =CONFIG_DEBUG_UART_VIRT + .endm +#endif + + .macro senduart,rd,rx + strb \rd, [\rx, #UA0_EMI_REC] + .endm + + .macro waituart,rd,rx + .endm + + .macro busyuart,rd,rx +1001: ldrb \rd, [\rx, #UA0_STATUS] + tst \rd, #UA0_STATUS_TX_READY + beq 1001b + .endm diff --git a/arch/arm/include/debug/ks8695.S b/arch/arm/include/debug/ks8695.S new file mode 100644 index 000000000000..961da1f32ab3 --- /dev/null +++ b/arch/arm/include/debug/ks8695.S @@ -0,0 +1,40 @@ +/* + * arch/arm/include/debug/ks8695.S + * + * Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk> + * Copyright (C) 2006 Simtec Electronics + * + * KS8695 - Debug macros + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#define KS8695_UART_PA 0x03ffe000 +#define KS8695_UART_VA 0xf00fe000 +#define KS8695_URTH (0x04) +#define KS8695_URLS (0x14) +#define URLS_URTE (1 << 6) +#define URLS_URTHRE (1 << 5) + + .macro addruart, rp, rv, tmp + ldr \rp, =KS8695_UART_PA @ physical base address + ldr \rv, =KS8695_UART_VA @ virtual base address + .endm + + .macro senduart, rd, rx + str \rd, [\rx, #KS8695_URTH] @ Write to Transmit Holding Register + .endm + + .macro busyuart, rd, rx +1001: ldr \rd, [\rx, #KS8695_URLS] @ Read Line Status Register + tst \rd, #URLS_URTE @ Holding & Shift registers empty? + beq 1001b + .endm + + .macro waituart, rd, rx +1001: ldr \rd, [\rx, #KS8695_URLS] @ Read Line Status Register + tst \rd, #URLS_URTHRE @ Holding Register empty? + beq 1001b + .endm diff --git a/arch/arm/include/debug/msm.S b/arch/arm/include/debug/msm.S index 9ef57612811d..e55a9426b496 100644 --- a/arch/arm/include/debug/msm.S +++ b/arch/arm/include/debug/msm.S @@ -23,6 +23,7 @@ .endm .macro senduart, rd, rx +ARM_BE8(rev \rd, \rd ) #ifdef CONFIG_DEBUG_QCOM_UARTDM @ Write the 1 character to UARTDM_TF str \rd, [\rx, #0x70] @@ -35,24 +36,29 @@ #ifdef CONFIG_DEBUG_QCOM_UARTDM @ check for TX_EMT in UARTDM_SR ldr \rd, [\rx, #0x08] +ARM_BE8(rev \rd, \rd ) tst \rd, #0x08 bne 1002f @ wait for TXREADY in UARTDM_ISR 1001: ldr \rd, [\rx, #0x14] +ARM_BE8(rev \rd, \rd ) tst \rd, #0x80 beq 1001b 1002: @ Clear TX_READY by writing to the UARTDM_CR register mov \rd, #0x300 +ARM_BE8(rev \rd, \rd ) str \rd, [\rx, #0x10] @ Write 0x1 to NCF register mov \rd, #0x1 +ARM_BE8(rev \rd, \rd ) str \rd, [\rx, #0x40] @ UARTDM reg. Read to induce delay ldr \rd, [\rx, #0x08] #else @ wait for TX_READY 1001: ldr \rd, [\rx, #0x08] +ARM_BE8(rev \rd, \rd ) tst \rd, #0x04 beq 1001b #endif diff --git a/arch/arm/include/debug/netx.S b/arch/arm/include/debug/netx.S new file mode 100644 index 000000000000..81e1b2af70f7 --- /dev/null +++ b/arch/arm/include/debug/netx.S @@ -0,0 +1,36 @@ +/* + * Debugging macro include header + * + * Copyright (C) 1994-1999 Russell King + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * +*/ + +#define UART_DATA 0 +#define UART_FLAG 0x18 +#define UART_FLAG_BUSY (1 << 3) + + .macro addruart, rp, rv, tmp + ldr \rp, =CONFIG_DEBUG_UART_PHYS + ldr \rv, =CONFIG_DEBUG_UART_VIRT + .endm + + .macro senduart,rd,rx + str \rd, [\rx, #UART_DATA] + .endm + + .macro busyuart,rd,rx +1002: ldr \rd, [\rx, #UART_FLAG] + tst \rd, #UART_FLAG_BUSY + bne 1002b + .endm + + .macro waituart,rd,rx +1001: ldr \rd, [\rx, #UART_FLAG] + tst \rd, #UART_FLAG_BUSY + bne 1001b + .endm diff --git a/arch/arm/include/debug/sirf.S b/arch/arm/include/debug/sirf.S index dbf250cf18e6..630f231f2f37 100644 --- a/arch/arm/include/debug/sirf.S +++ b/arch/arm/include/debug/sirf.S @@ -6,37 +6,33 @@ * Licensed under GPLv2 or later. */ -#if defined(CONFIG_DEBUG_SIRFPRIMA2_UART1) -#define SIRFSOC_UART1_PA_BASE 0xb0060000 -#elif defined(CONFIG_DEBUG_SIRFMARCO_UART1) -#define SIRFSOC_UART1_PA_BASE 0xcc060000 -#else -#define SIRFSOC_UART1_PA_BASE 0 -#endif +#define SIRF_LLUART_TXFIFO_STATUS 0x0114 +#define SIRF_LLUART_TXFIFO_DATA 0x0118 -#define SIRFSOC_UART1_VA_BASE 0xFEC60000 +#define SIRF_LLUART_TXFIFO_FULL (1 << 5) -#define SIRFSOC_UART_TXFIFO_STATUS 0x0114 -#define SIRFSOC_UART_TXFIFO_DATA 0x0118 +#ifdef CONFIG_DEBUG_SIRFATLAS7_UART0 +#define SIRF_LLUART_TXFIFO_EMPTY (1 << 8) +#else +#define SIRF_LLUART_TXFIFO_EMPTY (1 << 6) +#endif -#define SIRFSOC_UART1_TXFIFO_FULL (1 << 5) -#define SIRFSOC_UART1_TXFIFO_EMPTY (1 << 6) .macro addruart, rp, rv, tmp - ldr \rp, =SIRFSOC_UART1_PA_BASE @ physical - ldr \rv, =SIRFSOC_UART1_VA_BASE @ virtual + ldr \rp, =CONFIG_DEBUG_UART_PHYS @ physical + ldr \rv, =CONFIG_DEBUG_UART_VIRT @ virtual .endm .macro senduart,rd,rx - str \rd, [\rx, #SIRFSOC_UART_TXFIFO_DATA] + str \rd, [\rx, #SIRF_LLUART_TXFIFO_DATA] .endm .macro busyuart,rd,rx .endm .macro waituart,rd,rx -1001: ldr \rd, [\rx, #SIRFSOC_UART_TXFIFO_STATUS] - tst \rd, #SIRFSOC_UART1_TXFIFO_EMPTY +1001: ldr \rd, [\rx, #SIRF_LLUART_TXFIFO_STATUS] + tst \rd, #SIRF_LLUART_TXFIFO_EMPTY beq 1001b .endm |