diff options
-rw-r--r-- | recipes-framework/tensorflow/files/0001-fix-XNNPACK-build-failure-for-qemuarm.patch | 260 | ||||
-rw-r--r-- | recipes-framework/tensorflow/tensorflow-lite_2.16.1.bb | 5 |
2 files changed, 2 insertions, 263 deletions
diff --git a/recipes-framework/tensorflow/files/0001-fix-XNNPACK-build-failure-for-qemuarm.patch b/recipes-framework/tensorflow/files/0001-fix-XNNPACK-build-failure-for-qemuarm.patch deleted file mode 100644 index dea74d9..0000000 --- a/recipes-framework/tensorflow/files/0001-fix-XNNPACK-build-failure-for-qemuarm.patch +++ /dev/null @@ -1,260 +0,0 @@ -From c15caa4d5f133307a23114c41a9c497e5ec9da2c Mon Sep 17 00:00:00 2001 -From: Hongxu Jia <hongxu.jia@windriver.com> -Date: Thu, 23 Mar 2023 10:28:04 +0800 -Subject: [PATCH] fix XNNPACK build failure for qemuarm - -Does not support 32 bit ARM with Neon DotProduct - -Upstream-Status: Inappropriate [oe specific] - -Signed-off-by: Hongxu Jia <hongxu.jia@windriver.com> ---- - .../0001-XNNPACK-support-32-bit-x86.patch | 216 +++++++++++++++++- - 1 file changed, 209 insertions(+), 7 deletions(-) - -diff --git a/third_party/0001-XNNPACK-support-32-bit-x86.patch b/third_party/0001-XNNPACK-support-32-bit-x86.patch -index 2141c37236b..ca6a38545b1 100644 ---- a/third_party/0001-XNNPACK-support-32-bit-x86.patch -+++ b/third_party/0001-XNNPACK-support-32-bit-x86.patch -@@ -1,22 +1,36 @@ --From 2345756776fa09fd95e29f96f781e15e3b18a61b Mon Sep 17 00:00:00 2001 -+From 5ba6883121e91a334cc97ee98eea6ef0afb7a314 Mon Sep 17 00:00:00 2001 - From: Hongxu Jia <hongxu.jia@windriver.com> --Date: Tue, 17 Aug 2021 01:09:53 -0700 -+Date: Thu, 23 Mar 2023 10:11:11 +0800 - Subject: [PATCH] XNNPACK: support 32 bit x86 - - Use android_x86 as a workaround to support 32 bit x86 - -+Does not support 32 bit ARM with Neon DotProduct -+ - Upstream-Status: Inappropriate [oe specific] - - Signed-off-by: Hongxu Jia <hongxu.jia@windriver.com> - --- -- BUILD.bazel | 1 - -- 1 file changed, 1 deletion(-) -+ BUILD.bazel | 2 -- -+ ...c8-gemm-4x8c4-minmax-fp32-asm-aarch32-neondot-cortex-a55.S | 4 ++-- -+ .../gen/qc8-gemm-4x8c4-minmax-fp32-asm-aarch32-neondot-ld64.S | 4 ++-- -+ ...8-igemm-4x8c4-minmax-fp32-asm-aarch32-neondot-cortex-a55.S | 4 ++-- -+ .../qc8-igemm-4x8c4-minmax-fp32-asm-aarch32-neondot-ld64.S | 4 ++-- -+ src/qs8-gemm/4x8c4-aarch32-neondot-cortex-a55.S.in | 4 ++-- -+ src/qs8-gemm/4x8c4-aarch32-neondot-ld64.S.in | 4 ++-- -+ ...8-gemm-4x8c4-minmax-rndnu-asm-aarch32-neondot-cortex-a55.S | 4 ++-- -+ .../qs8-gemm-4x8c4-minmax-rndnu-asm-aarch32-neondot-ld64.S | 4 ++-- -+ src/qs8-igemm/4x8c4-aarch32-neondot-cortex-a55.S.in | 4 ++-- -+ src/qs8-igemm/4x8c4-aarch32-neondot-ld64.S.in | 4 ++-- -+ ...-igemm-4x8c4-minmax-rndnu-asm-aarch32-neondot-cortex-a55.S | 4 ++-- -+ .../qs8-igemm-4x8c4-minmax-rndnu-asm-aarch32-neondot-ld64.S | 4 ++-- -+ 13 files changed, 24 insertions(+), 26 deletions(-) - - diff --git a/BUILD.bazel b/BUILD.bazel --index 27ab07c9..f223d2ab 100644 -+index b2a3b58..5144903 100644 - --- a/BUILD.bazel - +++ b/BUILD.bazel --@@ -8783,7 +8783,6 @@ config_setting( -+@@ -11077,7 +11077,6 @@ config_setting( - config_setting( - name = "android_x86", - values = { -@@ -24,6 +38,194 @@ index 27ab07c9..f223d2ab 100644 - "cpu": "x86", - }, - ) -+@@ -11332,7 +11331,6 @@ alias( -+ selects.config_setting_group( -+ name = "arm_dotprod_enabled_by_default", -+ match_any = [ -+- ":aarch32", -+ ":aarch64", -+ ], -+ ) -+diff --git a/src/qc8-gemm/gen/qc8-gemm-4x8c4-minmax-fp32-asm-aarch32-neondot-cortex-a55.S b/src/qc8-gemm/gen/qc8-gemm-4x8c4-minmax-fp32-asm-aarch32-neondot-cortex-a55.S -+index 0a52e85..1bf5016 100644 -+--- a/src/qc8-gemm/gen/qc8-gemm-4x8c4-minmax-fp32-asm-aarch32-neondot-cortex-a55.S -++++ b/src/qc8-gemm/gen/qc8-gemm-4x8c4-minmax-fp32-asm-aarch32-neondot-cortex-a55.S -+@@ -45,8 +45,8 @@ -+ // int8_t output_max; d13[7] -+ // } xnn_qs8_minmax_params.neonv8; -+ -+-// iOS does not support 32 bit ARM with Neon DotProduct. -+-#ifndef __APPLE__ -++// Do not support 32 bit ARM with Neon DotProduct. -++#if 0 -+ -+ BEGIN_FUNCTION xnn_qc8_gemm_minmax_fp32_ukernel_4x8c4__asm_aarch32_neondot_cortex_a55 -+ # Push 80 bytes -+diff --git a/src/qc8-gemm/gen/qc8-gemm-4x8c4-minmax-fp32-asm-aarch32-neondot-ld64.S b/src/qc8-gemm/gen/qc8-gemm-4x8c4-minmax-fp32-asm-aarch32-neondot-ld64.S -+index 6b5a2e9..15d4a89 100644 -+--- a/src/qc8-gemm/gen/qc8-gemm-4x8c4-minmax-fp32-asm-aarch32-neondot-ld64.S -++++ b/src/qc8-gemm/gen/qc8-gemm-4x8c4-minmax-fp32-asm-aarch32-neondot-ld64.S -+@@ -45,8 +45,8 @@ -+ // int8_t output_max; d13[7] -+ // } xnn_qs8_minmax_params.neonv8; -+ -+-// iOS does not support 32 bit ARM with Neon DotProduct. -+-#ifndef __APPLE__ -++// Do not support 32 bit ARM with Neon DotProduct. -++#if 0 -+ -+ BEGIN_FUNCTION xnn_qc8_gemm_minmax_fp32_ukernel_4x8c4__asm_aarch32_neondot_ld64 -+ # Push 80 bytes -+diff --git a/src/qc8-igemm/gen/qc8-igemm-4x8c4-minmax-fp32-asm-aarch32-neondot-cortex-a55.S b/src/qc8-igemm/gen/qc8-igemm-4x8c4-minmax-fp32-asm-aarch32-neondot-cortex-a55.S -+index 5af733a..affaee8 100644 -+--- a/src/qc8-igemm/gen/qc8-igemm-4x8c4-minmax-fp32-asm-aarch32-neondot-cortex-a55.S -++++ b/src/qc8-igemm/gen/qc8-igemm-4x8c4-minmax-fp32-asm-aarch32-neondot-cortex-a55.S -+@@ -47,8 +47,8 @@ -+ // int8_t output_max; d13[7] -+ // } xnn_qs8_minmax_params.neonv8; -+ -+-// iOS does not support 32 bit ARM with Neon DotProduct. -+-#ifndef __APPLE__ -++// Do not support 32 bit ARM with Neon DotProduct. -++#if 0 -+ -+ BEGIN_FUNCTION xnn_qc8_igemm_minmax_fp32_ukernel_4x8c4__asm_aarch32_neondot_cortex_a55 -+ ADD r2, r2, 3 // kc = (kc + 3) & ~3 -+diff --git a/src/qc8-igemm/gen/qc8-igemm-4x8c4-minmax-fp32-asm-aarch32-neondot-ld64.S b/src/qc8-igemm/gen/qc8-igemm-4x8c4-minmax-fp32-asm-aarch32-neondot-ld64.S -+index 12e263b..addced4 100644 -+--- a/src/qc8-igemm/gen/qc8-igemm-4x8c4-minmax-fp32-asm-aarch32-neondot-ld64.S -++++ b/src/qc8-igemm/gen/qc8-igemm-4x8c4-minmax-fp32-asm-aarch32-neondot-ld64.S -+@@ -47,8 +47,8 @@ -+ // int8_t output_max; d13[7] -+ // } xnn_qs8_minmax_params.neonv8; -+ -+-// iOS does not support 32 bit ARM with Neon DotProduct. -+-#ifndef __APPLE__ -++// Do not support 32 bit ARM with Neon DotProduct. -++#if 0 -+ -+ BEGIN_FUNCTION xnn_qc8_igemm_minmax_fp32_ukernel_4x8c4__asm_aarch32_neondot_ld64 -+ ADD r2, r2, 3 // kc = (kc + 3) & ~3 -+diff --git a/src/qs8-gemm/4x8c4-aarch32-neondot-cortex-a55.S.in b/src/qs8-gemm/4x8c4-aarch32-neondot-cortex-a55.S.in -+index 5d97e30..5c8bbbc 100644 -+--- a/src/qs8-gemm/4x8c4-aarch32-neondot-cortex-a55.S.in -++++ b/src/qs8-gemm/4x8c4-aarch32-neondot-cortex-a55.S.in -+@@ -57,8 +57,8 @@ $else: -+ // int8_t output_max; d13[7] -+ // } xnn_qs8_minmax_params.neonv8; -+ -+-// iOS does not support 32 bit ARM with Neon DotProduct. -+-#ifndef __APPLE__ -++// Do not support 32 bit ARM with Neon DotProduct. -++#if 0 -+ -+ BEGIN_FUNCTION xnn_${DATATYPE.lower()}_gemm_minmax_${REQUANTIZATION.lower()}_ukernel_4x8c4__asm_aarch32_neondot_cortex_a55 -+ # Push 80 bytes -+diff --git a/src/qs8-gemm/4x8c4-aarch32-neondot-ld64.S.in b/src/qs8-gemm/4x8c4-aarch32-neondot-ld64.S.in -+index d542a8b..1cdbf6f 100644 -+--- a/src/qs8-gemm/4x8c4-aarch32-neondot-ld64.S.in -++++ b/src/qs8-gemm/4x8c4-aarch32-neondot-ld64.S.in -+@@ -58,8 +58,8 @@ $else: -+ // int8_t output_max; d13[7] -+ // } xnn_qs8_minmax_params.neonv8; -+ -+-// iOS does not support 32 bit ARM with Neon DotProduct. -+-#ifndef __APPLE__ -++// Do not support 32 bit ARM with Neon DotProduct. -++#if 0 -+ -+ BEGIN_FUNCTION xnn_${DATATYPE.lower()}_gemm_minmax_${REQUANTIZATION.lower()}_ukernel_4x8c4__asm_aarch32_neondot_ld64 -+ # Push 80 bytes -+diff --git a/src/qs8-gemm/gen/qs8-gemm-4x8c4-minmax-rndnu-asm-aarch32-neondot-cortex-a55.S b/src/qs8-gemm/gen/qs8-gemm-4x8c4-minmax-rndnu-asm-aarch32-neondot-cortex-a55.S -+index 7e8fc05..24defaa 100644 -+--- a/src/qs8-gemm/gen/qs8-gemm-4x8c4-minmax-rndnu-asm-aarch32-neondot-cortex-a55.S -++++ b/src/qs8-gemm/gen/qs8-gemm-4x8c4-minmax-rndnu-asm-aarch32-neondot-cortex-a55.S -+@@ -48,8 +48,8 @@ -+ // int8_t output_max; d13[7] -+ // } rndnu_neon; -+ -+-// iOS does not support 32 bit ARM with Neon DotProduct. -+-#ifndef __APPLE__ -++// Do not support 32 bit ARM with Neon DotProduct. -++#if 0 -+ -+ BEGIN_FUNCTION xnn_qs8_gemm_minmax_rndnu_ukernel_4x8c4__asm_aarch32_neondot_cortex_a55 -+ # Push 80 bytes -+diff --git a/src/qs8-gemm/gen/qs8-gemm-4x8c4-minmax-rndnu-asm-aarch32-neondot-ld64.S b/src/qs8-gemm/gen/qs8-gemm-4x8c4-minmax-rndnu-asm-aarch32-neondot-ld64.S -+index f71a348..9dcf6f3 100644 -+--- a/src/qs8-gemm/gen/qs8-gemm-4x8c4-minmax-rndnu-asm-aarch32-neondot-ld64.S -++++ b/src/qs8-gemm/gen/qs8-gemm-4x8c4-minmax-rndnu-asm-aarch32-neondot-ld64.S -+@@ -48,8 +48,8 @@ -+ // int8_t output_max; d13[7] -+ // } rndnu_neon; -+ -+-// iOS does not support 32 bit ARM with Neon DotProduct. -+-#ifndef __APPLE__ -++// Do not support 32 bit ARM with Neon DotProduct. -++#if 0 -+ -+ BEGIN_FUNCTION xnn_qs8_gemm_minmax_rndnu_ukernel_4x8c4__asm_aarch32_neondot_ld64 -+ # Push 80 bytes -+diff --git a/src/qs8-igemm/4x8c4-aarch32-neondot-cortex-a55.S.in b/src/qs8-igemm/4x8c4-aarch32-neondot-cortex-a55.S.in -+index 1651b4a..44aba03 100644 -+--- a/src/qs8-igemm/4x8c4-aarch32-neondot-cortex-a55.S.in -++++ b/src/qs8-igemm/4x8c4-aarch32-neondot-cortex-a55.S.in -+@@ -59,8 +59,8 @@ $else: -+ // int8_t output_max; d13[7] -+ // } xnn_qs8_minmax_params.neonv8; -+ -+-// iOS does not support 32 bit ARM with Neon DotProduct. -+-#ifndef __APPLE__ -++// Do not support 32 bit ARM with Neon DotProduct. -++#if 0 -+ -+ BEGIN_FUNCTION xnn_${DATATYPE.lower()}_igemm_minmax_${REQUANTIZATION.lower()}_ukernel_4x8c4__asm_aarch32_neondot_cortex_a55 -+ ADD r2, r2, 3 // kc = (kc + 3) & ~3 -+diff --git a/src/qs8-igemm/4x8c4-aarch32-neondot-ld64.S.in b/src/qs8-igemm/4x8c4-aarch32-neondot-ld64.S.in -+index 2e2d17d..6f9c5cc 100644 -+--- a/src/qs8-igemm/4x8c4-aarch32-neondot-ld64.S.in -++++ b/src/qs8-igemm/4x8c4-aarch32-neondot-ld64.S.in -+@@ -60,8 +60,8 @@ $else: -+ // int8_t output_max; d13[7] -+ // } xnn_qs8_minmax_params.neonv8; -+ -+-// iOS does not support 32 bit ARM with Neon DotProduct. -+-#ifndef __APPLE__ -++// Do not support 32 bit ARM with Neon DotProduct. -++#if 0 -+ -+ BEGIN_FUNCTION xnn_${DATATYPE.lower()}_igemm_minmax_${REQUANTIZATION.lower()}_ukernel_4x8c4__asm_aarch32_neondot_ld64 -+ ADD r2, r2, 3 // kc = (kc + 3) & ~3 -+diff --git a/src/qs8-igemm/gen/qs8-igemm-4x8c4-minmax-rndnu-asm-aarch32-neondot-cortex-a55.S b/src/qs8-igemm/gen/qs8-igemm-4x8c4-minmax-rndnu-asm-aarch32-neondot-cortex-a55.S -+index 7b50fc5..2bb9477 100644 -+--- a/src/qs8-igemm/gen/qs8-igemm-4x8c4-minmax-rndnu-asm-aarch32-neondot-cortex-a55.S -++++ b/src/qs8-igemm/gen/qs8-igemm-4x8c4-minmax-rndnu-asm-aarch32-neondot-cortex-a55.S -+@@ -50,8 +50,8 @@ -+ // int8_t output_max; d13[7] -+ // } rndnu_neon; -+ -+-// iOS does not support 32 bit ARM with Neon DotProduct. -+-#ifndef __APPLE__ -++// Do not support 32 bit ARM with Neon DotProduct. -++#if 0 -+ -+ BEGIN_FUNCTION xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__asm_aarch32_neondot_cortex_a55 -+ ADD r2, r2, 3 // kc = (kc + 3) & ~3 -+diff --git a/src/qs8-igemm/gen/qs8-igemm-4x8c4-minmax-rndnu-asm-aarch32-neondot-ld64.S b/src/qs8-igemm/gen/qs8-igemm-4x8c4-minmax-rndnu-asm-aarch32-neondot-ld64.S -+index 2797425..be14ae4 100644 -+--- a/src/qs8-igemm/gen/qs8-igemm-4x8c4-minmax-rndnu-asm-aarch32-neondot-ld64.S -++++ b/src/qs8-igemm/gen/qs8-igemm-4x8c4-minmax-rndnu-asm-aarch32-neondot-ld64.S -+@@ -50,8 +50,8 @@ -+ // int8_t output_max; d13[7] -+ // } rndnu_neon; -+ -+-// iOS does not support 32 bit ARM with Neon DotProduct. -+-#ifndef __APPLE__ -++// Do not support 32 bit ARM with Neon DotProduct. -++#if 0 -+ -+ BEGIN_FUNCTION xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__asm_aarch32_neondot_ld64 -+ ADD r2, r2, 3 // kc = (kc + 3) & ~3 - -- --2.30.2 -+2.27.0 - --- -2.27.0 - diff --git a/recipes-framework/tensorflow/tensorflow-lite_2.16.1.bb b/recipes-framework/tensorflow/tensorflow-lite_2.16.1.bb index bc3f647..dd3ef0b 100644 --- a/recipes-framework/tensorflow/tensorflow-lite_2.16.1.bb +++ b/recipes-framework/tensorflow/tensorflow-lite_2.16.1.bb @@ -12,9 +12,6 @@ SRC_URI += " \ file://cc_config.bzl.tpl \ file://yocto_compiler_configure.bzl \ " -SRC_URI:append:arm = " \ - file://0001-fix-XNNPACK-build-failure-for-qemuarm.patch \ -" SRC_URI += "https://storage.googleapis.com/download.tensorflow.org/models/inception_v3_2016_08_28_frozen.pb.tar.gz;name=model-inv3" SRC_URI[model-inv3.md5sum] = "a904ddf15593d03c7dd786d552e22d73" @@ -132,3 +129,5 @@ python __anonymous() { msg += "\nDetails: https://github.com/tensorflow/tensorflow/issues/16364" bb.warn(msg) } + +COMPATIBLE_HOST:arm = "null" |