diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux-4.19/linux-yocto-4.19.8/0663-drm-amd-pp-Fix-pp_sclk-mclk_od-not-work-on-smu7.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux-4.19/linux-yocto-4.19.8/0663-drm-amd-pp-Fix-pp_sclk-mclk_od-not-work-on-smu7.patch | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux-4.19/linux-yocto-4.19.8/0663-drm-amd-pp-Fix-pp_sclk-mclk_od-not-work-on-smu7.patch b/meta-amd-bsp/recipes-kernel/linux-4.19/linux-yocto-4.19.8/0663-drm-amd-pp-Fix-pp_sclk-mclk_od-not-work-on-smu7.patch new file mode 100644 index 00000000..d8d37884 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux-4.19/linux-yocto-4.19.8/0663-drm-amd-pp-Fix-pp_sclk-mclk_od-not-work-on-smu7.patch @@ -0,0 +1,47 @@ +From 65b65a2d7b02f6894b82a48bee81c5dfbb406ee9 Mon Sep 17 00:00:00 2001 +From: Rex Zhu <Rex.Zhu@amd.com> +Date: Mon, 22 Oct 2018 13:27:37 +0800 +Subject: [PATCH 0663/2940] drm/amd/pp: Fix pp_sclk/mclk_od not work on smu7 + +not update the dpm table with user's setting + +Acked-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 10 ++++++---- + 1 file changed, 6 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +index 32344869a3fd..198ca40567a7 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +@@ -3591,9 +3591,10 @@ static int smu7_find_dpm_states_clocks_in_dpm_table(struct pp_hwmgr *hwmgr, cons + break; + } + +- if (i >= sclk_table->count) ++ if (i >= sclk_table->count) { + data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_SCLK; +- else { ++ sclk_table->dpm_levels[i-1].value = sclk; ++ } else { + /* TODO: Check SCLK in DAL's minimum clocks + * in case DeepSleep divider update is required. + */ +@@ -3608,9 +3609,10 @@ static int smu7_find_dpm_states_clocks_in_dpm_table(struct pp_hwmgr *hwmgr, cons + break; + } + +- if (i >= mclk_table->count) ++ if (i >= mclk_table->count) { + data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_MCLK; +- ++ mclk_table->dpm_levels[i-1].value = mclk; ++ } + + if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display) + data->need_update_smu7_dpm_table |= DPMTABLE_UPDATE_MCLK; +-- +2.17.1 + |