diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/5435-drm-amd-display-Raise-dispclk-value-for-dce120-by-15.patch')
-rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/5435-drm-amd-display-Raise-dispclk-value-for-dce120-by-15.patch | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/5435-drm-amd-display-Raise-dispclk-value-for-dce120-by-15.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/5435-drm-amd-display-Raise-dispclk-value-for-dce120-by-15.patch new file mode 100644 index 00000000..0043f617 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/5435-drm-amd-display-Raise-dispclk-value-for-dce120-by-15.patch @@ -0,0 +1,48 @@ +From 106310ab4e5a8993c7019461f26c141e40aa8611 Mon Sep 17 00:00:00 2001 +From: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> +Date: Wed, 12 Sep 2018 08:55:42 -0400 +Subject: [PATCH 5435/5725] drm/amd/display: Raise dispclk value for dce120 by + 15% + +[Why] + +The DISPCLK value was previously requested to be 15% higher for all +ASICs that went through the dce110 bandwidth code path. As part of a +refactoring of dce_clocks and the dce110 set bandwidth codepath this +was removed for power saving considerations. + +That change caused display corruption under certain hardware +configurations with Vega10. + +[How] + +The 15% DISPCLK increase is brought back but only on dce110 for now. +This is should be a temporary workaround until the root cause is sorted +out for why this occurs on Vega (or other ASICs, if reported). + +Change-Id: If3fe9d13baa3a430dd3b40bd6813f741ae451ddb +Tested-by: Nick Sarnie <sarnex@gentoo.org> +Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> +Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> +Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> +--- + drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c +index d52dead..aa6bd41 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c ++++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c +@@ -462,6 +462,9 @@ static void dce12_update_clocks(struct dccg *dccg, + { + struct dm_pp_clock_for_voltage_req clock_voltage_req = {0}; + ++ /* TODO: Investigate why this is needed to fix display corruption. */ ++ new_clocks->dispclk_khz = new_clocks->dispclk_khz * 115 / 100; ++ + if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, dccg->clks.dispclk_khz)) { + clock_voltage_req.clk_type = DM_PP_CLOCK_TYPE_DISPLAY_CLK; + clock_voltage_req.clocks_in_khz = new_clocks->dispclk_khz; +-- +2.7.4 + |