diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/5267-drm-amdgpu-add-picasso-support-for-gmc.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/5267-drm-amdgpu-add-picasso-support-for-gmc.patch | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/5267-drm-amdgpu-add-picasso-support-for-gmc.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/5267-drm-amdgpu-add-picasso-support-for-gmc.patch new file mode 100644 index 00000000..01d73f0c --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/5267-drm-amdgpu-add-picasso-support-for-gmc.patch @@ -0,0 +1,54 @@ +From 526c60c33960d28d47249723aedbab69733d1ade Mon Sep 17 00:00:00 2001 +From: Likun Gao <Likun.Gao@amd.com> +Date: Tue, 10 Jul 2018 20:26:41 +0800 +Subject: [PATCH 5267/5725] drm/amdgpu: add picasso support for gmc + +Same as raven. + +Signed-off-by: Likun Gao <Likun.Gao@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Reviewed-by: Huang Rui <ray.huang@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +index 7e9d1c6..f4a9ca2 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +@@ -837,6 +837,7 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev) + adev->gmc.gart_size = 512ULL << 20; + break; + case CHIP_RAVEN: /* DCE SG support */ ++ case CHIP_PICASSO: /* DCE SG support */ + adev->gmc.gart_size = 1024ULL << 20; + break; + } +@@ -925,6 +926,7 @@ static int gmc_v9_0_sw_init(void *handle) + adev->gmc.vram_type = amdgpu_atomfirmware_get_vram_type(adev); + switch (adev->asic_type) { + case CHIP_RAVEN: ++ case CHIP_PICASSO: + if (adev->rev_id == 0x0 || adev->rev_id == 0x1) { + amdgpu_vm_adjust_size(adev, 256 * 1024, 9, 3, 48); + } else { +@@ -1056,6 +1058,7 @@ static void gmc_v9_0_init_golden_registers(struct amdgpu_device *adev) + case CHIP_VEGA12: + break; + case CHIP_RAVEN: ++ case CHIP_PICASSO: + soc15_program_register_sequence(adev, + golden_settings_athub_1_0_0, + ARRAY_SIZE(golden_settings_athub_1_0_0)); +@@ -1090,6 +1093,7 @@ static int gmc_v9_0_gart_enable(struct amdgpu_device *adev) + + switch (adev->asic_type) { + case CHIP_RAVEN: ++ case CHIP_PICASSO: + mmhub_v1_0_initialize_power_gating(adev); + mmhub_v1_0_update_power_gating(adev, true); + break; +-- +2.7.4 + |