aboutsummaryrefslogtreecommitdiffstats
path: root/features/intel-pinctrl
AgeCommit message (Collapse)Author
2023-08-08features/intel-pinctrl: add pinctrl driver for Intel Alder LakeYongxin Liu
Signed-off-by: Yongxin Liu <yongxin.liu@windriver.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@gmail.com>
2023-02-08features/intel-pinctrl: add pinctrl driver for Intel Elkhart LakeYongxin Liu
Signed-off-by: Yongxin Liu <yongxin.liu@windriver.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@gmail.com>
2021-02-28features/intel-pinctrl: add pinctrl driver for Intel Tiger LakeYongxin Liu
Pinctrl/GPIO support for Intel Tiger Lake SoC was added in kernel commit c9ccf71fc8 ("pinctrl: intel: Add Intel Tiger Lake pin controller support"), since v5.5-rc1. Signed-off-by: Yongxin Liu <yongxin.liu@windriver.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@gmail.com>
2020-01-15features/intel-pinctrl: remove CONFIG_GPIO_LYNXPOINTNaveen Saini
Lynxpoint GPIO driver moved under Intel pin control umbrella for further transformation to a real pin control driver. CONFIG_GPIO_LYNXPOINT renamed to PINCTRL_LYNXPOINT https://github.com/intel/linux-intel-lts/commit/cb81404ffe750270f072d1fc839a4afe288046f3 Signed-off-by: Naveen Saini <naveen.kumar.saini@intel.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@gmail.com>
2019-12-12features/intel-pinctrl: Add pinctrl driver for intel platformsYongxin Liu
Add pinctrl and GPIO driver support for Cedar Fork, Denverton, Gemini Lake SoC, Ice Lake PCH and Lewisburg. Signed-off-by: Yongxin Liu <yongxin.liu@windriver.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@gmail.com>
2019-10-07meta: add SPDX License Identifier and updates 00-README with License policyYann CARDAILLAC
Signed-off-by: Yann CARDAILLAC <ycnakajsph@gmail.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@gmail.com>
2019-03-18intel-pinctrl: add pinctrl support for cannonlakePradhan Surya Narayanx
This patch adds pinctrl support for cannonlake. Signed-off-by: Pradhan Surya Narayanx <surya.narayanx.pradhan@intel.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@gmail.com>
2018-09-06intel-x86: Some required kernel config is not enabled as expectedHongzhi.Song
According to the changes before linux-4.18-rc6, we must add new dependency for some config option or modify them value. 1. If "CONFIG_PINCTRL_SUNRISEPOINT=m", CONFIG_PINCTRL_INTEL cann't be set y, because CONFIG_PINCTRL_INTEL is selected by CONFIG_PINCTRL_SUNRISEPOINT. 2. The dependency of CONFIG_MMC_REALTEK_PCI is change to CONFIG_MISC_RTSX_PCI. 3. CONFIG_INTEL_SOC_PMIC_BXTWC is a new dependency for CONFIG_INTEL_BXT_PMIC_THERMAL. 4. The value of CONFIG_HW_RANDOM_TPM must be equal to CONFIG_TCG_TPM. Signed-off-by: Hongzhi.Song <hongzhi.song@windriver.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com>
2016-04-29intel-pinctrl: enable pinctrl driver for skylakeOng Chun Weng
This patch is to enable the pin control for skylake. Signed-off-by: Ong Chun Weng <chun.weng.ong@intel.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com>
2016-04-12features: enable pinctrl driver for BroxtonChang Rebecca Swee Fun
linux-yocto-4.1 has pin control driver support for Broxton. We should enable the driver through intel-pinctrl config fragments. Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com>
2015-03-24intel-pinctrl: Add new configurationSaul Wold
Add PINCTRL_CHERRYVIEW and PINCTRL_BAYTRAIL here since more devices will have PINCTRL for SoC and GPIO pins Signed-off-by: Saul Wold <sgw@linux.intel.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com>
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-04-27 11:11:36 +0000