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Machines: Move baremetal machines to meta-xilinx-standalone
Layers:
- Add new meta-xilinx-standalone-experimental
This layer may require components that may not yet be available to the
general public. It will contain various experiemntal integration work.
- meta-xilinx-standalone
This layer should be functional and contain the necessary items to build a
baremetal toolchain that can use libxil (replacement to libgloss) from
the Xilinx embeddedsw components. (Note, libxil is NOT built as part of
this work!)
The layer also contains the buildable components for the various firmware
components required to startup various Xilinx FPGAs.
Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org>
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The various Xilinx FPGAs may have more then one CPU type including
cortexr5, microblaze and regular ARM Cortex CPUs.
Adding a new soc-tune-include.inc will allow the machine to choose a
default tune, and then the correct matching tune will be loaded.
In a perfect world this wouldn't be required, but doing it this way
permits us to target specific optimizations or CPUs in the soc.
Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
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The BSPs had defined their own internal tunes. Instead use the yocto
project default tunes.
Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
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This patch updates the COMPATIBLE_HOST and COMPATIBLE_MACHINE
and DTBFILE variables to compile esw use cases for cortexa72 processor.
Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
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Unify the meta-xilinx-bsp and meta-xilinx-standalone layers
by moving the machine confs to the BSP layer and keeping the
standalone layer as a DISTRO layer
Signed-off-by: Alejandro Enedino Hernandez Samaniego <alejandr@xilinx.com>
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Mark Hatle
Mark Hatle
Appana Durga Kedareswara rao
Alejandro Enedino Hernandez Samaniego