diff options
Diffstat (limited to 'meta-xilinx-bsp/recipes-microblaze/gcc')
5 files changed, 274 insertions, 0 deletions
diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0001-Revert.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0001-Revert.patch new file mode 100644 index 00000000..8501bd87 --- /dev/null +++ b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0001-Revert.patch @@ -0,0 +1,42 @@ +From cd395cbdaa551924459d6ecf143cb8e4a5771f2f Mon Sep 17 00:00:00 2001 +From: eager <eager@138bc75d-0d04-0410-961f-82ee72b054a4> +Date: Sat, 27 May 2017 18:29:40 +0000 +Subject: [PATCH 1/4] Revert: 2016-01-21 Ajit Agarwal + <ajitkum@xilinx.com> + + See https://gcc.gnu.org/ml/gcc/2017-05/msg00221.html. + + * config/microblaze/microblaze.h + (FIXED_REGISTERS): Update in macro. + (CALL_USED_REGISTERS): Update in macro. + +git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@248540 138bc75d-0d04-0410-961f-82ee72b054a4 +Upstream-Status: Backport [from post gcc-7] +--- + gcc/config/microblaze/microblaze.h | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h +index 66e4ef5c3d..2c9ece1d6c 100644 +--- a/gcc/config/microblaze/microblaze.h ++++ b/gcc/config/microblaze/microblaze.h +@@ -269,14 +269,14 @@ extern enum pipeline_type microblaze_pipe; + #define FIXED_REGISTERS \ + { \ + 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \ +- 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ ++ 1, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 1, 1, 1, 1 \ + } + + #define CALL_USED_REGISTERS \ + { \ + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ +- 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ ++ 1, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 1, 1, 1, 1 \ + } + #define GP_REG_FIRST 0 +-- +2.11.0 + diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0002-microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0002-microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch new file mode 100644 index 00000000..9aa5d98a --- /dev/null +++ b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0002-microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch @@ -0,0 +1,67 @@ +From db7a0ac634ccaa1781d0a0d17dfffd3f1719bb6d Mon Sep 17 00:00:00 2001 +From: Nathan Rossi <nathan@nathanrossi.com> +Date: Thu, 12 Nov 2015 16:09:31 +1000 +Subject: [PATCH 2/4] microblaze.md: Improve 'adddi3' and 'subdi3' insn + definitions + +Change adddi3 to handle DI immediates as the second operand, this +requires modification to the output template however reduces the need to +specify seperate templates for 16-bit positive/negative immediate +operands. The use of 32-bit immediates for the addi and addic +instructions is handled by the assembler, which will emit the imm +instructions when required. This conveniently handles the optimizable +cases where the immediate constant value does not need the higher half +words of the operands upper/lower words. + +Change the constraints of the subdi3 instruction definition such that it +does not match the second operand as an immediate value. This is because +there is no definition to handle this case nor is it possible to +implement purely with instructions as microblaze does not provide an +instruction to perform a forward arithmetic subtraction (it only +provides reverse 'rD = IMM - rA'). + +Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> +Upstream-Status: Unsubmitted +--- + gcc/config/microblaze/microblaze.md | 13 ++++++------- + 1 file changed, 6 insertions(+), 7 deletions(-) + +diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md +index b3a0011fd7..8a372d7ebb 100644 +--- a/gcc/config/microblaze/microblaze.md ++++ b/gcc/config/microblaze/microblaze.md +@@ -483,17 +483,16 @@ + ;; Adding 2 DI operands in register or reg/imm + + (define_insn "adddi3" +- [(set (match_operand:DI 0 "register_operand" "=d,d,d") +- (plus:DI (match_operand:DI 1 "register_operand" "%d,d,d") +- (match_operand:DI 2 "arith_operand32" "d,P,N")))] ++ [(set (match_operand:DI 0 "register_operand" "=d,d") ++ (plus:DI (match_operand:DI 1 "register_operand" "%d,d") ++ (match_operand:DI 2 "arith_operand" "d,i")))] + "" + "@ + add\t%L0,%L1,%L2\;addc\t%M0,%M1,%M2 +- addi\t%L0,%L1,%2\;addc\t%M0,%M1,r0 +- addi\t%L0,%L1,%2\;addc\t%M0,%M1,r0\;addi\t%M0,%M0,-1" ++ addi\t%L0,%L1,%j2\;addic\t%M0,%M1,%h2" + [(set_attr "type" "darith") + (set_attr "mode" "DI") +- (set_attr "length" "8,8,12")]) ++ (set_attr "length" "8,8")]) + + ;;---------------------------------------------------------------- + ;; Subtraction +@@ -530,7 +529,7 @@ + (define_insn "subdi3" + [(set (match_operand:DI 0 "register_operand" "=&d") + (minus:DI (match_operand:DI 1 "register_operand" "d") +- (match_operand:DI 2 "arith_operand32" "d")))] ++ (match_operand:DI 2 "register_operand" "d")))] + "" + "rsub\t%L0,%L2,%L1\;rsubc\t%M0,%M2,%M1" + [(set_attr "type" "darith") +-- +2.11.0 + diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0003-microblaze-sync.md-Correct-behaviour-and-define-side.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0003-microblaze-sync.md-Correct-behaviour-and-define-side.patch new file mode 100644 index 00000000..9336291b --- /dev/null +++ b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0003-microblaze-sync.md-Correct-behaviour-and-define-side.patch @@ -0,0 +1,76 @@ +From 6c7a10a9e077d0221cc9a6c5f5a6365815c1dca4 Mon Sep 17 00:00:00 2001 +From: Nathan Rossi <nathan@nathanrossi.com> +Date: Mon, 12 Jun 2017 00:28:42 +1000 +Subject: [PATCH 3/4] microblaze/sync.md: Correct behaviour and define + side-effects + +This change corrects the behaviour with regards to the bool output. +Previously the definition would set the bool operand to true (non-zero) +on failure, specifically at the 'cmp' against the expected operand which +would be set non-zero when the memory != expected value. Instead of +using the bool operand as the compare result use the clobbered %8 +operand for temporary comparison result and set the bool operand at the +end of the definition to true (in this case the immediate value of 1). +Also to ensure that the bool operand is 0 in all other cases the first +instruction which is intended as a clear of the carry bit is reused to +set the bool operand to 0 at the same time as clearing the carry bit. +And finally the jump offsets were updated + +Additional to the behaviour change this change defines the side-effects +of the atomic_compare_and_swap. Specifically the side effects where the +bool and val operands are modified/set based on the value of the memory +content. This prevents certain optimization behaviour from incorrectly +optimizing away code. An example of this is the snippet below, where in +certain cases the comparison is optimized away entirely. + + mem = 2; + if (atomic_compare_and_swap(&mem, ...) == 2) + ... + +Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> +Upstream-Status: Unsubmitted +--- + gcc/config/microblaze/sync.md | 14 ++++++++------ + 1 file changed, 8 insertions(+), 6 deletions(-) + +diff --git a/gcc/config/microblaze/sync.md b/gcc/config/microblaze/sync.md +index 8125bd8d63..605a9a969e 100644 +--- a/gcc/config/microblaze/sync.md ++++ b/gcc/config/microblaze/sync.md +@@ -18,9 +18,10 @@ + ;; <http://www.gnu.org/licenses/>. + + (define_insn "atomic_compare_and_swapsi" +- [(match_operand:SI 0 "register_operand" "=&d") ;; bool output +- (match_operand:SI 1 "register_operand" "=&d") ;; val output +- (match_operand:SI 2 "nonimmediate_operand" "+Q") ;; memory ++ [(set (match_operand:SI 0 "register_operand" "=&d") ;; bool output ++ (match_operand:SI 2 "nonimmediate_operand" "+Q")) ;; memory ++ (set (match_operand:SI 1 "register_operand" "=&d") ;; val output ++ (match_dup 2)) + (match_operand:SI 3 "register_operand" "d") ;; expected value + (match_operand:SI 4 "register_operand" "d") ;; desired value + (match_operand:SI 5 "const_int_operand" "") ;; is_weak +@@ -29,15 +30,16 @@ + (clobber (match_scratch:SI 8 "=&d"))] + "" + { +- output_asm_insn ("addc \tr0,r0,r0", operands); ++ output_asm_insn ("add \t%0,r0,r0", operands); + output_asm_insn ("lwx \t%1,%y2,r0", operands); + output_asm_insn ("addic\t%8,r0,0", operands); + output_asm_insn ("bnei \t%8,.-8", operands); +- output_asm_insn ("cmp \t%0,%1,%3", operands); +- output_asm_insn ("bnei \t%0,.+16", operands); ++ output_asm_insn ("cmp \t%8,%1,%3", operands); ++ output_asm_insn ("bnei \t%8,.+20", operands); + output_asm_insn ("swx \t%4,%y2,r0", operands); + output_asm_insn ("addic\t%8,r0,0", operands); + output_asm_insn ("bnei \t%8,.-28", operands); ++ output_asm_insn ("addi \t%0,r0,1", operands); + return ""; + } + ) +-- +2.11.0 + diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0004-gcc-config-microblaze-Use-default-ident-output-gener.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0004-gcc-config-microblaze-Use-default-ident-output-gener.patch new file mode 100644 index 00000000..3b8a2f5d --- /dev/null +++ b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0004-gcc-config-microblaze-Use-default-ident-output-gener.patch @@ -0,0 +1,80 @@ +From 308ac81945b2674953797a9db4aee98397f88362 Mon Sep 17 00:00:00 2001 +From: Nathan Rossi <nathan@nathanrossi.com> +Date: Sat, 27 May 2017 00:00:17 +1000 +Subject: [PATCH 4/4] gcc/config/microblaze: Use default ident output + generation + +Remove the MicroBlaze specific TARGET_ASM_OUTPUT_IDENT definition, and +use the default. + +Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> +Upstream-Status: Unsubmitted +--- + gcc/config/microblaze/microblaze-protos.h | 1 - + gcc/config/microblaze/microblaze.c | 24 ------------------------ + gcc/config/microblaze/microblaze.h | 2 +- + 3 files changed, 1 insertion(+), 26 deletions(-) + +diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h +index 9ba8f2d46f..b56e052ae4 100644 +--- a/gcc/config/microblaze/microblaze-protos.h ++++ b/gcc/config/microblaze/microblaze-protos.h +@@ -51,7 +51,6 @@ extern int microblaze_regno_ok_for_base_p (int, int); + extern HOST_WIDE_INT microblaze_initial_elimination_offset (int, int); + extern void microblaze_declare_object (FILE *, const char *, const char *, + const char *, int); +-extern void microblaze_asm_output_ident (const char *); + extern int microblaze_legitimate_pic_operand (rtx); + extern bool microblaze_tls_referenced_p (rtx); + extern int symbol_mentioned_p (rtx); +diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c +index d0f86fd460..bba6983b65 100644 +--- a/gcc/config/microblaze/microblaze.c ++++ b/gcc/config/microblaze/microblaze.c +@@ -3351,30 +3351,6 @@ microblaze_eh_return (rtx op0) + emit_insn (gen_movsi (gen_rtx_MEM (Pmode, stack_pointer_rtx), op0)); + } + +-/* Queue an .ident string in the queue of top-level asm statements. +- If the string size is below the threshold, put it into .sdata2. +- If the front-end is done, we must be being called from toplev.c. +- In that case, do nothing. */ +-void +-microblaze_asm_output_ident (const char *string) +-{ +- const char *section_asm_op; +- int size; +- char *buf; +- +- if (symtab->state != PARSING) +- return; +- +- size = strlen (string) + 1; +- if (size <= microblaze_section_threshold) +- section_asm_op = SDATA2_SECTION_ASM_OP; +- else +- section_asm_op = READONLY_DATA_SECTION_ASM_OP; +- +- buf = ACONCAT ((section_asm_op, "\n\t.ascii \"", string, "\\0\"\n", NULL)); +- symtab->finalize_toplevel_asm (build_string (strlen (buf), buf)); +-} +- + static void + microblaze_elf_asm_init_sections (void) + { +diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h +index 2c9ece1d6c..ccd77e8b4d 100644 +--- a/gcc/config/microblaze/microblaze.h ++++ b/gcc/config/microblaze/microblaze.h +@@ -743,7 +743,7 @@ do { \ + #define STRING_ASM_OP "\t.asciz\t" + + #undef TARGET_ASM_OUTPUT_IDENT +-#define TARGET_ASM_OUTPUT_IDENT microblaze_asm_output_ident ++#define TARGET_ASM_OUTPUT_IDENT default_asm_output_ident_directive + + /* Default to -G 8 */ + #ifndef MICROBLAZE_DEFAULT_GVALUE +-- +2.11.0 + diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-source_7.%.bbappend b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-source_7.%.bbappend new file mode 100644 index 00000000..5b695638 --- /dev/null +++ b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-source_7.%.bbappend @@ -0,0 +1,9 @@ +# Add MicroBlaze Patches (only when using MicroBlaze) +FILESEXTRAPATHS_append_microblaze := "${THISDIR}/gcc-7:" +SRC_URI_append_microblaze = " \ + file://0001-Revert.patch \ + file://0002-microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch \ + file://0003-microblaze-sync.md-Correct-behaviour-and-define-side.patch \ + file://0004-gcc-config-microblaze-Use-default-ident-output-gener.patch \ + " + |