diff options
Diffstat (limited to 'meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7')
33 files changed, 0 insertions, 2494 deletions
diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0001-Revert.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0001-Revert.patch deleted file mode 100644 index 93af6514..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0001-Revert.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 12cd383fbef719cc1a84cc80ff171073409a8557 Mon Sep 17 00:00:00 2001 -From: eager <eager@138bc75d-0d04-0410-961f-82ee72b054a4> -Date: Sat, 27 May 2017 18:29:40 +0000 -Subject: [PATCH] Revert: 2016-01-21 Ajit Agarwal - <ajitkum@xilinx.com> - - See https://gcc.gnu.org/ml/gcc/2017-05/msg00221.html. - - * config/microblaze/microblaze.h - (FIXED_REGISTERS): Update in macro. - (CALL_USED_REGISTERS): Update in macro. - -git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@248540 138bc75d-0d04-0410-961f-82ee72b054a4 -Upstream-Status: Backport [from post gcc-7] ---- - gcc/config/microblaze/microblaze.h | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h -index 66e4ef5c3d..2c9ece1d6c 100644 ---- a/gcc/config/microblaze/microblaze.h -+++ b/gcc/config/microblaze/microblaze.h -@@ -269,14 +269,14 @@ extern enum pipeline_type microblaze_pipe; - #define FIXED_REGISTERS \ - { \ - 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \ -- 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ -+ 1, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 1, 1, 1, 1 \ - } - - #define CALL_USED_REGISTERS \ - { \ - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ -- 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ -+ 1, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 1, 1, 1, 1 \ - } - #define GP_REG_FIRST 0 --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0002-microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0002-microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch deleted file mode 100644 index 03ea8b19..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0002-microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 2d90c10cf4d95999f68f474305828c7dfc51af18 Mon Sep 17 00:00:00 2001 -From: Nathan Rossi <nathan@nathanrossi.com> -Date: Thu, 12 Nov 2015 16:09:31 +1000 -Subject: [PATCH] microblaze.md: Improve 'adddi3' and 'subdi3' insn definitions - -Change adddi3 to handle DI immediates as the second operand, this -requires modification to the output template however reduces the need to -specify seperate templates for 16-bit positive/negative immediate -operands. The use of 32-bit immediates for the addi and addic -instructions is handled by the assembler, which will emit the imm -instructions when required. This conveniently handles the optimizable -cases where the immediate constant value does not need the higher half -words of the operands upper/lower words. - -Change the constraints of the subdi3 instruction definition such that it -does not match the second operand as an immediate value. This is because -there is no definition to handle this case nor is it possible to -implement purely with instructions as microblaze does not provide an -instruction to perform a forward arithmetic subtraction (it only -provides reverse 'rD = IMM - rA'). - -Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> -Upstream-Status: Unsubmitted ---- - gcc/config/microblaze/microblaze.md | 13 ++++++------- - 1 file changed, 6 insertions(+), 7 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index b3a0011fd7..8a372d7ebb 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -483,17 +483,16 @@ - ;; Adding 2 DI operands in register or reg/imm - - (define_insn "adddi3" -- [(set (match_operand:DI 0 "register_operand" "=d,d,d") -- (plus:DI (match_operand:DI 1 "register_operand" "%d,d,d") -- (match_operand:DI 2 "arith_operand32" "d,P,N")))] -+ [(set (match_operand:DI 0 "register_operand" "=d,d") -+ (plus:DI (match_operand:DI 1 "register_operand" "%d,d") -+ (match_operand:DI 2 "arith_operand" "d,i")))] - "" - "@ - add\t%L0,%L1,%L2\;addc\t%M0,%M1,%M2 -- addi\t%L0,%L1,%2\;addc\t%M0,%M1,r0 -- addi\t%L0,%L1,%2\;addc\t%M0,%M1,r0\;addi\t%M0,%M0,-1" -+ addi\t%L0,%L1,%j2\;addic\t%M0,%M1,%h2" - [(set_attr "type" "darith") - (set_attr "mode" "DI") -- (set_attr "length" "8,8,12")]) -+ (set_attr "length" "8,8")]) - - ;;---------------------------------------------------------------- - ;; Subtraction -@@ -530,7 +529,7 @@ - (define_insn "subdi3" - [(set (match_operand:DI 0 "register_operand" "=&d") - (minus:DI (match_operand:DI 1 "register_operand" "d") -- (match_operand:DI 2 "arith_operand32" "d")))] -+ (match_operand:DI 2 "register_operand" "d")))] - "" - "rsub\t%L0,%L2,%L1\;rsubc\t%M0,%M2,%M1" - [(set_attr "type" "darith") --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0003-PR-target-83013.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0003-PR-target-83013.patch deleted file mode 100644 index 42bfd3c1..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0003-PR-target-83013.patch +++ /dev/null @@ -1,32 +0,0 @@ -From f17cdebf4e0defaefce927176ddeb9717de073d2 Mon Sep 17 00:00:00 2001 -From: law <law@138bc75d-0d04-0410-961f-82ee72b054a4> -Date: Mon, 15 Jan 2018 06:02:19 +0000 -Subject: [PATCH] PR target/83013 - - * config/microblaze/microblaze.c (microblaze_asm_output_ident): - Use .pushsection/.popsection. - -git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@256681 138bc75d-0d04-0410-961f-82ee72b054a4 -Upstream-Status: Backport [backport from trunk pre-release v8] ---- - gcc/config/microblaze/microblaze.c | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index d0f86fd460..a98aca1235 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -3371,7 +3371,9 @@ microblaze_asm_output_ident (const char *string) - else - section_asm_op = READONLY_DATA_SECTION_ASM_OP; - -- buf = ACONCAT ((section_asm_op, "\n\t.ascii \"", string, "\\0\"\n", NULL)); -+ buf = ACONCAT (("\t.pushsection", section_asm_op, -+ "\n\t.ascii \"", string, "\\0\"\n", -+ "\t.popsection\n", NULL)); - symtab->finalize_toplevel_asm (build_string (strlen (buf), buf)); - } - --- -2.15.1 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0004-dejagnu-static-testing-on-qemu-suppress-warnings.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0004-dejagnu-static-testing-on-qemu-suppress-warnings.patch deleted file mode 100644 index c0a427ea..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0004-dejagnu-static-testing-on-qemu-suppress-warnings.patch +++ /dev/null @@ -1,36 +0,0 @@ -From ab2cb6320138c173b20fee8ce6e8d4afa4696384 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:16 -0700 -Subject: [PATCH] dejagnu static testing on qemu, suppress warnings - -For dejagnu static testing on qemu, suppress warnings about multiple -definitions from the test function and libc in line with method used by -powerpc. Dynamic linking and using a qemu binary which understands -sysroot resolves all test failures with builtins - -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp -index ba16b09c41..ada149912b 100644 ---- a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp -+++ b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp -@@ -48,6 +48,10 @@ if { [istarget *-*-eabi*] - lappend additional_flags "-Wl,--allow-multiple-definition" - } - -+if [istarget "microblaze*-*-linux*"] { -+ lappend additional_flags "-Wl,-zmuldefs" -+} -+ - foreach src [lsort [find $srcdir/$subdir *.c]] { - if {![string match *-lib.c $src] && [runtest_file_p $runtests $src]} { - c-torture-execute [list $src \ --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0005-Testsuite-explicitly-add-fivopts-for-tests-that-depe.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0005-Testsuite-explicitly-add-fivopts-for-tests-that-depe.patch deleted file mode 100644 index b428d121..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0005-Testsuite-explicitly-add-fivopts-for-tests-that-depe.patch +++ /dev/null @@ -1,118 +0,0 @@ -From 7f0a129701ce9809d79ea4618f3293062bd24bbf Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:18 -0700 -Subject: [PATCH] Testsuite - explicitly add -fivopts for tests that depend on - it - -Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C | 2 +- - gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C | 2 +- - gcc/testsuite/gcc.dg/tree-ssa/loop-2.c | 2 +- - gcc/testsuite/gcc.dg/tree-ssa/loop-4.c | 2 +- - gcc/testsuite/gcc.dg/tree-ssa/loop-5.c | 2 +- - gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c | 2 +- - gcc/testsuite/gcc.dg/tree-ssa/pr19590.c | 2 +- - gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c | 2 +- - 8 files changed, 8 insertions(+), 8 deletions(-) - -diff --git a/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C b/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C -index 438db88204..ede883eb28 100644 ---- a/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C -+++ b/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C -@@ -1,5 +1,5 @@ - /* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */ --/* { dg-options "-O2 -fdump-tree-ivopts-details" } */ -+/* { dg-options "-O2 -fivopts -fdump-tree-ivopts-details" } */ - - void test (int *b, int *e, int stride) - { -diff --git a/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C b/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C -index eb72581390..02f3ea4a7d 100644 ---- a/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C -+++ b/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C -@@ -1,5 +1,5 @@ - // { dg-do compile } --// { dg-options "-O2 -fdump-tree-ivopts-details" } -+// { dg-options "-O2 -fivopts -fdump-tree-ivopts-details" } - - class MinimalVec3 - { -diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c -index bda2516735..22c8a5dcff 100644 ---- a/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c -+++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c -@@ -1,7 +1,7 @@ - /* A test for strength reduction and induction variable elimination. */ - - /* { dg-do compile } */ --/* { dg-options "-O1 -fdump-tree-optimized" } */ -+/* { dg-options "-O1 -fivopts -fdump-tree-optimized" } */ - /* { dg-require-effective-target size32plus } */ - - /* Size of this structure should be sufficiently weird so that no memory -diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c -index f0770abdbb..65d74c8e62 100644 ---- a/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c -+++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c -@@ -1,7 +1,7 @@ - /* A test for strength reduction and induction variable elimination. */ - - /* { dg-do compile } */ --/* { dg-options "-O1 -fdump-tree-optimized" } */ -+/* { dg-options "-O1 -fivopts -fdump-tree-optimized" } */ - /* { dg-require-effective-target size32plus } */ - - /* Size of this structure should be sufficiently weird so that no memory -diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c -index 5f42857fe1..9bc86ee0d2 100644 ---- a/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c -+++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c -@@ -1,7 +1,7 @@ - /* A test for induction variable merging. */ - - /* { dg-do compile } */ --/* { dg-options "-O1 -fdump-tree-optimized" } */ -+/* { dg-options "-O1 -fivopts -fdump-tree-optimized" } */ - - void foo(long); - -diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c b/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c -index 3c8ee06016..db192a657f 100644 ---- a/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c -+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c -@@ -1,5 +1,5 @@ - /* { dg-do compile } */ --/* { dg-options "-O2 -Wunsafe-loop-optimizations" } */ -+/* { dg-options "-O2 -fivopts -Wunsafe-loop-optimizations" } */ - extern void g(void); - - void -diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c b/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c -index 2c6cfc6f83..648e6e67e8 100644 ---- a/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c -+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c -@@ -1,5 +1,5 @@ - /* { dg-do compile } */ --/* { dg-options "-O2 -fdump-tree-ivopts" } */ -+/* { dg-options "-O2 -fivopts -fdump-tree-ivopts" } */ - - void vnum_test8(int *data) - { -diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c -index e911bfcd52..5d3e7e0801 100644 ---- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c -+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c -@@ -1,5 +1,5 @@ - /* { dg-do compile } */ --/* { dg-options "-Os -fdump-tree-optimized" } */ -+/* { dg-options "-Os -fivopts -fdump-tree-optimized" } */ - - /* Slightly changed testcase from PR middle-end/40815. */ - void bar(char*, char*, int); --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0006-Add-MicroBlaze-to-target-supports-for-atomic-builtin.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0006-Add-MicroBlaze-to-target-supports-for-atomic-builtin.patch deleted file mode 100644 index 6fad8bf7..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0006-Add-MicroBlaze-to-target-supports-for-atomic-builtin.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 8bcdd551f7fe585126ea3173ece976fbc646c34a Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:20 -0700 -Subject: [PATCH] Add MicroBlaze to target-supports for atomic builtin tests - -MicroBlaze added to supported targets for atomic builtin tests. - -Changelog/testsuite - -2014-02-14 David Holsgrove <david.holsgrove@xilinx.com> - - * gcc/testsuite/lib/target-supports.exp: Add microblaze to - check_effective_target_sync_int_long. - -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/testsuite/lib/target-supports.exp | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp -index 342af270ab..b0f510e596 100644 ---- a/gcc/testsuite/lib/target-supports.exp -+++ b/gcc/testsuite/lib/target-supports.exp -@@ -6715,6 +6715,7 @@ proc check_effective_target_sync_int_long { } { - && [check_effective_target_arm_acq_rel]) - || [istarget bfin*-*linux*] - || [istarget hppa*-*linux*] -+ || [istarget microblaze*-*linux*] - || [istarget s390*-*-*] - || [istarget powerpc*-*-*] - || [istarget crisv32-*-*] || [istarget cris-*-*] --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0007-Update-MicroBlaze-strings-test-for-new-scan-assembly.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0007-Update-MicroBlaze-strings-test-for-new-scan-assembly.patch deleted file mode 100644 index 069329fc..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0007-Update-MicroBlaze-strings-test-for-new-scan-assembly.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 4622988b62335af6ef17d58bf10940419fd0f99f Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:21 -0700 -Subject: [PATCH] Update MicroBlaze strings test for new scan-assembly output - resulting in use of $LC label - -ChangeLog/testsuite - -2014-02-14 David Holsgrove <david.holsgrove@xilinx.com> - - * gcc/testsuite/gcc.target/microblaze/others/strings1.c: Update - to include $LC label. - -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/testsuite/gcc.target/microblaze/others/strings1.c | 6 ++++-- - 1 file changed, 4 insertions(+), 2 deletions(-) - -diff --git a/gcc/testsuite/gcc.target/microblaze/others/strings1.c b/gcc/testsuite/gcc.target/microblaze/others/strings1.c -index 7a63faf79f..0403b7bdca 100644 ---- a/gcc/testsuite/gcc.target/microblaze/others/strings1.c -+++ b/gcc/testsuite/gcc.target/microblaze/others/strings1.c -@@ -1,13 +1,15 @@ - /* { dg-options "-O3" } */ - -+/* { dg-final { scan-assembler "\.rodata*" } } */ -+/* { dg-final { scan-assembler "addik\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),\\\$LC.*" } } */ -+/* { dg-final { scan-assembler "\lwi\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),*" } } */ -+ - #include <string.h> - --/* { dg-final { scan-assembler "\.rodata*" } } */ - extern void somefunc (char *); - int testfunc () - { - char string2[80]; --/* { dg-final { scan-assembler "\lwi\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r0,.LC*" } } */ - strcpy (string2, "hello"); - somefunc (string2); - } --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0008-Allow-MicroBlaze-.weakext-pattern-in-testsuite.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0008-Allow-MicroBlaze-.weakext-pattern-in-testsuite.patch deleted file mode 100644 index dbfeb52b..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0008-Allow-MicroBlaze-.weakext-pattern-in-testsuite.patch +++ /dev/null @@ -1,68 +0,0 @@ -From 037809e91bfed9c501ecd5272ff6d3ce96edf76c Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:22 -0700 -Subject: [PATCH] Allow MicroBlaze .weakext pattern in testsuite - -Allow MicroBlaze .weakext pattern in regex match Extend regex pattern to -include optional ext at the end of .weak to match the MicroBlaze weak -label .weakext - -ChangeLog/testsuite - -2014-02-14 David Holsgrove <david.holsgrove@xilinx.com> - - * gcc/testsuite/g++.dg/abi/rtti3.C: Extend scan-assembler - pattern to take optional ext after .weak. - * gcc/testsuite/g++.dg/abi/thunk4.C: Likewise. - -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/testsuite/g++.dg/abi/rtti3.C | 4 ++-- - gcc/testsuite/g++.dg/abi/thunk3.C | 2 +- - gcc/testsuite/g++.dg/abi/thunk4.C | 2 +- - 3 files changed, 4 insertions(+), 4 deletions(-) - -diff --git a/gcc/testsuite/g++.dg/abi/rtti3.C b/gcc/testsuite/g++.dg/abi/rtti3.C -index 0316bcb5de..5a39a0811f 100644 ---- a/gcc/testsuite/g++.dg/abi/rtti3.C -+++ b/gcc/testsuite/g++.dg/abi/rtti3.C -@@ -3,8 +3,8 @@ - - // { dg-require-weak "" } - // { dg-skip-if "Linkonce not weak" { *-*-mingw* *-*-cygwin } { "*" } { "" } } --// { dg-final { scan-assembler ".weak\[ \t\]_?_ZTSPP1A" { target { ! { *-*-darwin* hppa*-*-hpux* } } } } } --// { dg-final { scan-assembler-not ".weak\[ \t\]_?_ZTIPP1A" { target { ! { *-*-darwin* } } } } } -+// { dg-final { scan-assembler ".weak(ext)?\[ \t\]_?_ZTSPP1A" { target { ! { *-*-darwin* } } } } } -+// { dg-final { scan-assembler-not ".weak(ext)?\[ \t\]_?_ZTIPP1A" { target { ! { *-*-darwin* } } } } } - // { dg-final { scan-assembler ".weak_definition\[ \t\]_?_ZTSPP1A" { target { *-*-darwin* } } } } - // { dg-final { scan-assembler-not ".weak_definition\[ \t\]_?_ZTIPP1A" { target { *-*-darwin* } } } } - -diff --git a/gcc/testsuite/g++.dg/abi/thunk3.C b/gcc/testsuite/g++.dg/abi/thunk3.C -index f2347f79ec..dcec8a771a 100644 ---- a/gcc/testsuite/g++.dg/abi/thunk3.C -+++ b/gcc/testsuite/g++.dg/abi/thunk3.C -@@ -1,5 +1,5 @@ - // { dg-require-weak "" } --// { dg-final { scan-assembler-not ".weak\[\t \]_?_ZThn._N7Derived3FooEv" { target { ! { *-*-darwin* } } } } } -+// { dg-final { scan-assembler-not ".weak(ext)?\[\t \]_?_ZThn._N7Derived3FooEv" { target { ! { *-*-darwin* } } } } } - // { dg-final { scan-assembler-not ".weak_definition\[\t \]_?_ZThn._N7Derived3FooEv" { target { *-*-darwin* } } } } - - struct Base -diff --git a/gcc/testsuite/g++.dg/abi/thunk4.C b/gcc/testsuite/g++.dg/abi/thunk4.C -index fa5fbd4327..79cb311cab 100644 ---- a/gcc/testsuite/g++.dg/abi/thunk4.C -+++ b/gcc/testsuite/g++.dg/abi/thunk4.C -@@ -1,6 +1,6 @@ - // { dg-require-weak "" } - // { dg-skip-if "Linkonce not weak" { *-*-mingw* *-*-cygwin } { "*" } { "" } } --// { dg-final { scan-assembler ".weak\[ \t\]_?_ZThn._N7Derived3FooEv" { target { ! { *-*-darwin* } } } } } -+// { dg-final { scan-assembler ".weak(ext)?\[ \t\]_?_ZThn._N7Derived3FooEv" { target { ! { *-*-darwin* } } } } } - // { dg-final { scan-assembler ".weak_definition\[ \t\]_?_ZThn._N7Derived3FooEv" { target { *-*-darwin* } } } } - - struct Base --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0009-Add-MicroBlaze-to-check_profiling_available-Testsuit.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0009-Add-MicroBlaze-to-check_profiling_available-Testsuit.patch deleted file mode 100644 index 6b9dd991..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0009-Add-MicroBlaze-to-check_profiling_available-Testsuit.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 23a04c06c2a689fed151eeb94c45ea9b512036ae Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:23 -0700 -Subject: [PATCH] Add MicroBlaze to check_profiling_available Testsuite - -Add MicroBlaze to check_profiling_available Testsuite, add -microblaze*-*-* target in check_profiling_available inline with other -archs setting profiling_available_saved to 0 - -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/testsuite/lib/target-supports.exp | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp -index b0f510e596..fffb690e49 100644 ---- a/gcc/testsuite/lib/target-supports.exp -+++ b/gcc/testsuite/lib/target-supports.exp -@@ -625,6 +625,7 @@ proc check_profiling_available { test_what } { - || [istarget m68k-*-elf] - || [istarget m68k-*-uclinux*] - || [istarget mips*-*-elf*] -+ || [istarget microblaze*-*-*] - || [istarget mmix-*-*] - || [istarget mn10300-*-elf*] - || [istarget moxie-*-elf*] --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0010-Fix-atomic-side-effects.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0010-Fix-atomic-side-effects.patch deleted file mode 100644 index c21ca816..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0010-Fix-atomic-side-effects.patch +++ /dev/null @@ -1,69 +0,0 @@ -From c1e8a1419e8f5d18e7135fb4fe3bf21941125008 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:24 -0700 -Subject: [PATCH] Fix atomic side effects. - -In atomic_compare_and_swapsi, add side effects to prevent incorrect -assumptions during optimization. Previously, the outputs were considered -unused; this generated assembly code with undefined side effects after -invocation of the atomic. - -Signed-off-by: Kirk Meyer <kirk.meyer@sencore.com> -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/config/microblaze/microblaze.md | 3 +++ - gcc/config/microblaze/sync.md | 21 +++++++++++++-------- - 2 files changed, 16 insertions(+), 8 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 8a372d7ebb..59d629b559 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -41,6 +41,9 @@ - (UNSPEC_CMP 104) ;; signed compare - (UNSPEC_CMPU 105) ;; unsigned compare - (UNSPEC_TLS 106) ;; jump table -+ (UNSPECV_CAS_BOOL 201) ;; compare and swap (bool) -+ (UNSPECV_CAS_VAL 202) ;; compare and swap (val) -+ (UNSPECV_CAS_MEM 203) ;; compare and swap (mem) - ]) - - (define_c_enum "unspec" [ -diff --git a/gcc/config/microblaze/sync.md b/gcc/config/microblaze/sync.md -index 8125bd8d63..edf4bdd811 100644 ---- a/gcc/config/microblaze/sync.md -+++ b/gcc/config/microblaze/sync.md -@@ -18,14 +18,19 @@ - ;; <http://www.gnu.org/licenses/>. - - (define_insn "atomic_compare_and_swapsi" -- [(match_operand:SI 0 "register_operand" "=&d") ;; bool output -- (match_operand:SI 1 "register_operand" "=&d") ;; val output -- (match_operand:SI 2 "nonimmediate_operand" "+Q") ;; memory -- (match_operand:SI 3 "register_operand" "d") ;; expected value -- (match_operand:SI 4 "register_operand" "d") ;; desired value -- (match_operand:SI 5 "const_int_operand" "") ;; is_weak -- (match_operand:SI 6 "const_int_operand" "") ;; mod_s -- (match_operand:SI 7 "const_int_operand" "") ;; mod_f -+ [(set (match_operand:SI 0 "register_operand" "=&d") ;; bool output -+ (unspec_volatile:SI -+ [(match_operand:SI 2 "nonimmediate_operand" "+Q") ;; memory -+ (match_operand:SI 3 "register_operand" "d") ;; expected value -+ (match_operand:SI 4 "register_operand" "d")] ;; desired value -+ UNSPECV_CAS_BOOL)) -+ (set (match_operand:SI 1 "register_operand" "=&d") ;; val output -+ (unspec_volatile:SI [(const_int 0)] UNSPECV_CAS_VAL)) -+ (set (match_dup 2) -+ (unspec_volatile:SI [(const_int 0)] UNSPECV_CAS_MEM)) -+ (match_operand:SI 5 "const_int_operand" "") ;; is_weak -+ (match_operand:SI 6 "const_int_operand" "") ;; mod_s -+ (match_operand:SI 7 "const_int_operand" "") ;; mod_f - (clobber (match_scratch:SI 8 "=&d"))] - "" - { --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0011-Fix-atomic-boolean-return-value.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0011-Fix-atomic-boolean-return-value.patch deleted file mode 100644 index f4bc16e8..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0011-Fix-atomic-boolean-return-value.patch +++ /dev/null @@ -1,44 +0,0 @@ -From a5957bdf7acfde0a65eeba90bae11f5619bf96af Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:25 -0700 -Subject: [PATCH] Fix atomic boolean return value. - -In atomic_compare_and_swapsi, fix boolean return value. Previously, it -contained zero if successful and non-zero if unsuccessful. - -Signed-off-by: Kirk Meyer <kirk.meyer@sencore.com> -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/config/microblaze/sync.md | 7 ++++--- - 1 file changed, 4 insertions(+), 3 deletions(-) - -diff --git a/gcc/config/microblaze/sync.md b/gcc/config/microblaze/sync.md -index edf4bdd811..aadb414728 100644 ---- a/gcc/config/microblaze/sync.md -+++ b/gcc/config/microblaze/sync.md -@@ -34,15 +34,16 @@ - (clobber (match_scratch:SI 8 "=&d"))] - "" - { -- output_asm_insn ("addc \tr0,r0,r0", operands); -+ output_asm_insn ("add \t%0,r0,r0", operands); - output_asm_insn ("lwx \t%1,%y2,r0", operands); - output_asm_insn ("addic\t%8,r0,0", operands); - output_asm_insn ("bnei \t%8,.-8", operands); -- output_asm_insn ("cmp \t%0,%1,%3", operands); -- output_asm_insn ("bnei \t%0,.+16", operands); -+ output_asm_insn ("cmp \t%8,%1,%3", operands); -+ output_asm_insn ("bnei \t%8,.+20", operands); - output_asm_insn ("swx \t%4,%y2,r0", operands); - output_asm_insn ("addic\t%8,r0,0", operands); - output_asm_insn ("bnei \t%8,.-28", operands); -+ output_asm_insn ("addi \t%0,r0,1", operands); - return ""; - } - ) --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0012-Fix-the-Microblaze-crash-with-msmall-divides-flag.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0012-Fix-the-Microblaze-crash-with-msmall-divides-flag.patch deleted file mode 100644 index 464f59e3..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0012-Fix-the-Microblaze-crash-with-msmall-divides-flag.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 1a9dcdb578452ecd53e0aec65fe6279233218778 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:26 -0700 -Subject: [PATCH] Fix the Microblaze crash with msmall-divides flag - -Fix the Microblaze crash with msmall-divides flag Compiler is crashing -when we use msmall-divides and mxl-barrel-shift flag. This is because -when use above flags microblaze_expand_divide function will be called -for division operation. In microblaze_expand_divide function we are -using sub_reg but MicroBlaze doesn't have subreg register due to this -compiler was crashing. Changed the logic to avoid sub_reg call - -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/config/microblaze/microblaze.c | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index bba6983b65..15080db539 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -3527,8 +3527,7 @@ microblaze_expand_divide (rtx operands[]) - mem_rtx = gen_rtx_MEM (QImode, - gen_rtx_PLUS (Pmode, regt1, div_table_rtx)); - -- insn = emit_insn (gen_movqi (regqi, mem_rtx)); -- insn = emit_insn (gen_movsi (operands[0], gen_rtx_SUBREG (SImode, regqi, 0))); -+ insn = emit_insn (gen_zero_extendqisi2(operands[0],mem_rtx)); - jump = emit_jump_insn_after (gen_jump (div_end_label), insn); - JUMP_LABEL (jump) = div_end_label; - LABEL_NUSES (div_end_label) = 1; --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0013-Add-MicroBlaze-ashrsi_3_with_size_opt.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0013-Add-MicroBlaze-ashrsi_3_with_size_opt.patch deleted file mode 100644 index 6005e216..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0013-Add-MicroBlaze-ashrsi_3_with_size_opt.patch +++ /dev/null @@ -1,53 +0,0 @@ -From c32df2ec3d269d19b631a17cea2b6d19bbb98c27 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:27 -0700 -Subject: [PATCH] Add MicroBlaze ashrsi_3_with_size_opt - -Added ashrsi3_with_size_opt Added ashrsi3_with_size_opt pattern to -optimize the sra instructions when the -Os optimization is used. -lshrsi3_with_size_opt is being removed as it has conflicts with unsigned -int variables - -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/config/microblaze/microblaze.md | 21 +++++++++++++++++++++ - 1 file changed, 21 insertions(+) - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 59d629b559..8c0a97e032 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -1505,6 +1505,27 @@ - (set_attr "length" "4,4")] - ) - -+(define_insn "*ashrsi3_with_size_opt" -+ [(set (match_operand:SI 0 "register_operand" "=&d") -+ (ashiftrt:SI (match_operand:SI 1 "register_operand" "d") -+ (match_operand:SI 2 "immediate_operand" "I")))] -+ "(INTVAL (operands[2]) > 5 && optimize_size)" -+ { -+ operands[3] = gen_rtx_REG (SImode, MB_ABI_ASM_TEMP_REGNUM); -+ -+ output_asm_insn ("ori\t%3,r0,%2", operands); -+ if (REGNO (operands[0]) != REGNO (operands[1])) -+ output_asm_insn ("addk\t%0,%1,r0", operands); -+ -+ output_asm_insn ("addik\t%3,%3,-1", operands); -+ output_asm_insn ("bneid\t%3,.-4", operands); -+ return "sra\t%0,%0"; -+ } -+ [(set_attr "type" "arith") -+ (set_attr "mode" "SI") -+ (set_attr "length" "20")] -+) -+ - (define_insn "*ashrsi_inline" - [(set (match_operand:SI 0 "register_operand" "=&d") - (ashiftrt:SI (match_operand:SI 1 "register_operand" "d") --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0014-Removed-MicroBlaze-moddi3-routinue.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0014-Removed-MicroBlaze-moddi3-routinue.patch deleted file mode 100644 index b0195718..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0014-Removed-MicroBlaze-moddi3-routinue.patch +++ /dev/null @@ -1,156 +0,0 @@ -From a68e94fc57bcf60cb730894e49dde55d081397f5 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:28 -0700 -Subject: [PATCH] Removed MicroBlaze moddi3 routinue - -Removed moddi3 routinue Using the default moddi3 function as the -existing implementation has many bugs - -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - libgcc/config/microblaze/moddi3.S | 115 ---------------------------------- - libgcc/config/microblaze/t-microblaze | 3 +- - 2 files changed, 1 insertion(+), 117 deletions(-) - delete mode 100644 libgcc/config/microblaze/moddi3.S - -diff --git a/libgcc/config/microblaze/moddi3.S b/libgcc/config/microblaze/moddi3.S -deleted file mode 100644 -index bcea079476..0000000000 ---- a/libgcc/config/microblaze/moddi3.S -+++ /dev/null -@@ -1,115 +0,0 @@ --################################### --# --# Copyright (C) 2009-2017 Free Software Foundation, Inc. --# --# Contributed by Michael Eager <eager@eagercon.com>. --# --# This file is free software; you can redistribute it and/or modify it --# under the terms of the GNU General Public License as published by the --# Free Software Foundation; either version 3, or (at your option) any --# later version. --# --# GCC is distributed in the hope that it will be useful, but WITHOUT --# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY --# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public --# License for more details. --# --# Under Section 7 of GPL version 3, you are granted additional --# permissions described in the GCC Runtime Library Exception, version --# 3.1, as published by the Free Software Foundation. --# --# You should have received a copy of the GNU General Public License and --# a copy of the GCC Runtime Library Exception along with this program; --# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see --# <http://www.gnu.org/licenses/>. --# --# modsi3.S --# --# modulo operation for 64 bit integers. --# --####################################### -- -- -- .globl __moddi3 -- .ent __moddi3 --__moddi3: -- .frame r1,0,r15 -- --#Change the stack pointer value and Save callee saved regs -- addik r1,r1,-24 -- swi r25,r1,0 -- swi r26,r1,4 -- swi r27,r1,8 # used for sign -- swi r28,r1,12 # used for loop count -- swi r29,r1,16 # Used for div value High -- swi r30,r1,20 # Used for div value Low -- --#Check for Zero Value in the divisor/dividend -- OR r9,r5,r6 # Check for the op1 being zero -- BEQID r9,$LaResult_Is_Zero # Result is zero -- OR r9,r7,r8 # Check for the dividend being zero -- BEQI r9,$LaDiv_By_Zero # Div_by_Zero # Division Error -- BGEId r5,$La1_Pos -- XOR r27,r5,r7 # Get the sign of the result -- RSUBI r6,r6,0 # Make dividend positive -- RSUBIC r5,r5,0 # Make dividend positive --$La1_Pos: -- BGEI r7,$La2_Pos -- RSUBI r8,r8,0 # Make Divisor Positive -- RSUBIC r9,r9,0 # Make Divisor Positive --$La2_Pos: -- ADDIK r4,r0,0 # Clear mod low -- ADDIK r3,r0,0 # Clear mod high -- ADDIK r29,r0,0 # clear div high -- ADDIK r30,r0,0 # clear div low -- ADDIK r28,r0,64 # Initialize the loop count -- # First part try to find the first '1' in the r5/r6 --$LaDIV1: -- ADD r6,r6,r6 -- ADDC r5,r5,r5 # left shift logical r5 -- BGEID r5,$LaDIV1 -- ADDIK r28,r28,-1 --$LaDIV2: -- ADD r6,r6,r6 -- ADDC r5,r5,r5 # left shift logical r5/r6 get the '1' into the Carry -- ADDC r4,r4,r4 # Move that bit into the Mod register -- ADDC r3,r3,r3 # Move carry into high mod register -- rsub r18,r7,r3 # Compare the High Parts of Mod and Divisor -- bnei r18,$L_High_EQ -- rsub r18,r6,r4 # Compare Low Parts only if Mod[h] == Divisor[h] --$L_High_EQ: -- rSUB r26,r8,r4 # Subtract divisor[L] from Mod[L] -- rsubc r25,r7,r3 # Subtract divisor[H] from Mod[H] -- BLTi r25,$LaMOD_TOO_SMALL -- OR r3,r0,r25 # move r25 to mod [h] -- OR r4,r0,r26 # move r26 to mod [l] -- ADDI r30,r30,1 -- ADDC r29,r29,r0 --$LaMOD_TOO_SMALL: -- ADDIK r28,r28,-1 -- BEQi r28,$LaLOOP_END -- ADD r30,r30,r30 # Shift in the '1' into div [low] -- ADDC r29,r29,r29 # Move the carry generated into high -- BRI $LaDIV2 # Div2 --$LaLOOP_END: -- BGEI r27,$LaRETURN_HERE -- rsubi r30,r30,0 -- rsubc r29,r29,r0 -- BRI $LaRETURN_HERE --$LaDiv_By_Zero: --$LaResult_Is_Zero: -- or r29,r0,r0 # set result to 0 [High] -- or r30,r0,r0 # set result to 0 [Low] --$LaRETURN_HERE: --# Restore values of CSRs and that of r29 and the divisor and the dividend -- -- lwi r25,r1,0 -- lwi r26,r1,4 -- lwi r27,r1,8 -- lwi r28,r1,12 -- lwi r29,r1,16 -- lwi r30,r1,20 -- rtsd r15,8 -- addik r1,r1,24 -- .end __moddi3 -- -diff --git a/libgcc/config/microblaze/t-microblaze b/libgcc/config/microblaze/t-microblaze -index 96959f0292..8d954a4957 100644 ---- a/libgcc/config/microblaze/t-microblaze -+++ b/libgcc/config/microblaze/t-microblaze -@@ -1,8 +1,7 @@ --LIB2FUNCS_EXCLUDE += _divsi3 _modsi3 _moddi3 _mulsi3 _udivsi3 _umodsi3 -+LIB2FUNCS_EXCLUDE += _divsi3 _modsi3 _mulsi3 _udivsi3 _umodsi3 - - LIB2ADD += \ - $(srcdir)/config/microblaze/divsi3.S \ -- $(srcdir)/config/microblaze/moddi3.S \ - $(srcdir)/config/microblaze/modsi3.S \ - $(srcdir)/config/microblaze/muldi3_hard.S \ - $(srcdir)/config/microblaze/mulsi3.S \ --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0015-MicroBlaze-fixed-missing-save-of-r18-in-fast_interru.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0015-MicroBlaze-fixed-missing-save-of-r18-in-fast_interru.patch deleted file mode 100644 index e75bebeb..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0015-MicroBlaze-fixed-missing-save-of-r18-in-fast_interru.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 79ea36649467aea6045a49c7d016f8f9245efb8c Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:29 -0700 -Subject: [PATCH] MicroBlaze fixed missing save of r18 in fast_interrupt - -Fixed missing save of r18 in fast_interrupt. Register 18 is used as a -clobber register, and must be stored when entering a fast_interrupt. -Before this fix, register 18 was only saved if it was used directly in -the interrupt function. - -However, if the fast_interrupt function called a function that used -r18, the register would not be saved, and thus be mangled -upon returning from the interrupt. - -Changelog - -2014-02-27 Klaus Petersen <klauspetersen@gmail.com> - - * gcc/config/microblaze/microblaze.c: Check for fast_interrupt in - microblaze_must_save_register. - -Signed-off-by: Klaus Petersen <klauspetersen@gmail.com> -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/config/microblaze/microblaze.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index 15080db539..558796cad9 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -1943,7 +1943,7 @@ microblaze_must_save_register (int regno) - { - if (df_regs_ever_live_p (regno) - || regno == MB_ABI_MSR_SAVE_REG -- || (interrupt_handler -+ || ((interrupt_handler || fast_interrupt) - && (regno == MB_ABI_ASM_TEMP_REGNUM - || regno == MB_ABI_EXCEPTION_RETURN_ADDR_REGNUM))) - return 1; --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0016-MicroBlaze-use-bralid-for-profiler-calls.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0016-MicroBlaze-use-bralid-for-profiler-calls.patch deleted file mode 100644 index f5de718e..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0016-MicroBlaze-use-bralid-for-profiler-calls.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 6ed57ee8219e5d09a294b329dd7c531a1868dc8a Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:31 -0700 -Subject: [PATCH] MicroBlaze use bralid for profiler calls - -Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/config/microblaze/microblaze.h | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h -index ccd77e8b4d..0dd8b853e2 100644 ---- a/gcc/config/microblaze/microblaze.h -+++ b/gcc/config/microblaze/microblaze.h -@@ -519,7 +519,7 @@ typedef struct microblaze_args - - #define FUNCTION_PROFILER(FILE, LABELNO) { \ - { \ -- fprintf (FILE, "\tbrki\tr16,_mcount\n"); \ -+ fprintf (FILE, "\tbralid\tr15,_mcount\nnop\n"); \ - } \ - } - --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0017-Disable-fivopts-by-default-Turn-off-ivopts-by-defaul.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0017-Disable-fivopts-by-default-Turn-off-ivopts-by-defaul.patch deleted file mode 100644 index 4041e11f..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0017-Disable-fivopts-by-default-Turn-off-ivopts-by-defaul.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 25b161dd222311cca0e6ab46b7f3be444bd4bbe8 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:32 -0700 -Subject: [PATCH] Disable fivopts by default Turn off ivopts by default. - Interferes with cse. - -Changelog - -2013-03-18 Edgar E. Iglesias <edgar.iglesias@xilinx.com> - - * gcc/common/config/microblaze/microblaze-common.c - (microblaze_option_optimization_table): Disable fivopts by default. - -Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/common/config/microblaze/microblaze-common.c | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/gcc/common/config/microblaze/microblaze-common.c b/gcc/common/config/microblaze/microblaze-common.c -index 4975663305..8ddc4c3cbe 100644 ---- a/gcc/common/config/microblaze/microblaze-common.c -+++ b/gcc/common/config/microblaze/microblaze-common.c -@@ -27,6 +27,8 @@ - /* Implement TARGET_OPTION_OPTIMIZATION_TABLE. */ - static const struct default_options microblaze_option_optimization_table[] = - { -+ /* Turn off ivopts by default. It messes up cse. */ -+ { OPT_LEVELS_ALL, OPT_fivopts, NULL, 0 }, - { OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 }, - { OPT_LEVELS_NONE, 0, NULL, 0 } - }; --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0018-Add-INIT_PRIORITY-support-Added-TARGET_ASM_CONSTRUCT.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0018-Add-INIT_PRIORITY-support-Added-TARGET_ASM_CONSTRUCT.patch deleted file mode 100644 index 5239d2bd..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0018-Add-INIT_PRIORITY-support-Added-TARGET_ASM_CONSTRUCT.patch +++ /dev/null @@ -1,104 +0,0 @@ -From 02d8afd50a868e827ac8b6b6243c69922cd694ed Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:34 -0700 -Subject: [PATCH] Add INIT_PRIORITY support Added TARGET_ASM_CONSTRUCTOR and - TARGET_ASM_DESTRUCTOR macros. - -These macros allows users to control the order of initialization -of objects defined at namespace scope with the init_priority -attribute by specifying a relative priority, a constant integral -expression currently bounded between 101 and 65535 inclusive. - -Lower numbers indicate a higher priority. - -Changelog - -2013-11-26 Nagaraju Mekala <nagaraju.mekala@xilinx.com> - - * gcc/config/microblaze/microblaze.c: Add microblaze_asm_constructor, - microblaze_asm_destructor. Define TARGET_ASM_CONSTRUCTOR and - TARGET_ASM_DESTRUCTOR. - -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/config/microblaze/microblaze.c | 53 ++++++++++++++++++++++++++++++++++++++ - 1 file changed, 53 insertions(+) - -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index 558796cad9..c1b0172bcf 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -2530,6 +2530,53 @@ print_operand_address (FILE * file, rtx addr) - } - } - -+/* Output an element in the table of global constructors. */ -+void -+microblaze_asm_constructor (rtx symbol ATTRIBUTE_UNUSED, int priority) -+{ -+ const char *section = ".ctors"; -+ char buf[16]; -+ -+ if (priority != DEFAULT_INIT_PRIORITY) -+ { -+ sprintf (buf, ".ctors.%.5u", -+ /* Invert the numbering so the linker puts us in the proper -+ order; constructors are run from right to left, and the -+ linker sorts in increasing order. */ -+ MAX_INIT_PRIORITY - priority); -+ section = buf; -+ } -+ -+ switch_to_section (get_section (section, 0, NULL)); -+ assemble_align (POINTER_SIZE); -+ fputs ("\t.word\t", asm_out_file); -+ output_addr_const (asm_out_file, symbol); -+ fputs ("\n", asm_out_file); -+} -+ -+/* Output an element in the table of global destructors. */ -+void -+microblaze_asm_destructor (rtx symbol, int priority) -+{ -+ const char *section = ".dtors"; -+ char buf[16]; -+ if (priority != DEFAULT_INIT_PRIORITY) -+ { -+ sprintf (buf, ".dtors.%.5u", -+ /* Invert the numbering so the linker puts us in the proper -+ order; constructors are run from right to left, and the -+ linker sorts in increasing order. */ -+ MAX_INIT_PRIORITY - priority); -+ section = buf; -+ } -+ -+ switch_to_section (get_section (section, 0, NULL)); -+ assemble_align (POINTER_SIZE); -+ fputs ("\t.word\t", asm_out_file); -+ output_addr_const (asm_out_file, symbol); -+ fputs ("\n", asm_out_file); -+} -+ - /* Emit either a label, .comm, or .lcomm directive, and mark that the symbol - is used, so that we don't emit an .extern for it in - microblaze_asm_file_end. */ -@@ -3775,6 +3822,12 @@ microblaze_machine_dependent_reorg (void) - #undef TARGET_ATTRIBUTE_TABLE - #define TARGET_ATTRIBUTE_TABLE microblaze_attribute_table - -+#undef TARGET_ASM_CONSTRUCTOR -+#define TARGET_ASM_CONSTRUCTOR microblaze_asm_constructor -+ -+#undef TARGET_ASM_DESTRUCTOR -+#define TARGET_ASM_DESTRUCTOR microblaze_asm_destructor -+ - #undef TARGET_IN_SMALL_DATA_P - #define TARGET_IN_SMALL_DATA_P microblaze_elf_in_small_data_p - --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0019-MicroBlaze-add-optimized-lshrsi3-When-barrel-shifter.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0019-MicroBlaze-add-optimized-lshrsi3-When-barrel-shifter.patch deleted file mode 100644 index 049ce3fe..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0019-MicroBlaze-add-optimized-lshrsi3-When-barrel-shifter.patch +++ /dev/null @@ -1,87 +0,0 @@ -From 0b2061ac7706df97da3e8b3c01c6a5cfc504c16e Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:35 -0700 -Subject: [PATCH] MicroBlaze add optimized lshrsi3 When barrel shifter is not - present - -Add optimized lshrsi3 When barrel shifter is not present, the immediate -value is greater than #5 and optimization is -OS, the compiler will -generate shift operation using loop. - -Changelog - -2013-11-26 David Holsgrove <david.holsgrove@xilinx.com> - - * gcc/config/microblaze/microblaze.md: Add size optimized lshrsi3 insn - -ChangeLog/testsuite - -2014-02-12 David Holsgrove <david.holsgrove@xilinx.com> - - * gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c: New test. - -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/config/microblaze/microblaze.md | 21 +++++++++++++++++++++ - .../gcc.target/microblaze/others/lshrsi_Os_1.c | 13 +++++++++++++ - 2 files changed, 34 insertions(+) - create mode 100644 gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 8c0a97e032..abbe97c15f 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -1615,6 +1615,27 @@ - (set_attr "length" "4,4")] - ) - -+(define_insn "*lshrsi3_with_size_opt" -+ [(set (match_operand:SI 0 "register_operand" "=&d") -+ (lshiftrt:SI (match_operand:SI 1 "register_operand" "d") -+ (match_operand:SI 2 "immediate_operand" "I")))] -+ "(INTVAL (operands[2]) > 5 && optimize_size)" -+ { -+ operands[3] = gen_rtx_REG (SImode, MB_ABI_ASM_TEMP_REGNUM); -+ -+ output_asm_insn ("ori\t%3,r0,%2", operands); -+ if (REGNO (operands[0]) != REGNO (operands[1])) -+ output_asm_insn ("addk\t%0,%1,r0", operands); -+ -+ output_asm_insn ("addik\t%3,%3,-1", operands); -+ output_asm_insn ("bneid\t%3,.-4", operands); -+ return "srl\t%0,%0"; -+ } -+ [(set_attr "type" "multi") -+ (set_attr "mode" "SI") -+ (set_attr "length" "20")] -+) -+ - (define_insn "*lshrsi_inline" - [(set (match_operand:SI 0 "register_operand" "=&d") - (lshiftrt:SI (match_operand:SI 1 "register_operand" "d") -diff --git a/gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c b/gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c -new file mode 100644 -index 0000000000..32a3be7c76 ---- /dev/null -+++ b/gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c -@@ -0,0 +1,13 @@ -+/* { dg-options "-Os -mno-xl-barrel-shift" } */ -+ -+void testfunc(void) -+{ -+ unsigned volatile int z = 8192; -+ z >>= 8; -+} -+/* { dg-final { scan-assembler-not "\bsrli" } } */ -+/* { dg-final { scan-assembler "\ori\tr18,r0" } } */ -+/* { dg-final { scan-assembler "addk\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r0" } } */ -+/* { dg-final { scan-assembler "addik\tr18,r18,-1" } } */ -+/* { dg-final { scan-assembler "bneid\tr18,.-4" } } */ -+/* { dg-final { scan-assembler "\srl\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1])" } } */ --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0020-Modified-MicroBlaze-trap-instruction.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0020-Modified-MicroBlaze-trap-instruction.patch deleted file mode 100644 index 00e79b93..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0020-Modified-MicroBlaze-trap-instruction.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 1b9bd76840fc1e67770a23c58bf18a24a25eb2b9 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:36 -0700 -Subject: [PATCH] Modified MicroBlaze trap instruction - -Modified trap instruction The instruction was wrongly written to brki -r0,-1 it should be bri r0. Modified with the correct instruction - -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> -Signed-off-by: Ajit Agarwal <ajitkum@xilinx.com> -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/config/microblaze/microblaze.md | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index abbe97c15f..a3954a24b6 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -2343,7 +2343,7 @@ - (define_insn "trap" - [(trap_if (const_int 1) (const_int 0))] - "" -- "brki\tr0,-1" -+ "bri\t0" - [(set_attr "type" "trap")] - ) - --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0021-Reducing-Stack-space-for-arguments-Currently-in-Micr.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0021-Reducing-Stack-space-for-arguments-Currently-in-Micr.patch deleted file mode 100644 index ead929ab..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0021-Reducing-Stack-space-for-arguments-Currently-in-Micr.patch +++ /dev/null @@ -1,212 +0,0 @@ -From f5416ee7ddc6e4853e57ed15fb2bf630de2c3b12 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:37 -0700 -Subject: [PATCH] Reducing Stack space for arguments Currently in Microblaze - target stack space - -Reducing Stack space for arguments Currently in Microblaze target stack -space for arguments in register is being allocated even if there are no -arguments in the function. This patch will optimize the extra 24 bytes -that are being allocated. - -ChangeLog: -2015-04-17 Nagaraju Mekala <nagaraju.mekala@xilinx.com> - Ajit Agarwal <ajitkum@xilinx.com> - - * microblaze.c (microblaze_parm_needs_stack, microblaze_function_parms_need_stack): New - * microblaze.c (REG_PARM_STACK_SPACE): Modify - -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> -Signed-off-by: Ajit Agarwal <ajitkum@xilinx.com> -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/config/microblaze/microblaze-protos.h | 1 + - gcc/config/microblaze/microblaze.c | 134 +++++++++++++++++++++++++++++- - gcc/config/microblaze/microblaze.h | 4 +- - 3 files changed, 136 insertions(+), 3 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h -index b56e052ae4..a1408629cc 100644 ---- a/gcc/config/microblaze/microblaze-protos.h -+++ b/gcc/config/microblaze/microblaze-protos.h -@@ -57,6 +57,7 @@ extern int symbol_mentioned_p (rtx); - extern int label_mentioned_p (rtx); - extern bool microblaze_cannot_force_const_mem (machine_mode, rtx); - extern void microblaze_eh_return (rtx op0); -+int microblaze_reg_parm_stack_space(tree fun); - #endif /* RTX_CODE */ - - /* Declare functions in microblaze-c.c. */ -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index c1b0172bcf..f46dffff0d 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -1965,6 +1965,138 @@ microblaze_must_save_register (int regno) - return 0; - } - -+static bool -+microblaze_parm_needs_stack (cumulative_args_t args_so_far, tree type) -+{ -+ enum machine_mode mode; -+ int unsignedp; -+ rtx entry_parm; -+ -+ /* Catch errors. */ -+ if (type == NULL || type == error_mark_node) -+ return true; -+ -+ if (TREE_CODE (type) == POINTER_TYPE) -+ return true; -+ -+ /* Handle types with no storage requirement. */ -+ if (TYPE_MODE (type) == VOIDmode) -+ return false; -+ -+ /* Handle complex types. */ -+ if (TREE_CODE (type) == COMPLEX_TYPE) -+ return (microblaze_parm_needs_stack (args_so_far, TREE_TYPE (type)) -+ || microblaze_parm_needs_stack (args_so_far, TREE_TYPE (type))); -+ -+ /* Handle transparent aggregates. */ -+ if ((TREE_CODE (type) == UNION_TYPE || TREE_CODE (type) == RECORD_TYPE) -+ && TYPE_TRANSPARENT_AGGR (type)) -+ type = TREE_TYPE (first_field (type)); -+ -+ /* See if this arg was passed by invisible reference. */ -+ if (pass_by_reference (get_cumulative_args (args_so_far), -+ TYPE_MODE (type), type, true)) -+ type = build_pointer_type (type); -+ -+ /* Find mode as it is passed by the ABI. */ -+ unsignedp = TYPE_UNSIGNED (type); -+ mode = promote_mode (type, TYPE_MODE (type), &unsignedp); -+ -+/* If there is no incoming register, we need a stack. */ -+ entry_parm = microblaze_function_arg (args_so_far, mode, type, true); -+ if (entry_parm == NULL) -+ return true; -+ -+ /* Likewise if we need to pass both in registers and on the stack. */ -+ if (GET_CODE (entry_parm) == PARALLEL -+ && XEXP (XVECEXP (entry_parm, 0, 0), 0) == NULL_RTX) -+ return true; -+ -+ /* Also true if we're partially in registers and partially not. */ -+ if (function_arg_partial_bytes (args_so_far, mode, type, true) != 0) -+ return true; -+ -+ /* Update info on where next arg arrives in registers. */ -+ microblaze_function_arg_advance (args_so_far, mode, type, true); -+ return false; -+ } -+ -+static bool -+microblaze_function_parms_need_stack (tree fun, bool incoming) -+{ -+ tree fntype, result; -+ CUMULATIVE_ARGS args_so_far_v; -+ cumulative_args_t args_so_far; -+ int num_of_args = 0; -+ -+ /* Must be a libcall, all of which only use reg parms. */ -+ if (!fun) -+ return true; -+ -+ fntype = fun; -+ if (!TYPE_P (fun)) -+ fntype = TREE_TYPE (fun); -+ -+ /* Varargs functions need the parameter save area. */ -+ if ((!incoming && !prototype_p (fntype)) || stdarg_p (fntype)) -+ return true; -+ -+ INIT_CUMULATIVE_ARGS(args_so_far_v, fntype, NULL_RTX,0,0); -+ args_so_far = pack_cumulative_args (&args_so_far_v); -+ -+ /* When incoming, we will have been passed the function decl. -+ * It is necessary to use the decl to handle K&R style functions, -+ * where TYPE_ARG_TYPES may not be available. */ -+ if (incoming) -+ { -+ gcc_assert (DECL_P (fun)); -+ result = DECL_RESULT (fun); -+ } -+ else -+ result = TREE_TYPE (fntype); -+ -+ if (result && aggregate_value_p (result, fntype)) -+ { -+ if (!TYPE_P (result)) -+ result = build_pointer_type (result); -+ microblaze_parm_needs_stack (args_so_far, result); -+ } -+ -+ if (incoming) -+ { -+ tree parm; -+ for (parm = DECL_ARGUMENTS (fun); -+ parm && parm != void_list_node; -+ parm = TREE_CHAIN (parm)) -+ if (microblaze_parm_needs_stack (args_so_far, TREE_TYPE (parm))) -+ return true; -+ } -+ else -+ { -+ function_args_iterator args_iter; -+ tree arg_type; -+ -+ FOREACH_FUNCTION_ARGS (fntype, arg_type, args_iter) -+ { -+ num_of_args++; -+ if (microblaze_parm_needs_stack (args_so_far, arg_type)) -+ return true; -+ } -+ } -+ -+ if (num_of_args > 3) return true; -+ -+ return false; -+} -+ -+int microblaze_reg_parm_stack_space(tree fun) -+{ -+ if (microblaze_function_parms_need_stack (fun,false)) -+ return MAX_ARGS_IN_REGISTERS * UNITS_PER_WORD; -+ else -+ return 0; -+} -+ - /* Return the bytes needed to compute the frame pointer from the current - stack pointer. - -@@ -3275,7 +3407,7 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, - emit_insn (gen_indirect_jump (temp2)); - - /* Run just enough of rest_of_compilation. This sequence was -- "borrowed" from rs6000.c. */ -+ "borrowed" from microblaze.c. */ - insn = get_insns (); - shorten_branches (insn); - final_start_function (insn, file, 1); -diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h -index 0dd8b853e2..82e7e890be 100644 ---- a/gcc/config/microblaze/microblaze.h -+++ b/gcc/config/microblaze/microblaze.h -@@ -467,9 +467,9 @@ extern struct microblaze_frame_info current_frame_info; - - #define ARG_POINTER_CFA_OFFSET(FNDECL) 0 - --#define REG_PARM_STACK_SPACE(FNDECL) (MAX_ARGS_IN_REGISTERS * UNITS_PER_WORD) -+#define REG_PARM_STACK_SPACE(FNDECL) microblaze_reg_parm_stack_space(FNDECL) - --#define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1 -+#define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1 - - #define STACK_BOUNDARY 32 - --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0022-Inline-Expansion-of-fsqrt-builtin.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0022-Inline-Expansion-of-fsqrt-builtin.patch deleted file mode 100644 index 6de17024..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0022-Inline-Expansion-of-fsqrt-builtin.patch +++ /dev/null @@ -1,64 +0,0 @@ -From cf85f09a0fade1e7827828a3dc9a526c212f3be7 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:39 -0700 -Subject: [PATCH] Inline Expansion of fsqrt builtin - -Inline Expansion of fsqrt builtin. The changes are made in the patch for -the inline expansion of the fsqrt builtin with fqrt instruction. The -sqrt math function takes double as argument and return double as -argument. The pattern is selected while expanding the unary op through -expand_unop which passes DFmode and the DFmode pattern was not there -returning zero. Thus the sqrt math function is not inlined and expanded. -The pattern with DFmode argument is added. Also the source and -destination argument is not same the DF through two different -consecutive registers with lower 32 bit is the argument passed to sqrt -and the higher 32 bit is zero. If the source and destinations are -different the DFmode 64 bits registers is not set properly giving the -problem in runtime. Such changes are taken care in the implementation of -the pattern for DFmode for inline expansion of the sqrt. - -ChangeLog: - -2015-06-16 Ajit Agarwal <ajitkum@xilinx.com> - Nagaraju Mekala <nagaraju.mekala@xilinx.com> - - * config/microblaze/microblaze.md (sqrtdf2): New - pattern. - -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> -Signed-off-by: Ajit Agarwal <ajitkum@xilinx.com> -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/config/microblaze/microblaze.md | 14 ++++++++++++++ - 1 file changed, 14 insertions(+) - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index a3954a24b6..13f8803428 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -449,6 +449,20 @@ - (set_attr "mode" "SF") - (set_attr "length" "4")]) - -+(define_insn "sqrtdf2" -+ [(set (match_operand:DF 0 "register_operand" "=d") -+ (sqrt:DF (match_operand:DF 1 "register_operand" "dG")))] -+ "TARGET_HARD_FLOAT && TARGET_FLOAT_SQRT" -+ { -+ if (REGNO (operands[0]) == REGNO (operands[1])) -+ return "fsqrt\t%0,%1"; -+ else -+ return "fsqrt\t%0,%1\n\taddk\t%D0,%D1,r0"; -+ } -+ [(set_attr "type" "fsqrt") -+ (set_attr "mode" "SF") -+ (set_attr "length" "4")]) -+ - (define_insn "fix_truncsfsi2" - [(set (match_operand:SI 0 "register_operand" "=d") - (fix:SI (match_operand:SF 1 "register_operand" "d")))] --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0023-Update-MicroBlaze-ashlsi3-movsf-patterns.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0023-Update-MicroBlaze-ashlsi3-movsf-patterns.patch deleted file mode 100644 index d8eb7695..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0023-Update-MicroBlaze-ashlsi3-movsf-patterns.patch +++ /dev/null @@ -1,78 +0,0 @@ -From f269f552e1abf182dc3749e0f29b1529fc82644a Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:42 -0700 -Subject: [PATCH] Update MicroBlaze ashlsi3 & movsf patterns - -This patch removes the use of HOST_WIDE_INT_PRINT_HEX macro in -print_operand of ashlsi3_with_mul_nodelay,ashlsi3_with_mul_delay and -movsf_internal patterns beacuse HOST_WIDE_INT_PRINT_HEX is generating -64-bit value which our instruction doesn't support so using gen_int_mode -function - -ChangeLog: - -2016-01-07 Nagaraju Mekala <nagaraju.mekala@xilinx.com> - Ajit Agarwal <ajitkum@xilinx.com> - - * microblaze.md (ashlsi3_with_mul_nodelay, - ashlsi3_with_mul_delay, - movsf_internal): - Updated the patterns to use gen_int_mode function - * microblaze.c (print_operand): - updated the 'F' case to use "unsinged int" instead - of HOST_WIDE_INT_PRINT_HEX - -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> -Signed-off-by: Ajit Agarwal <ajitkum@xilinx.com> -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/config/microblaze/microblaze.c | 2 +- - gcc/config/microblaze/microblaze.md | 10 ++++++++-- - 2 files changed, 9 insertions(+), 3 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index f46dffff0d..663b20a022 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -2507,7 +2507,7 @@ print_operand (FILE * file, rtx op, int letter) - unsigned long value_long; - REAL_VALUE_TO_TARGET_SINGLE (*CONST_DOUBLE_REAL_VALUE (op), - value_long); -- fprintf (file, HOST_WIDE_INT_PRINT_HEX, value_long); -+ fprintf (file, "0x%08x", (unsigned int) value_long); - } - else - { -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 13f8803428..b9c62b6d0f 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -1366,7 +1366,10 @@ - (match_operand:SI 2 "immediate_operand" "I")))] - "!TARGET_SOFT_MUL - && ((1 << INTVAL (operands[2])) <= 32767 && (1 << INTVAL (operands[2])) >= -32768)" -- "muli\t%0,%1,%m2" -+ { -+ operands[2] = gen_int_mode (1 << INTVAL (operands[2]), SImode); -+ return "muli\t%0,%1,%2"; -+ } - ;; This MUL will not generate an imm. Can go into a delay slot. - [(set_attr "type" "arith") - (set_attr "mode" "SI") -@@ -1378,7 +1381,10 @@ - (ashift:SI (match_operand:SI 1 "register_operand" "d") - (match_operand:SI 2 "immediate_operand" "I")))] - "!TARGET_SOFT_MUL" -- "muli\t%0,%1,%m2" -+ { -+ operands[2] = gen_int_mode (1 << INTVAL (operands[2]), SImode); -+ return "muli\t%0,%1,%2"; -+ } - ;; This MUL will generate an IMM. Cannot go into a delay slot - [(set_attr "type" "no_delay_arith") - (set_attr "mode" "SI") --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0024-8-stage-pipeline-for-microblaze.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0024-8-stage-pipeline-for-microblaze.patch deleted file mode 100644 index 6faa6251..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0024-8-stage-pipeline-for-microblaze.patch +++ /dev/null @@ -1,195 +0,0 @@ -From 17353cc4ba521f5ad928a1ede61cf03110e366ae Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:43 -0700 -Subject: [PATCH] 8-stage pipeline for microblaze - -This patch adds the support for the 8-stage pipeline. The new 8-stage -pipeline reduces the latencies of float & integer division drastically - -ChangeLog: - -2016-01-18 Nagaraju Mekala <nagaraju.mekala@xilinx.com> - - * microblaze.md (define_automaton mbpipe_8): New - * microblaze.c (microblaze_option_override): Update - Updated the logic to generate only when MB version is 10.0 - * microblaze.h (pipeline_type): Update - Update the enum with MICROBLAZE_PIPE_8 - * microblaze.opt (mxl-frequency): New - New flag added for 8-stage pipeline - -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/config/microblaze/microblaze.c | 13 ++++++ - gcc/config/microblaze/microblaze.h | 3 +- - gcc/config/microblaze/microblaze.md | 79 +++++++++++++++++++++++++++++++++++- - gcc/config/microblaze/microblaze.opt | 4 ++ - 4 files changed, 96 insertions(+), 3 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index 663b20a022..e7697bf30d 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -1773,6 +1773,19 @@ microblaze_option_override (void) - warning (0, "-mxl-reorder requires -mxl-pattern-compare for -mcpu=v8.30.a"); - TARGET_REORDER = 0; - } -+ ver = ver_int - microblaze_version_to_int("v10.0"); -+ if (ver < 0) -+ { -+ if (TARGET_AREA_OPTIMIZED_2) -+ warning (0, "-mxl-frequency can be used only with -mcpu=v10.0 or greater"); -+ } -+ else -+ { -+ if (TARGET_AREA_OPTIMIZED_2) -+ microblaze_pipe = MICROBLAZE_PIPE_8; -+ if (TARGET_BARREL_SHIFT) -+ microblaze_has_bitfield = 1; -+ } - - if (TARGET_MULTIPLY_HIGH && TARGET_SOFT_MUL) - error ("-mxl-multiply-high requires -mno-xl-soft-mul"); -diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h -index 82e7e890be..3f48e48f10 100644 ---- a/gcc/config/microblaze/microblaze.h -+++ b/gcc/config/microblaze/microblaze.h -@@ -27,7 +27,8 @@ - enum pipeline_type - { - MICROBLAZE_PIPE_3 = 0, -- MICROBLAZE_PIPE_5 = 1 -+ MICROBLAZE_PIPE_5 = 1, -+ MICROBLAZE_PIPE_8 = 2 - }; - - #define MICROBLAZE_MASK_NO_UNSAFE_DELAY 0x00000001 -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index b9c62b6d0f..61d6412dac 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -35,6 +35,7 @@ - (R_GOT 20) ;; GOT ptr reg - (MB_PIPE_3 0) ;; Microblaze 3-stage pipeline - (MB_PIPE_5 1) ;; Microblaze 5-stage pipeline -+ (MB_PIPE_8 2) ;; Microblaze 8-stage pipeline - (UNSPEC_SET_GOT 101) ;; - (UNSPEC_GOTOFF 102) ;; GOT offset - (UNSPEC_PLT 103) ;; jump table -@@ -80,7 +81,7 @@ - ;; bshift Shift operations - - (define_attr "type" -- "unknown,branch,jump,call,load,store,move,arith,darith,imul,idiv,icmp,multi,nop,no_delay_arith,no_delay_load,no_delay_store,no_delay_imul,no_delay_move,bshift,fadd,frsub,fmul,fdiv,fcmp,fsl,fsqrt,fcvt,trap" -+ "unknown,branch,jump,call,load,store,move,arith,darith,imul,idiv,icmp,multi,nop,no_delay_arith,no_delay_load,no_delay_store,no_delay_imul,no_delay_move,bshift,fadd,frsub,fmul,fdiv,fcmp,fsl,fsqrt,fcvt,fint,trap" - (const_string "unknown")) - - ;; Main data type used by the insn -@@ -222,6 +223,80 @@ - ;;----------------------------------------------------------------- - - -+ -+;;---------------------------------------------------------------- -+;; Microblaze 8-stage pipeline description (v10.0 and later) -+;;---------------------------------------------------------------- -+ -+(define_automaton "mbpipe_8") -+(define_cpu_unit "mb8_issue,mb8_iu,mb8_wb,mb8_fpu,mb8_fpu_2,mb8_mul,mb8_mul_2,mb8_div,mb8_div_2,mb8_bs,mb8_bs_2" "mbpipe_8") -+ -+(define_insn_reservation "mb8-integer" 1 -+ (and (eq_attr "type" "branch,jump,call,arith,darith,icmp,nop,no_delay_arith") -+ (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) -+ "mb8_issue,mb8_iu,mb8_wb") -+ -+(define_insn_reservation "mb8-special-move" 2 -+ (and (eq_attr "type" "move") -+ (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) -+ "mb8_issue,mb8_iu*2,mb8_wb") -+ -+(define_insn_reservation "mb8-mem-load" 3 -+ (and (eq_attr "type" "load,no_delay_load") -+ (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) -+ "mb8_issue,mb8_iu,mb8_wb") -+ -+(define_insn_reservation "mb8-mem-store" 1 -+ (and (eq_attr "type" "store,no_delay_store") -+ (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) -+ "mb8_issue,mb8_iu,mb8_wb") -+ -+(define_insn_reservation "mb8-mul" 3 -+ (and (eq_attr "type" "imul,no_delay_imul") -+ (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) -+ "mb8_issue,mb8_mul,mb8_mul_2*2,mb8_wb") -+ -+(define_insn_reservation "mb8-div" 30 -+ (and (eq_attr "type" "idiv") -+ (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) -+ "mb8_issue,mb8_div,mb8_div_2*29,mb8_wb") -+ -+(define_insn_reservation "mb8-bs" 2 -+ (and (eq_attr "type" "bshift") -+ (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) -+ "mb8_issue,mb8_bs,mb8_bs_2,mb8_wb") -+ -+(define_insn_reservation "mb8-fpu-add-sub-mul" 1 -+ (and (eq_attr "type" "fadd,frsub,fmul") -+ (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) -+ "mb8_issue,mb8_fpu,mb8_wb") -+ -+(define_insn_reservation "mb8-fpu-fcmp" 3 -+ (and (eq_attr "type" "fcmp") -+ (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) -+ "mb8_issue,mb8_fpu,mb8_fpu*2,mb8_wb") -+ -+(define_insn_reservation "mb8-fpu-div" 24 -+ (and (eq_attr "type" "fdiv") -+ (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) -+ "mb8_issue,mb8_fpu,mb8_fpu_2*23,mb8_wb") -+ -+(define_insn_reservation "mb8-fpu-sqrt" 23 -+ (and (eq_attr "type" "fsqrt") -+ (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) -+ "mb8_issue,mb8_fpu,mb8_fpu_2*22,mb8_wb") -+ -+(define_insn_reservation "mb8-fpu-fcvt" 1 -+ (and (eq_attr "type" "fcvt") -+ (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) -+ "mb8_issue,mb8_fpu,mb8_wb") -+ -+(define_insn_reservation "mb8-fpu-fint" 2 -+ (and (eq_attr "type" "fint") -+ (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) -+ "mb8_issue,mb8_fpu,mb8_wb") -+ -+ - ;;---------------------------------------------------------------- - ;; Microblaze 5-stage pipeline description (v5.00.a and later) - ;;---------------------------------------------------------------- -@@ -468,7 +543,7 @@ - (fix:SI (match_operand:SF 1 "register_operand" "d")))] - "TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT" - "fint\t%0,%1" -- [(set_attr "type" "fcvt") -+ [(set_attr "type" "fint") - (set_attr "mode" "SF") - (set_attr "length" "4")]) - -diff --git a/gcc/config/microblaze/microblaze.opt b/gcc/config/microblaze/microblaze.opt -index 8847c3daf8..85a9929d74 100644 ---- a/gcc/config/microblaze/microblaze.opt -+++ b/gcc/config/microblaze/microblaze.opt -@@ -129,3 +129,7 @@ Use hardware prefetch instruction - - mxl-mode-xilkernel - Target -+ -+mxl-frequency -+Target Mask(AREA_OPTIMIZED_2) -+Use 8 stage pipeline (frequency optimization) --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0025-MicroBlaze-correct-the-const-high-double-immediate-v.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0025-MicroBlaze-correct-the-const-high-double-immediate-v.patch deleted file mode 100644 index ff8e6107..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0025-MicroBlaze-correct-the-const-high-double-immediate-v.patch +++ /dev/null @@ -1,72 +0,0 @@ -From fabd23a354496701b4a9ebf6931485b0d61c7bbe Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:45 -0700 -Subject: [PATCH] MicroBlaze correct the const high double immediate value - -With this patch the loading of the DI mode immediate values will be -using REAL_VALUE_FROM_CONST_DOUBLE and REAL_VALUE_TO_TARGET_DOUBLE -functions, as CONST_DOUBLE_HIGH was returning the sign extension value -even of the unsigned long long constants also - -ChangeLog: - -2016-02-03 Nagaraju Mekala <nagaraju.mekala@xilinx.com> - Ajit Agarwal <ajitkum@xilinx.com> - - * microblaze.c (print_operand): Use REAL_VALUE_FROM_CONST_DOUBLE & - REAL_VALUE_TO_TARGET_DOUBLE - * long.c (new): Added new testcase - -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> -Signed-off-by: Ajit Agarwal <ajitkum@xilinx.com> -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/config/microblaze/microblaze.c | 6 ++++-- - gcc/testsuite/gcc.target/microblaze/long.c | 10 ++++++++++ - 2 files changed, 14 insertions(+), 2 deletions(-) - create mode 100644 gcc/testsuite/gcc.target/microblaze/long.c - -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index e7697bf30d..96bf6e1cab 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -2493,14 +2493,16 @@ print_operand (FILE * file, rtx op, int letter) - else if (letter == 'h' || letter == 'j') - { - long val[2]; -+ long l[2]; - if (code == CONST_DOUBLE) - { - if (GET_MODE (op) == DFmode) - REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), val); - else - { -- val[0] = CONST_DOUBLE_HIGH (op); -- val[1] = CONST_DOUBLE_LOW (op); -+ REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), l); -+ val[1] = l[WORDS_BIG_ENDIAN == 0]; -+ val[0] = l[WORDS_BIG_ENDIAN != 0]; - } - } - else if (code == CONST_INT) -diff --git a/gcc/testsuite/gcc.target/microblaze/long.c b/gcc/testsuite/gcc.target/microblaze/long.c -new file mode 100644 -index 0000000000..4d4518619d ---- /dev/null -+++ b/gcc/testsuite/gcc.target/microblaze/long.c -@@ -0,0 +1,10 @@ -+/* { dg-options "-O0" } */ -+#define BASEADDR 0xF0000000ULL -+int main () -+{ -+ unsigned long long start; -+ start = (unsigned long long) BASEADDR; -+ return 0; -+} -+/* { dg-final { scan-assembler "addik\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r0,0x00000000" } } */ -+/* { dg-final { scan-assembler "addik\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r0,0xf0000000" } } */ --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0026-Fix-internal-compiler-error-with-msmall-divides.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0026-Fix-internal-compiler-error-with-msmall-divides.patch deleted file mode 100644 index 7ea28ee8..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0026-Fix-internal-compiler-error-with-msmall-divides.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 2149d85f1f7375dd97bf961b2bdb693d6d931c13 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:46 -0700 -Subject: [PATCH] Fix internal compiler error with msmall-divides - -This patch will fix the internal error microblaze_expand_divide function -which comes because of rtx PLUS where the mem_rtx is of type SI and the -operand is of type QImode. This patch modifies the mem_rtx as QImode and -Plus as QImode to fix the error. - -ChangeLog: - -2016-02-23 Nagaraju Mekala <nagaraju.mekala@xilinx.com> - Ajit Agarwal <ajitkum@xilinx.com> - - * microblaze.c (microblaze_expand_divide): Update - -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> -Signed-off-by: Ajit Agarwal <ajitkum@xilinx.com> -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/config/microblaze/microblaze.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index 96bf6e1cab..a41121264e 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -3719,7 +3719,7 @@ microblaze_expand_divide (rtx operands[]) - emit_insn (gen_ashlsi3_bshift (regt1, operands[1], GEN_INT(4))); - emit_insn (gen_addsi3 (regt1, regt1, operands[2])); - mem_rtx = gen_rtx_MEM (QImode, -- gen_rtx_PLUS (Pmode, regt1, div_table_rtx)); -+ gen_rtx_PLUS (QImode, regt1, div_table_rtx)); - - insn = emit_insn (gen_zero_extendqisi2(operands[0],mem_rtx)); - jump = emit_jump_insn_after (gen_jump (div_end_label), insn); --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0027-Fix-the-calculation-of-high-word-in-a-long-long-64-b.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0027-Fix-the-calculation-of-high-word-in-a-long-long-64-b.patch deleted file mode 100644 index 97422aea..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0027-Fix-the-calculation-of-high-word-in-a-long-long-64-b.patch +++ /dev/null @@ -1,48 +0,0 @@ -From 34049c9fcaa256befad032cbcd8aa74beecf13dc Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:47 -0700 -Subject: [PATCH] Fix the calculation of high word in a long long 64-bit - -This patch will change the calculation of high word in a long long 64-bit. -Earlier to this patch the high word of long long word (0xF0000000ULL) is -coming to be 0xFFFFFFFF and low word is 0xF0000000. Instead the high word -should be 0x00000000 and the low word should be 0xF0000000. This patch -removes the condition of checking high word = 0 & low word < 0. -This check is not required for the correctness of calculating 32-bit high -and low words in a 64-bit long long. - -ChangeLog: - -2016-03-01 Nagaraju Mekala <nagaraju.mekala@xilinx.com> - Ajit Agarwal <ajitkum@xilinx.com> - - * config/microblaze/microblaze.c (print_operand): Remove the - condition of checking high word = 0 & low word < 0. - * testsuite/gcc.target/microblaze/others/long.c: Add -O0 option. - -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> -Signed-off-by: Ajit Agarwal <ajitkum@xilinx.com> -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/config/microblaze/microblaze.c | 3 --- - 1 file changed, 3 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index a41121264e..2ed64971fb 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -2509,9 +2509,6 @@ print_operand (FILE * file, rtx op, int letter) - { - val[0] = (INTVAL (op) & 0xffffffff00000000LL) >> 32; - val[1] = INTVAL (op) & 0x00000000ffffffffLL; -- if (val[0] == 0 && val[1] < 0) -- val[0] = -1; -- - } - fprintf (file, "0x%8.8lx", (letter == 'h') ? val[0] : val[1]); - } --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0028-Add-new-bit-field-instructions.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0028-Add-new-bit-field-instructions.patch deleted file mode 100644 index 02940e2f..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0028-Add-new-bit-field-instructions.patch +++ /dev/null @@ -1,126 +0,0 @@ -From 90b6f833bd59f89d4192a3dc787fc2c9115b9c00 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:48 -0700 -Subject: [PATCH] Add new bit-field instructions - -This patches adds new bsefi and bsifi instructions. BSEFI- The -instruction shall extract a bit field from a register and place it -right-adjusted in the destination register. The other bits in the -destination register shall be set to zero BSIFI- The instruction shall -insert a right-adjusted bit field from a register at another position in -the destination register. The rest of the bits in the destination -register shall be unchanged - -ChangeLog: - -2016-02-03 Nagaraju Mekala <nagaraju.mekala@xilinx.com> - - * microblaze.md (Update): Added new patterns - -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/config/microblaze/microblaze.md | 73 +++++++++++++++++++++++++++++++++++++ - 1 file changed, 73 insertions(+) - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 61d6412dac..7a00629922 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -980,6 +980,8 @@ - (set_attr "mode" "DI") - (set_attr "length" "20,20,20")]) - -+ -+ - ;;---------------------------------------------------------------- - ;; Data movement - ;;---------------------------------------------------------------- -@@ -1774,6 +1776,7 @@ - (set_attr "length" "28")] - ) - -+ - ;;---------------------------------------------------------------- - ;; Setting a register from an integer comparison. - ;;---------------------------------------------------------------- -@@ -2473,4 +2476,74 @@ - DONE; - }") - -+(define_expand "extvsi" -+ [(set (match_operand:SI 0 "register_operand" "r") -+ (zero_extract:SI (match_operand:SI 1 "register_operand" "r") -+ (match_operand:SI 2 "immediate_operand" "I") -+ (match_operand:SI 3 "immediate_operand" "I")))] -+"TARGET_HAS_BITFIELD" -+" -+{ -+ unsigned HOST_WIDE_INT len = UINTVAL (operands[2]); -+ unsigned HOST_WIDE_INT pos = UINTVAL (operands[3]); -+ -+ if ((len == 0) || (pos + len > 32) ) -+ FAIL; -+ -+ ;;if (!register_operand (operands[1], VOIDmode)) -+ ;; FAIL; -+ if (operands[0] == operands[1]) -+ FAIL; -+ if (GET_CODE (operands[1]) == ASHIFT) -+ FAIL; -+;; operands[2] = GEN_INT(INTVAL(operands[2])+1 ); -+ emit_insn (gen_extv_32 (operands[0], operands[1], -+ operands[2], operands[3])); -+ DONE; -+}") -+ -+(define_insn "extv_32" -+ [(set (match_operand:SI 0 "register_operand" "=r") -+ (zero_extract:SI (match_operand:SI 1 "register_operand" "r") -+ (match_operand:SI 2 "immediate_operand" "I") -+ (match_operand:SI 3 "immediate_operand" "I")))] -+ "TARGET_HAS_BITFIELD && (UINTVAL (operands[2]) > 0) -+ && ((UINTVAL (operands[2]) + UINTVAL (operands[3])) <= 32)" -+ "bsefi %0,%1,%2,%3" -+ [(set_attr "type" "bshift") -+ (set_attr "length" "4")]) -+ -+(define_expand "insvsi" -+ [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+r") -+ (match_operand:SI 1 "immediate_operand" "I") -+ (match_operand:SI 2 "immediate_operand" "I")) -+ (match_operand:SI 3 "register_operand" "r"))] -+ "TARGET_HAS_BITFIELD" -+ " -+{ -+ unsigned HOST_WIDE_INT len = UINTVAL (operands[1]); -+ unsigned HOST_WIDE_INT pos = UINTVAL (operands[2]); -+ -+ if (len <= 0 || pos + len > 32) -+ FAIL; -+ -+ ;;if (!register_operand (operands[0], VOIDmode)) -+ ;; FAIL; -+ -+ emit_insn (gen_insv_32 (operands[0], operands[1], -+ operands[2], operands[3])); -+ DONE; -+}") -+ -+(define_insn "insv_32" -+ [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+r") -+ (match_operand:SI 1 "immediate_operand" "I") -+ (match_operand:SI 2 "immediate_operand" "I")) -+ (match_operand:SI 3 "register_operand" "r"))] -+ "TARGET_HAS_BITFIELD && UINTVAL (operands[1]) > 0 -+ && UINTVAL (operands[1]) + UINTVAL (operands[2]) <= 32" -+ "bsifi %0, %3, %1, %2" -+ [(set_attr "type" "bshift") -+ (set_attr "length" "4")]) -+ - (include "sync.md") --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0029-Fix-bug-in-MB-version-calculation.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0029-Fix-bug-in-MB-version-calculation.patch deleted file mode 100644 index c3e4bc9e..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0029-Fix-bug-in-MB-version-calculation.patch +++ /dev/null @@ -1,250 +0,0 @@ -From 3eada9d81437d378ef24f11a8bd046fee5b3505a Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:49 -0700 -Subject: [PATCH] Fix bug in MB version calculation - -This patch fixes the bug in microblaze_version_to_int function. Earlier -the conversion of vXX.YY.Z to int has a bug which is fixed now. - -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/config/microblaze/microblaze.c | 147 ++++++++++++++++++------------------- - 1 file changed, 70 insertions(+), 77 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index 2ed64971fb..55dba83882 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -239,6 +239,63 @@ section *sdata2_section; - #define TARGET_HAVE_TLS true - #endif - -+/* Convert a version number of the form "vX.YY.Z" to an integer encoding -+ for easier range comparison. */ -+static int -+microblaze_version_to_int (const char *version) -+{ -+ const char *p, *v; -+ const char *tmpl = "vXX.YY.Z"; -+ int iver1 =0, iver2 =0, iver3 =0; -+ -+ p = version; -+ v = tmpl; -+ -+ while (*p) -+ { -+ if (*v == 'X') -+ { /* Looking for major */ -+ if (*p == '.') -+ { -+ *v++; -+ } -+ else -+ { -+ if (!(*p >= '0' && *p <= '9')) -+ return -1; -+ iver1 += (int) (*p - '0'); -+ iver1 *= 1000; -+ } -+ } -+ else if (*v == 'Y') -+ { /* Looking for minor */ -+ if (!(*p >= '0' && *p <= '9')) -+ return -1; -+ iver2 += (int) (*p - '0'); -+ iver2 *= 10; -+ } -+ else if (*v == 'Z') -+ { /* Looking for compat */ -+ if (!(*p >= 'a' && *p <= 'z')) -+ return -1; -+ iver3 = ((int) (*p)) - 96; -+ } -+ else -+ { -+ if (*p != *v) -+ return -1; -+ } -+ -+ v++; -+ p++; -+ } -+ -+ if (*p) -+ return -1; -+ -+ return iver1 + iver2 + iver3; -+} -+ - /* Return truth value if a CONST_DOUBLE is ok to be a legitimate constant. */ - static bool - microblaze_const_double_ok (rtx op, machine_mode mode) -@@ -1267,8 +1324,7 @@ microblaze_rtx_costs (rtx x, machine_mode mode, int outer_code ATTRIBUTE_UNUSED, - { - if (TARGET_BARREL_SHIFT) - { -- if (MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu, "v5.00.a") -- >= 0) -+ if (microblaze_version_to_int(microblaze_select_cpu) >= microblaze_version_to_int("v5.00.a")) - *total = COSTS_N_INSNS (1); - else - *total = COSTS_N_INSNS (2); -@@ -1329,8 +1385,7 @@ microblaze_rtx_costs (rtx x, machine_mode mode, int outer_code ATTRIBUTE_UNUSED, - } - else if (!TARGET_SOFT_MUL) - { -- if (MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu, "v5.00.a") -- >= 0) -+ if (microblaze_version_to_int(microblaze_select_cpu) >= microblaze_version_to_int("v5.00.a")) - *total = COSTS_N_INSNS (1); - else - *total = COSTS_N_INSNS (3); -@@ -1610,72 +1665,13 @@ function_arg_partial_bytes (cumulative_args_t cum_v, machine_mode mode, - return 0; - } - --/* Convert a version number of the form "vX.YY.Z" to an integer encoding -- for easier range comparison. */ --static int --microblaze_version_to_int (const char *version) --{ -- const char *p, *v; -- const char *tmpl = "vXX.YY.Z"; -- int iver = 0; -- -- p = version; -- v = tmpl; -- -- while (*p) -- { -- if (*v == 'X') -- { /* Looking for major */ -- if (*p == '.') -- { -- v++; -- } -- else -- { -- if (!(*p >= '0' && *p <= '9')) -- return -1; -- iver += (int) (*p - '0'); -- iver *= 10; -- } -- } -- else if (*v == 'Y') -- { /* Looking for minor */ -- if (!(*p >= '0' && *p <= '9')) -- return -1; -- iver += (int) (*p - '0'); -- iver *= 10; -- } -- else if (*v == 'Z') -- { /* Looking for compat */ -- if (!(*p >= 'a' && *p <= 'z')) -- return -1; -- iver *= 10; -- iver += (int) (*p - 'a'); -- } -- else -- { -- if (*p != *v) -- return -1; -- } -- -- v++; -- p++; -- } -- -- if (*p) -- return -1; -- -- return iver; --} -- -- - static void - microblaze_option_override (void) - { - register int i, start; - register int regno; - register machine_mode mode; -- int ver; -+ int ver,ver_int; - - microblaze_section_threshold = (global_options_set.x_g_switch_value - ? g_switch_value -@@ -1696,13 +1692,13 @@ microblaze_option_override (void) - /* Check the MicroBlaze CPU version for any special action to be done. */ - if (microblaze_select_cpu == NULL) - microblaze_select_cpu = MICROBLAZE_DEFAULT_CPU; -- ver = microblaze_version_to_int (microblaze_select_cpu); -- if (ver == -1) -+ ver_int = microblaze_version_to_int (microblaze_select_cpu); -+ if (ver_int == -1) - { - error ("%qs is an invalid argument to -mcpu=", microblaze_select_cpu); - } - -- ver = MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu, "v3.00.a"); -+ ver = ver_int - microblaze_version_to_int("v3.00.a"); - if (ver < 0) - { - /* No hardware exceptions in earlier versions. So no worries. */ -@@ -1713,8 +1709,7 @@ microblaze_option_override (void) - microblaze_pipe = MICROBLAZE_PIPE_3; - } - else if (ver == 0 -- || (MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu, "v4.00.b") -- == 0)) -+ || (ver_int == microblaze_version_to_int("v4.00.b"))) - { - #if 0 - microblaze_select_flags |= (MICROBLAZE_MASK_NO_UNSAFE_DELAY); -@@ -1731,11 +1726,9 @@ microblaze_option_override (void) - #endif - microblaze_no_unsafe_delay = 0; - microblaze_pipe = MICROBLAZE_PIPE_5; -- if (MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu, "v5.00.a") == 0 -- || MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu, -- "v5.00.b") == 0 -- || MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu, -- "v5.00.c") == 0) -+ if ((ver_int == microblaze_version_to_int("v5.00.a")) -+ || (ver_int == microblaze_version_to_int("v5.00.b")) -+ || (ver_int == microblaze_version_to_int("v5.00.c"))) - { - /* Pattern compares are to be turned on by default only when - compiling for MB v5.00.'z'. */ -@@ -1743,7 +1736,7 @@ microblaze_option_override (void) - } - } - -- ver = MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu, "v6.00.a"); -+ ver = ver_int - microblaze_version_to_int("v6.00.a"); - if (ver < 0) - { - if (TARGET_MULTIPLY_HIGH) -@@ -1751,7 +1744,7 @@ microblaze_option_override (void) - "-mxl-multiply-high can be used only with -mcpu=v6.00.a or greater"); - } - -- ver = MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu, "v8.10.a"); -+ ver = ver_int - microblaze_version_to_int("v8.10.a"); - microblaze_has_clz = 1; - if (ver < 0) - { -@@ -1760,7 +1753,7 @@ microblaze_option_override (void) - } - - /* TARGET_REORDER defaults to 2 if -mxl-reorder not specified. */ -- ver = MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu, "v8.30.a"); -+ ver = ver_int - microblaze_version_to_int("v8.30.a"); - if (ver < 0) - { - if (TARGET_REORDER == 1) --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0030-MicroBlaze-fixing-the-bug-in-the-bit-field-instructi.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0030-MicroBlaze-fixing-the-bug-in-the-bit-field-instructi.patch deleted file mode 100644 index 1d877be6..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0030-MicroBlaze-fixing-the-bug-in-the-bit-field-instructi.patch +++ /dev/null @@ -1,52 +0,0 @@ -From 0c740ddd203433ef8d979348c085269f8b97cbfc Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:50 -0700 -Subject: [PATCH] MicroBlaze fixing the bug in the bit-field instruction. - -Bit field instruction should be generated only if mcpu >10.0 - -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/config/microblaze/microblaze.c | 3 +++ - gcc/config/microblaze/microblaze.h | 2 ++ - 2 files changed, 5 insertions(+) - -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index 55dba83882..4f6d399bba 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -159,6 +159,9 @@ int microblaze_no_unsafe_delay; - /* Set to one if the targeted core has the CLZ insn. */ - int microblaze_has_clz = 0; - -+/* Set to one if the targeted core has barrel-shift and cpu > 10.0 */ -+int microblaze_has_bitfield = 0; -+ - /* Which CPU pipeline do we use. We haven't really standardized on a CPU - version having only a particular type of pipeline. There can still be - options on the CPU to scale pipeline features up or down. :( -diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h -index 3f48e48f10..712525f856 100644 ---- a/gcc/config/microblaze/microblaze.h -+++ b/gcc/config/microblaze/microblaze.h -@@ -44,6 +44,7 @@ extern int microblaze_dbx_regno[]; - - extern int microblaze_no_unsafe_delay; - extern int microblaze_has_clz; -+extern int microblaze_has_bitfield; - extern enum pipeline_type microblaze_pipe; - - #define OBJECT_FORMAT_ELF -@@ -62,6 +63,7 @@ extern enum pipeline_type microblaze_pipe; - - /* Do we have CLZ? */ - #define TARGET_HAS_CLZ (TARGET_PATTERN_COMPARE && microblaze_has_clz) -+#define TARGET_HAS_BITFIELD (TARGET_BARREL_SHIFT && microblaze_has_bitfield) - - /* The default is to support PIC. */ - #define TARGET_SUPPORTS_PIC 1 --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0031-Fixing-the-issue-with-MicroBlaze-builtin_alloc.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0031-Fixing-the-issue-with-MicroBlaze-builtin_alloc.patch deleted file mode 100644 index 3786a71a..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0031-Fixing-the-issue-with-MicroBlaze-builtin_alloc.patch +++ /dev/null @@ -1,48 +0,0 @@ -From fdb99f97b41f7cd06b81e668b88463d0fc2cbe87 Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nagaraju.mekala@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:54 -0700 -Subject: [PATCH] Fixing the issue with MicroBlaze builtin_alloc - -Fixing the issue with the builtin_alloc. Register r18 was not properly -handling the stack pattern which was resolved by using free available -register - -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/config/microblaze/microblaze.md | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 7a00629922..68c3b22bd4 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -2076,10 +2076,10 @@ - "" - { - rtx retaddr = gen_rtx_MEM (Pmode, stack_pointer_rtx); -- rtx rtmp = gen_rtx_REG (SImode, R_TMP); -+ rtx reg = gen_reg_rtx (Pmode); - rtx neg_op0; - -- emit_move_insn (rtmp, retaddr); -+ emit_move_insn (reg, retaddr); - if (GET_CODE (operands[1]) != CONST_INT) - { - neg_op0 = gen_reg_rtx (Pmode); -@@ -2088,9 +2088,9 @@ - neg_op0 = GEN_INT (- INTVAL (operands[1])); - - emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0)); -- emit_move_insn (gen_rtx_MEM (Pmode, stack_pointer_rtx), rtmp); -+ emit_move_insn (gen_rtx_MEM (Pmode, stack_pointer_rtx), reg); - emit_move_insn (operands[0], virtual_stack_dynamic_rtx); -- emit_insn (gen_rtx_CLOBBER (SImode, rtmp)); -+ emit_insn (gen_rtx_CLOBBER (SImode, reg)); - DONE; - } - ) --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0032-MicroBlaze-remove-bitfield-instructions-macros.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0032-MicroBlaze-remove-bitfield-instructions-macros.patch deleted file mode 100644 index 29bc752e..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0032-MicroBlaze-remove-bitfield-instructions-macros.patch +++ /dev/null @@ -1,83 +0,0 @@ -From 646fe1dbaca06f2fe2df4c0da3fa20e0aff0a4ec Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nagaraju.mekala@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:56 -0700 -Subject: [PATCH] MicroBlaze remove bitfield instructions macros - -Remove the conditions in the bit field expand macros to generate the -instructions in structure bit-field usecases - -ChangeLog: - -2018-08-16 Nagaraju Mekala <nagaraju.mekala@xilinx.com> - - * gcc/config/microblaze/microblaze.md: - remove the expand constraints - -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/config/microblaze/microblaze.md | 40 +++++-------------------------------- - 1 file changed, 5 insertions(+), 35 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 68c3b22bd4..ef53c3069e 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -2482,25 +2482,8 @@ - (match_operand:SI 2 "immediate_operand" "I") - (match_operand:SI 3 "immediate_operand" "I")))] - "TARGET_HAS_BITFIELD" --" --{ -- unsigned HOST_WIDE_INT len = UINTVAL (operands[2]); -- unsigned HOST_WIDE_INT pos = UINTVAL (operands[3]); -- -- if ((len == 0) || (pos + len > 32) ) -- FAIL; -- -- ;;if (!register_operand (operands[1], VOIDmode)) -- ;; FAIL; -- if (operands[0] == operands[1]) -- FAIL; -- if (GET_CODE (operands[1]) == ASHIFT) -- FAIL; --;; operands[2] = GEN_INT(INTVAL(operands[2])+1 ); -- emit_insn (gen_extv_32 (operands[0], operands[1], -- operands[2], operands[3])); -- DONE; --}") -+"" -+) - - (define_insn "extv_32" - [(set (match_operand:SI 0 "register_operand" "=r") -@@ -2518,22 +2501,9 @@ - (match_operand:SI 1 "immediate_operand" "I") - (match_operand:SI 2 "immediate_operand" "I")) - (match_operand:SI 3 "register_operand" "r"))] -- "TARGET_HAS_BITFIELD" -- " --{ -- unsigned HOST_WIDE_INT len = UINTVAL (operands[1]); -- unsigned HOST_WIDE_INT pos = UINTVAL (operands[2]); -- -- if (len <= 0 || pos + len > 32) -- FAIL; -- -- ;;if (!register_operand (operands[0], VOIDmode)) -- ;; FAIL; -- -- emit_insn (gen_insv_32 (operands[0], operands[1], -- operands[2], operands[3])); -- DONE; --}") -+"TARGET_HAS_BITFIELD" -+"" -+) - - (define_insn "insv_32" - [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+r") --- -2.14.2 - diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0033-MicroBlaze-fix-signed-bit-fields-with-bit-field-inst.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0033-MicroBlaze-fix-signed-bit-fields-with-bit-field-inst.patch deleted file mode 100644 index eaae5667..00000000 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0033-MicroBlaze-fix-signed-bit-fields-with-bit-field-inst.patch +++ /dev/null @@ -1,51 +0,0 @@ -From e2a7a582945d24ede55393462a3360f377f45478 Mon Sep 17 00:00:00 2001 -From: Nathan Rossi <nathan@nathanrossi.com> -Date: Sun, 5 Nov 2017 23:03:54 +1000 -Subject: [PATCH] MicroBlaze fix signed bit fields with bit field instructions - -The 'extv' definition is expected to sign extended the result based on -the width of the bit field. - - https://gcc.gnu.org/onlinedocs/gccint/Standard-Names.html#index-extvm-instruction-pattern - -The MicroBlaze 'bsefi' instruction does not sign extended, it zero -extends. There is no option for the instruction to sign extended the -result and no simple instruction or expression to implement a variant -length sign extend (only sext8/sext16 instructions exist). - -As such these definitions needs to be changed to the zero extended -variant of 'extv' which is 'extzv'. This change updates the existing -definitions to allow for signed bit fields to function correctly and be -sign extended. - -Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> -Upstream-Status: Pending ---- - gcc/config/microblaze/microblaze.md | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index ef53c3069e..b52be42d6e 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -2476,7 +2476,7 @@ - DONE; - }") - --(define_expand "extvsi" -+(define_expand "extzvsi" - [(set (match_operand:SI 0 "register_operand" "r") - (zero_extract:SI (match_operand:SI 1 "register_operand" "r") - (match_operand:SI 2 "immediate_operand" "I") -@@ -2485,7 +2485,7 @@ - "" - ) - --(define_insn "extv_32" -+(define_insn "extzv_32" - [(set (match_operand:SI 0 "register_operand" "=r") - (zero_extract:SI (match_operand:SI 1 "register_operand" "r") - (match_operand:SI 2 "immediate_operand" "I") --- -2.14.2 - |