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Diffstat (limited to 'recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0008_arm64_dts_qcom_qcm2290_add_display_nodes.patch')
-rw-r--r--recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0008_arm64_dts_qcom_qcm2290_add_display_nodes.patch247
1 files changed, 247 insertions, 0 deletions
diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0008_arm64_dts_qcom_qcm2290_add_display_nodes.patch b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0008_arm64_dts_qcom_qcm2290_add_display_nodes.patch
new file mode 100644
index 0000000..577adb0
--- /dev/null
+++ b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0008_arm64_dts_qcom_qcm2290_add_display_nodes.patch
@@ -0,0 +1,247 @@
+From: Konrad Dybcio <konrad.dybcio@linaro.org>
+Subject: arm64: dts: qcom: qcm2290: Add display nodes
+Date: Wed, 29 Nov 2023 15:44:05 +0100
+
+Add the required nodes to support display on QCM2290.
+
+Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
+Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git a2b32096709dbf4af02675d98356a9d3ad86ff05]
+---
+ arch/arm64/boot/dts/qcom/qcm2290.dtsi | 214 ++++++++++++++++++++++++++++++++++
+ 1 file changed, 214 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
+index d46e591e72b5..a3edc4667cc5 100644
+--- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi
++++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
+@@ -5,6 +5,7 @@
+ * Based on sm6115.dtsi and previous efforts by Shawn Guo & Loic Poulain.
+ */
+
++#include <dt-bindings/clock/qcom,dispcc-qcm2290.h>
+ #include <dt-bindings/clock/qcom,gcc-qcm2290.h>
+ #include <dt-bindings/clock/qcom,rpmcc.h>
+ #include <dt-bindings/dma/qcom-gpi.h>
+@@ -1105,6 +1106,219 @@ usb_dwc3: usb@4e00000 {
+ };
+ };
+
++ mdss: display-subsystem@5e00000 {
++ compatible = "qcom,qcm2290-mdss";
++ reg = <0x0 0x05e00000 0x0 0x1000>;
++ reg-names = "mdss";
++ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-controller;
++ #interrupt-cells = <1>;
++
++ clocks = <&gcc GCC_DISP_AHB_CLK>,
++ <&gcc GCC_DISP_HF_AXI_CLK>,
++ <&dispcc DISP_CC_MDSS_MDP_CLK>;
++ clock-names = "iface",
++ "bus",
++ "core";
++
++ resets = <&dispcc DISP_CC_MDSS_CORE_BCR>;
++
++ power-domains = <&dispcc MDSS_GDSC>;
++
++ iommus = <&apps_smmu 0x420 0x2>,
++ <&apps_smmu 0x421 0x0>;
++
++ #address-cells = <2>;
++ #size-cells = <2>;
++ ranges;
++
++ status = "disabled";
++
++ mdp: display-controller@5e01000 {
++ compatible = "qcom,qcm2290-dpu";
++ reg = <0x0 0x05e01000 0x0 0x8f000>,
++ <0x0 0x05eb0000 0x0 0x2008>;
++ reg-names = "mdp",
++ "vbif";
++
++ interrupt-parent = <&mdss>;
++ interrupts = <0>;
++
++ clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
++ <&dispcc DISP_CC_MDSS_AHB_CLK>,
++ <&dispcc DISP_CC_MDSS_MDP_CLK>,
++ <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
++ <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
++ clock-names = "bus",
++ "iface",
++ "core",
++ "lut",
++ "vsync";
++
++ operating-points-v2 = <&mdp_opp_table>;
++ power-domains = <&rpmpd QCM2290_VDDCX>;
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ reg = <0>;
++ dpu_intf1_out: endpoint {
++ remote-endpoint = <&mdss_dsi0_in>;
++ };
++ };
++ };
++
++ mdp_opp_table: opp-table {
++ compatible = "operating-points-v2";
++
++ opp-19200000 {
++ opp-hz = /bits/ 64 <19200000>;
++ required-opps = <&rpmpd_opp_min_svs>;
++ };
++
++ opp-192000000 {
++ opp-hz = /bits/ 64 <192000000>;
++ required-opps = <&rpmpd_opp_low_svs>;
++ };
++
++ opp-256000000 {
++ opp-hz = /bits/ 64 <256000000>;
++ required-opps = <&rpmpd_opp_svs>;
++ };
++
++ opp-307200000 {
++ opp-hz = /bits/ 64 <307200000>;
++ required-opps = <&rpmpd_opp_svs_plus>;
++ };
++
++ opp-384000000 {
++ opp-hz = /bits/ 64 <384000000>;
++ required-opps = <&rpmpd_opp_nom>;
++ };
++ };
++ };
++
++ mdss_dsi0: dsi@5e94000 {
++ compatible = "qcom,qcm2290-dsi-ctrl", "qcom,mdss-dsi-ctrl";
++ reg = <0x0 0x05e94000 0x0 0x400>;
++ reg-names = "dsi_ctrl";
++
++ interrupt-parent = <&mdss>;
++ interrupts = <4>;
++
++ clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
++ <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
++ <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
++ <&dispcc DISP_CC_MDSS_ESC0_CLK>,
++ <&dispcc DISP_CC_MDSS_AHB_CLK>,
++ <&gcc GCC_DISP_HF_AXI_CLK>;
++ clock-names = "byte",
++ "byte_intf",
++ "pixel",
++ "core",
++ "iface",
++ "bus";
++
++ assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>,
++ <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
++ assigned-clock-parents = <&mdss_dsi0_phy 0>,
++ <&mdss_dsi0_phy 1>;
++
++ operating-points-v2 = <&dsi_opp_table>;
++ power-domains = <&rpmpd QCM2290_VDDCX>;
++ phys = <&mdss_dsi0_phy>;
++
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ status = "disabled";
++
++ dsi_opp_table: opp-table {
++ compatible = "operating-points-v2";
++
++ opp-19200000 {
++ opp-hz = /bits/ 64 <19200000>;
++ required-opps = <&rpmpd_opp_min_svs>;
++ };
++
++ opp-164000000 {
++ opp-hz = /bits/ 64 <164000000>;
++ required-opps = <&rpmpd_opp_low_svs>;
++ };
++
++ opp-187500000 {
++ opp-hz = /bits/ 64 <187500000>;
++ required-opps = <&rpmpd_opp_svs>;
++ };
++ };
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ reg = <0>;
++
++ mdss_dsi0_in: endpoint {
++ remote-endpoint = <&dpu_intf1_out>;
++ };
++ };
++
++ port@1 {
++ reg = <1>;
++
++ mdss_dsi0_out: endpoint {
++ };
++ };
++ };
++ };
++
++ mdss_dsi0_phy: phy@5e94400 {
++ compatible = "qcom,dsi-phy-14nm-2290";
++ reg = <0x0 0x05e94400 0x0 0x100>,
++ <0x0 0x05e94500 0x0 0x300>,
++ <0x0 0x05e94800 0x0 0x188>;
++ reg-names = "dsi_phy",
++ "dsi_phy_lane",
++ "dsi_pll";
++
++ clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
++ <&rpmcc RPM_SMD_XO_CLK_SRC>;
++ clock-names = "iface",
++ "ref";
++
++ power-domains = <&rpmpd QCM2290_VDDMX>;
++ required-opps = <&rpmpd_opp_nom>;
++
++ #clock-cells = <1>;
++ #phy-cells = <0>;
++
++ status = "disabled";
++ };
++ };
++
++ dispcc: clock-controller@5f00000 {
++ compatible = "qcom,qcm2290-dispcc";
++ reg = <0x0 0x05f00000 0x0 0x20000>;
++ clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
++ <&rpmcc RPM_SMD_XO_A_CLK_SRC>,
++ <&gcc GCC_DISP_GPLL0_CLK_SRC>,
++ <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>,
++ <&mdss_dsi0_phy 0>,
++ <&mdss_dsi0_phy 1>;
++ clock-names = "bi_tcxo",
++ "bi_tcxo_ao",
++ "gcc_disp_gpll0_clk_src",
++ "gcc_disp_gpll0_div_clk_src",
++ "dsi0_phy_pll_out_byteclk",
++ "dsi0_phy_pll_out_dsiclk";
++ #power-domain-cells = <1>;
++ #clock-cells = <1>;
++ #reset-cells = <1>;
++ };
++
+ remoteproc_mpss: remoteproc@6080000 {
+ compatible = "qcom,qcm2290-mpss-pas", "qcom,sm6115-mpss-pas";
+ reg = <0x0 0x06080000 0x0 0x100>;
+--
+2.43.0
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-04-27 08:47:57 +0000