diff options
Diffstat (limited to 'recipes-kernel/linux/linux-yocto/qrb2210-dts/0001-arm64-dts-qcom-qcm2290-Hook-up-MPM.patch')
-rw-r--r-- | recipes-kernel/linux/linux-yocto/qrb2210-dts/0001-arm64-dts-qcom-qcm2290-Hook-up-MPM.patch | 114 |
1 files changed, 114 insertions, 0 deletions
diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-dts/0001-arm64-dts-qcom-qcm2290-Hook-up-MPM.patch b/recipes-kernel/linux/linux-yocto/qrb2210-dts/0001-arm64-dts-qcom-qcm2290-Hook-up-MPM.patch new file mode 100644 index 0000000..d1e935d --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb2210-dts/0001-arm64-dts-qcom-qcm2290-Hook-up-MPM.patch @@ -0,0 +1,114 @@ +From e3f6a699404154e7e103f8055f21c3556721603f Mon Sep 17 00:00:00 2001 +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Date: Fri, 15 Dec 2023 01:01:10 +0100 +Subject: [PATCH] arm64: dts: qcom: qcm2290: Hook up MPM + +Wire up MPM and the interrupts it provides. + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Link: https://lore.kernel.org/r/20231215-topic-mpm_dt-v1-3-c6636fc75ce3@linaro.org +Signed-off-by: Bjorn Andersson <andersson@kernel.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git e3f6a699404154e7e103f8055f21c3556721603f] +--- + arch/arm64/boot/dts/qcom/qcm2290.dtsi | 42 ++++++++++++++++++++++----- + 1 file changed, 35 insertions(+), 7 deletions(-) + +diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi +index ce04d0acdede..0911fb08ed63 100644 +--- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi ++++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi +@@ -199,6 +199,7 @@ CPU_PD3: power-domain-cpu3 { + + CLUSTER_PD: power-domain-cpu-cluster { + #power-domain-cells = <0>; ++ power-domains = <&mpm>; + domain-idle-states = <&CLUSTER_SLEEP>; + }; + }; +@@ -266,6 +267,24 @@ rpmpd_opp_turbo_plus: opp8 { + }; + }; + }; ++ ++ mpm: interrupt-controller { ++ compatible = "qcom,mpm"; ++ qcom,rpm-msg-ram = <&apss_mpm>; ++ interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>; ++ mboxes = <&apcs_glb 1>; ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ #power-domain-cells = <0>; ++ interrupt-parent = <&intc>; ++ qcom,mpm-pin-count = <96>; ++ qcom,mpm-pin-map = <2 275>, /* TSENS0 uplow */ ++ <5 296>, /* Soundwire master_irq */ ++ <12 422>, /* DWC3 ss_phy_irq */ ++ <24 79>, /* Soundwire wake_irq */ ++ <86 183>, /* MPM wake, SPMI */ ++ <90 260>; /* QUSB2_PHY DP+DM */ ++ }; + }; + + reserved_memory: reserved-memory { +@@ -429,6 +448,7 @@ tlmm: pinctrl@500000 { + interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>; + gpio-controller; + gpio-ranges = <&tlmm 0 0 127>; ++ wakeup-parent = <&mpm>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; +@@ -778,7 +798,7 @@ spmi_bus: spmi@1c40000 { + "obsrvr", + "intr", + "cnfg"; +- interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>; ++ interrupts-extended = <&mpm 86 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "periph_irq"; + qcom,ee = <0>; + qcom,channel = <0>; +@@ -793,8 +813,8 @@ tsens0: thermal-sensor@4411000 { + reg = <0x0 0x04411000 0x0 0x1ff>, + <0x0 0x04410000 0x0 0x8>; + #qcom,sensors = <10>; +- interrupts = <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>, +- <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; ++ interrupts-extended = <&mpm 2 IRQ_TYPE_LEVEL_HIGH>, ++ <&intc GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "uplow", "critical"; + #thermal-sensor-cells = <1>; + }; +@@ -813,8 +833,15 @@ bimc: interconnect@4480000 { + }; + + rpm_msg_ram: sram@45f0000 { +- compatible = "qcom,rpm-msg-ram"; ++ compatible = "qcom,rpm-msg-ram", "mmio-sram"; + reg = <0x0 0x045f0000 0x0 0x7000>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges = <0 0x0 0x045f0000 0x7000>; ++ ++ apss_mpm: sram@1b8 { ++ reg = <0x1b8 0x48>; ++ }; + }; + + sram@4690000 { +@@ -1293,9 +1320,10 @@ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, + usb: usb@4ef8800 { + compatible = "qcom,qcm2290-dwc3", "qcom,dwc3"; + reg = <0x0 0x04ef8800 0x0 0x400>; +- interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, +- <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>; +- interrupt-names = "hs_phy_irq", "ss_phy_irq"; ++ interrupts-extended = <&intc GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, ++ <&mpm 12 IRQ_TYPE_LEVEL_HIGH>; ++ interrupt-names = "hs_phy_irq", ++ "ss_phy_irq"; + + clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, + <&gcc GCC_USB30_PRIM_MASTER_CLK>, +-- +2.39.2 + |