diff options
Diffstat (limited to 'recipes-kernel/linux/linux-yocto/qcm6490-board-dts')
11 files changed, 1421 insertions, 0 deletions
diff --git a/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0001-FROMLIST-arm64-dts-qcom-qcm6490-idp-Update-protected.patch b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0001-FROMLIST-arm64-dts-qcom-qcm6490-idp-Update-protected.patch new file mode 100644 index 0000000..68a75c1 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0001-FROMLIST-arm64-dts-qcom-qcm6490-idp-Update-protected.patch @@ -0,0 +1,64 @@ +From 033eb03a2ab2057f3f79a20be485f5c58af20816 Mon Sep 17 00:00:00 2001 +From: Taniya Das <quic_tdas@quicinc.com> +Date: Mon, 18 Mar 2024 11:05:54 +0530 +Subject: [PATCH 1/3] FROMLIST: arm64: dts: qcom: qcm6490-idp: Update protected + clocks list + +Certain clocks are not accessible on QCM6490-IDP board, +thus mark them as protected. Update the lpassaudio node to +support the new compatible. + +Signed-off-by: Taniya Das <quic_tdas@quicinc.com> +Upstream-Status: Submitted [https://lore.kernel.org/r/20240318053555.20405-8-quic_tdas@quicinc.com] +--- + arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 28 +++++++++++++++++++++++- + 1 file changed, 27 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +index 2a5631b0fa40..3baea71e0248 100644 +--- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts ++++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: BSD-3-Clause + /* +- * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. ++ * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + /dts-v1/; +@@ -412,6 +412,32 @@ vreg_bob_3p296: bob { + }; + }; + ++&gcc { ++ protected-clocks = <GCC_AGGRE_NOC_PCIE_1_AXI_CLK> ,<GCC_PCIE_1_AUX_CLK>, ++ <GCC_PCIE_1_AUX_CLK_SRC>, <GCC_PCIE_1_CFG_AHB_CLK>, ++ <GCC_PCIE_1_MSTR_AXI_CLK>, <GCC_PCIE_1_PHY_RCHNG_CLK_SRC>, ++ <GCC_PCIE_1_PIPE_CLK>, <GCC_PCIE_1_PIPE_CLK_SRC>, ++ <GCC_PCIE_1_SLV_AXI_CLK>, <GCC_PCIE_1_SLV_Q2A_AXI_CLK>, ++ <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, <GCC_QSPI_CORE_CLK>, ++ <GCC_QSPI_CORE_CLK_SRC>,<GCC_USB30_SEC_MASTER_CLK>, ++ <GCC_USB30_SEC_MASTER_CLK_SRC>, <GCC_USB30_SEC_MOCK_UTMI_CLK>, ++ <GCC_USB30_SEC_MOCK_UTMI_CLK_SRC>, ++ <GCC_USB30_SEC_MOCK_UTMI_POSTDIV_CLK_SRC>, <GCC_USB30_SEC_SLEEP_CLK>, ++ <GCC_USB3_SEC_PHY_AUX_CLK>, <GCC_USB3_SEC_PHY_AUX_CLK_SRC>, ++ <GCC_USB3_SEC_PHY_COM_AUX_CLK>, <GCC_USB3_SEC_PHY_PIPE_CLK>, ++ <GCC_USB3_SEC_PHY_PIPE_CLK_SRC>, <GCC_CFG_NOC_LPASS_CLK>, ++ <GCC_MSS_GPLL0_MAIN_DIV_CLK_SRC>, <GCC_MSS_CFG_AHB_CLK>, ++ <GCC_MSS_OFFLINE_AXI_CLK>, <GCC_MSS_SNOC_AXI_CLK>, ++ <GCC_MSS_Q6_MEMNOC_AXI_CLK>, <GCC_MSS_Q6SS_BOOT_CLK_SRC>, ++ <GCC_SEC_CTRL_CLK_SRC>, <GCC_WPSS_AHB_CLK>, ++ <GCC_WPSS_AHB_BDG_MST_CLK>, <GCC_WPSS_RSCP_CLK>; ++}; ++ ++&lpass_audiocc { ++ compatible = "qcom,qcm6490-lpassaudiocc"; ++ /delete-property/ power-domains; ++}; ++ + &qupv3_id_0 { + status = "okay"; + }; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0001-PENDING-arm64-dts-qcom-qcm6490-Add-UFS-nodes-for-IDP.patch b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0001-PENDING-arm64-dts-qcom-qcm6490-Add-UFS-nodes-for-IDP.patch new file mode 100644 index 0000000..c53a032 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0001-PENDING-arm64-dts-qcom-qcm6490-Add-UFS-nodes-for-IDP.patch @@ -0,0 +1,50 @@ +From b51bcd8342aaaffa4d08fd3474b1512f9992886e Mon Sep 17 00:00:00 2001 +From: Manish Pandey <quic_mapa@quicinc.com> +Date: Tue, 17 Oct 2023 23:46:10 +0530 +Subject: [PATCH 1/2] PENDING: arm64: dts: qcom: qcm6490: Add UFS nodes for IDP + +Add UFS host controller and Phy nodes for Qualcomm +qcm6490 IDP Board. + +Change-Id: If756cf2396ad0d82e7c607738068a634c5a1919a +Signed-off-by: Manish Pandey <quic_mapa@quicinc.com> +Signed-off-by: Salendarsingh Gaud <quic_sgaud@quicinc.com> +Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 19 +++++++++++++++++++ + 1 file changed, 19 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +index 3baea71e0248..424cd9c2b092 100644 +--- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts ++++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +@@ -463,6 +463,25 @@ &uart5 { + status = "okay"; + }; + ++&ufs_mem_hc { ++ reset-gpios = <&tlmm 175 GPIO_ACTIVE_LOW>; ++ vcc-supply = <&vreg_l7b_2p952>; ++ vcc-max-microamp = <800000>; ++ vccq-supply = <&vreg_l9b_1p2>; ++ vccq-max-microamp = <900000>; ++ vccq2-supply = <&vreg_l9b_1p2>; ++ vccq2-max-microamp = <900000>; ++ ++ status = "okay"; ++}; ++ ++&ufs_mem_phy { ++ vdda-phy-supply = <&vreg_l10c_0p88>; ++ vdda-pll-supply = <&vreg_l6b_1p2>; ++ ++ status = "okay"; ++}; ++ + &usb_1 { + status = "okay"; + }; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0001-UPSTREAM-arm64-dts-qcom-qcs6490-rb3gen2-Correct-the-.patch b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0001-UPSTREAM-arm64-dts-qcom-qcs6490-rb3gen2-Correct-the-.patch new file mode 100644 index 0000000..194e302 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0001-UPSTREAM-arm64-dts-qcom-qcs6490-rb3gen2-Correct-the-.patch @@ -0,0 +1,37 @@ +From a324118e3760a4a62e623bea5a9f5f262ef97436 Mon Sep 17 00:00:00 2001 +From: Atul Dhudase <quic_adhudase@quicinc.com> +Date: Tue, 2 Apr 2024 15:52:03 +0530 +Subject: [PATCH 1/2] UPSTREAM: arm64: dts: qcom: qcs6490-rb3gen2: Correct the + voltage setting for vph_pwr + +Min and max voltages for vph_pwr should be same, otherwise rpmh +will not probe, so correcting the min and max voltages for vph_pwr. + +Fixes: 04cf333afc75 ("arm64: dts: qcom: Add base qcs6490-rb3gen2 board dts") +Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> +Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Link: https://lore.kernel.org/r/20231220110015.25378-3-quic_kbajaj@quicinc.com +Signed-off-by: Bjorn Andersson <andersson@kernel.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 5f439c0e64b877c1f9cc7f0bed894b6df45d43d] +--- + arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts +index 4266a1200669..d519f2064ea3 100644 +--- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts ++++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts +@@ -121,8 +121,8 @@ debug_vm_mem: debug-vm@d0600000 { + vph_pwr: vph-pwr-regulator { + compatible = "regulator-fixed"; + regulator-name = "vph_pwr"; +- regulator-min-microvolt = <2500000>; +- regulator-max-microvolt = <4350000>; ++ regulator-min-microvolt = <3700000>; ++ regulator-max-microvolt = <3700000>; + }; + }; + +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0001-UPSTREAM-dt-bindings-arm-qcom-Add-QCM6490-Fairphone-.patch b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0001-UPSTREAM-dt-bindings-arm-qcom-Add-QCM6490-Fairphone-.patch new file mode 100644 index 0000000..0010b69 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0001-UPSTREAM-dt-bindings-arm-qcom-Add-QCM6490-Fairphone-.patch @@ -0,0 +1,43 @@ +From 4228299b08120ce8afef3271768dcfa5e760c2c6 Mon Sep 17 00:00:00 2001 +From: Luca Weiss <luca.weiss@fairphone.com> +Date: Tue, 19 Sep 2023 14:46:00 +0200 +Subject: [PATCH 1/4] UPSTREAM: dt-bindings: arm: qcom: Add QCM6490 Fairphone 5 + +Fairphone 5 is a smartphone based on the QCM6490 SoC. + +Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> +Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> +Link: https://lore.kernel.org/r/20230919-fp5-initial-v2-6-14bb7cedadf5@fairphone.com +Signed-off-by: Bjorn Andersson <andersson@kernel.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 4b1a16d776b474345b12f834de1fd42bca226d90] +--- + Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml +index 90f31beb80c2..adee504bffdb 100644 +--- a/Documentation/devicetree/bindings/arm/qcom.yaml ++++ b/Documentation/devicetree/bindings/arm/qcom.yaml +@@ -50,6 +50,7 @@ description: | + msm8998 + qcs404 + qcm2290 ++ qcm6490 + qdu1000 + qrb2210 + qrb4210 +@@ -391,6 +392,11 @@ properties: + - const: qcom,qrb2210 + - const: qcom,qcm2290 + ++ - items: ++ - enum: ++ - fairphone,fp5 ++ - const: qcom,qcm6490 ++ + - description: Qualcomm Technologies, Inc. Distributed Unit 1000 platform + items: + - enum: +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0002-PENDING-arm64-dts-qcom-Add-UFS-nodes-for-qcs6490-rb3.patch b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0002-PENDING-arm64-dts-qcom-Add-UFS-nodes-for-qcs6490-rb3.patch new file mode 100644 index 0000000..8ac2a74 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0002-PENDING-arm64-dts-qcom-Add-UFS-nodes-for-qcs6490-rb3.patch @@ -0,0 +1,49 @@ +From 4c0b2673c7d702483a526ebe279d57c4eece8f09 Mon Sep 17 00:00:00 2001 +From: Atul Dhudase <quic_adhudase@quicinc.com> +Date: Fri, 22 Mar 2024 14:06:21 +0530 +Subject: [PATCH 2/2] PENDING: arm64: dts: qcom: Add UFS nodes for + qcs6490-rb3gen2 + +Add UFS host controller and Phy nodes for Qualcomm +qcs6490-rb3gen2 board. + +Signed-off-by: Manish Pandey <quic_mapa@quicinc.com> +Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 19 +++++++++++++++++++ + 1 file changed, 19 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts +index 84137086c1f6..6dbeb182d014 100644 +--- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts ++++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts +@@ -446,6 +446,25 @@ &uart5 { + status = "okay"; + }; + ++&ufs_mem_hc { ++ reset-gpios = <&tlmm 175 GPIO_ACTIVE_LOW>; ++ vcc-supply = <&vreg_l7b_2p952>; ++ vcc-max-microamp = <800000>; ++ vccq-supply = <&vreg_l9b_1p2>; ++ vccq-max-microamp = <900000>; ++ vccq2-supply = <&vreg_l9b_1p2>; ++ vccq2-max-microamp = <900000>; ++ ++ status = "okay"; ++}; ++ ++&ufs_mem_phy { ++ vdda-phy-supply = <&vreg_l10c_0p88>; ++ vdda-pll-supply = <&vreg_l6b_1p2>; ++ ++ status = "okay"; ++}; ++ + &usb_1 { + status = "okay"; + }; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0002-UPSTREAM-arm64-dts-qcom-qcm6490-idp-Correct-the-volt.patch b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0002-UPSTREAM-arm64-dts-qcom-qcm6490-idp-Correct-the-volt.patch new file mode 100644 index 0000000..b161099 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0002-UPSTREAM-arm64-dts-qcom-qcm6490-idp-Correct-the-volt.patch @@ -0,0 +1,37 @@ +From a9d2e53efb1dd1bfea1be9c66ddcf319246aa140 Mon Sep 17 00:00:00 2001 +From: Atul Dhudase <quic_adhudase@quicinc.com> +Date: Tue, 2 Apr 2024 15:56:30 +0530 +Subject: [PATCH 2/2] UPSTREAM: arm64: dts: qcom: qcm6490-idp: Correct the + voltage setting for vph_pwr + +Min and max voltages for vph_pwr should be same, otherwise rpmh +will not probe, so correcting the min and max voltages for vph_pwr. + +Fixes: 9af6a9f32ad0 ("arm64: dts: qcom: Add base qcm6490 idp board dts") +Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> +Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Link: https://lore.kernel.org/r/20231220110015.25378-2-quic_kbajaj@quicinc.com +Signed-off-by: Bjorn Andersson <andersson@kernel.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git aa56130e88de50773f84de4039c7de81ab783744] +--- + arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +index 123e0e1b9e84..89e653c93ae8 100644 +--- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts ++++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +@@ -120,8 +120,8 @@ debug_vm_mem: debug-vm@d0600000 { + vph_pwr: vph-pwr-regulator { + compatible = "regulator-fixed"; + regulator-name = "vph_pwr"; +- regulator-min-microvolt = <2500000>; +- regulator-max-microvolt = <4350000>; ++ regulator-min-microvolt = <3700000>; ++ regulator-max-microvolt = <3700000>; + }; + }; + +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0002-UPSTREAM-arm64-dts-qcom-qcs6490-rb3gen2-Declare-GCC-.patch b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0002-UPSTREAM-arm64-dts-qcom-qcs6490-rb3gen2-Declare-GCC-.patch new file mode 100644 index 0000000..5834979 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0002-UPSTREAM-arm64-dts-qcom-qcs6490-rb3gen2-Declare-GCC-.patch @@ -0,0 +1,56 @@ +From 75600814c282c7e7de67b94786d1dee0b9ddcfe2 Mon Sep 17 00:00:00 2001 +From: Atul Dhudase <quic_adhudase@quicinc.com> +Date: Tue, 2 Apr 2024 12:28:35 +0530 +Subject: [PATCH 2/3] UPSTREAM: arm64: dts: qcom: qcs6490-rb3gen2: Declare GCC + clocks protected + +The SC7280 GCC binding describes clocks which, due to the difference in +security model, are not accessible on the RB3gen2 - in the same way seen +on QCM6490. + +Mark these clocks as protected, to allow the board to boot. In contrast +to the present QCM6490 boards GCC_EDP_CLKREF_EN is left out, as this +does not need to be "protected" and is used on the RB3Gen2 board. + +Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Reviewed-by: Luca Weiss <luca.weiss@fairphone.com> +Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> +Link: https://lore.kernel.org/r/20240209-qcm6490-gcc-protected-clocks-v2-1-11cd5fc13bd0@quicinc.com +Signed-off-by: Bjorn Andersson <andersson@kernel.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 7c6bef576a8891abce08d448165b53328032aa5f] +--- + arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 17 +++++++++++++++++ + 1 file changed, 17 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts +index 0beab54c051e..b642ba9d4c00 100644 +--- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts ++++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts +@@ -410,6 +410,23 @@ vreg_bob_3p296: bob { + }; + }; + ++&gcc { ++ protected-clocks = <GCC_CFG_NOC_LPASS_CLK>, ++ <GCC_MSS_CFG_AHB_CLK>, ++ <GCC_MSS_GPLL0_MAIN_DIV_CLK_SRC>, ++ <GCC_MSS_OFFLINE_AXI_CLK>, ++ <GCC_MSS_Q6SS_BOOT_CLK_SRC>, ++ <GCC_MSS_Q6_MEMNOC_AXI_CLK>, ++ <GCC_MSS_SNOC_AXI_CLK>, ++ <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, ++ <GCC_QSPI_CORE_CLK>, ++ <GCC_QSPI_CORE_CLK_SRC>, ++ <GCC_SEC_CTRL_CLK_SRC>, ++ <GCC_WPSS_AHB_BDG_MST_CLK>, ++ <GCC_WPSS_AHB_CLK>, ++ <GCC_WPSS_RSCP_CLK>; ++}; ++ + &qupv3_id_0 { + status = "okay"; + }; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0002-UPSTREAM-dt-bindings-arm-qcom-Add-QCM6490-IDP-and-QC.patch b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0002-UPSTREAM-dt-bindings-arm-qcom-Add-QCM6490-IDP-and-QC.patch new file mode 100644 index 0000000..7951f09 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0002-UPSTREAM-dt-bindings-arm-qcom-Add-QCM6490-IDP-and-QC.patch @@ -0,0 +1,39 @@ +From 4557d6178af17473f392968474b5ca0da56b1175 Mon Sep 17 00:00:00 2001 +From: Komal Bajaj <quic_kbajaj@quicinc.com> +Date: Wed, 29 Nov 2023 12:28:14 +0530 +Subject: [PATCH 2/4] UPSTREAM: dt-bindings: arm: qcom: Add QCM6490 IDP and + QCS6490 RB3Gen2 board + +Document the qcom,qcm6490-idp and qcs6490-rb3gen2 boards. +qcm6490-idp based off qcm6490 SoC derived from sc7280 meant for +various form factor including IoT and qcs6490-rb3gen2 based off +qcs6490 SoC derivative of qcm6490 without internal modem. + +Co-developed by: Naina Mehta <quic_nainmeht@quicinc.com> +Signed-off by: Naina Mehta <quic_nainmeht@quicinc.com> + +Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> +Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> +Link: https://lore.kernel.org/r/20231129065816.26409-2-quic_kbajaj@quicinc.com +Signed-off-by: Bjorn Andersson <andersson@kernel.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 06fd1dd1efde4a0bcc874de03558f6e0ba3817eb] +--- + Documentation/devicetree/bindings/arm/qcom.yaml | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml +index adee504bffdb..e45e293457d3 100644 +--- a/Documentation/devicetree/bindings/arm/qcom.yaml ++++ b/Documentation/devicetree/bindings/arm/qcom.yaml +@@ -395,6 +395,8 @@ properties: + - items: + - enum: + - fairphone,fp5 ++ - qcom,qcm6490-idp ++ - qcom,qcs6490-rb3gen2 + - const: qcom,qcm6490 + + - description: Qualcomm Technologies, Inc. Distributed Unit 1000 platform +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0003-BACKPORT-FROMLIST-arm64-dts-qcom-qcs6490-rb3gen2-Upd.patch b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0003-BACKPORT-FROMLIST-arm64-dts-qcom-qcs6490-rb3gen2-Upd.patch new file mode 100644 index 0000000..a1716fd --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0003-BACKPORT-FROMLIST-arm64-dts-qcom-qcs6490-rb3gen2-Upd.patch @@ -0,0 +1,41 @@ +From 85e1d98a2b1d8515d242154aef320a3900fb5030 Mon Sep 17 00:00:00 2001 +From: Taniya Das <quic_tdas@quicinc.com> +Date: Mon, 18 Mar 2024 11:05:55 +0530 +Subject: [PATCH 3/3] BACKPORT: FROMLIST: arm64: dts: qcom: qcs6490-rb3gen2: + Update the LPASS audio node + +Update the lpassaudio node to support the new compatible. + +Signed-off-by: Taniya Das <quic_tdas@quicinc.com> +Upstream-Status: Submitted [https://lore.kernel.org/r/20240318053555.20405-9-quic_tdas@quicinc.com] +--- + arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 7 ++++++- + 1 file changed, 6 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts +index b642ba9d4c00..84137086c1f6 100644 +--- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts ++++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: BSD-3-Clause + /* +- * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. ++ * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + /dts-v1/; +@@ -427,6 +427,11 @@ &gcc { + <GCC_WPSS_RSCP_CLK>; + }; + ++&lpass_audiocc { ++ compatible = "qcom,qcm6490-lpassaudiocc"; ++ /delete-property/ power-domains; ++}; ++ + &qupv3_id_0 { + status = "okay"; + }; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0003-UPSTREAM-arm64-dts-qcom-Add-base-qcm6490-id.patch b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0003-UPSTREAM-arm64-dts-qcom-Add-base-qcm6490-id.patch new file mode 100644 index 0000000..bb60422 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0003-UPSTREAM-arm64-dts-qcom-Add-base-qcm6490-id.patch @@ -0,0 +1,508 @@ +From 4c6d64ebad9067be2a5138ab202f570b0e71d3f0 Mon Sep 17 00:00:00 2001 +From: Komal Bajaj <quic_kbajaj@quicinc.com> +Date: Wed, 29 Nov 2023 12:28:15 +0530 +Subject: [PATCH 3/4] UPSTREAM: arm64: dts: qcom: Add base qcm6490 + idp board dts + +Add DTS for Qualcomm IDP platform using QCM6490 SoC. +This adds debug uart, eMMC and usb support along with +regulators found on this board. + +Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> +Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> +Link: https://lore.kernel.org/r/20231129065816.26409-3-quic_kbajaj@quicinc.com +Signed-off-by: Bjorn Andersson <andersson@kernel.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 9af6a9f32ad0023b1d682af213a0c8c2aa1dce29] +--- + arch/arm64/boot/dts/qcom/Makefile | 1 + + arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 465 +++++++++++++++++++++++ + 2 files changed, 466 insertions(+) + create mode 100644 arch/arm64/boot/dts/qcom/qcm6490-idp.dts + +diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile +index 2cca20563a1d..3199b1b8db13 100644 +--- a/arch/arm64/boot/dts/qcom/Makefile ++++ b/arch/arm64/boot/dts/qcom/Makefile +@@ -81,6 +81,7 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-lilac.dtb + dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-maple.dtb + dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-poplar.dtb + dtb-$(CONFIG_ARCH_QCOM) += msm8998-xiaomi-sagit.dtb ++dtb-$(CONFIG_ARCH_QCOM) += qcm6490-idp.dtb + dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb + dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb + dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb +diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +new file mode 100644 +index 000000000000..2a5631b0fa40 +--- /dev/null ++++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +@@ -0,0 +1,465 @@ ++// SPDX-License-Identifier: BSD-3-Clause ++/* ++ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. ++ */ ++ ++/dts-v1/; ++ ++#include <dt-bindings/regulator/qcom,rpmh-regulator.h> ++#include "sc7280.dtsi" ++#include "pm7325.dtsi" ++#include "pm8350c.dtsi" ++#include "pmk8350.dtsi" ++ ++/delete-node/ &ipa_fw_mem; ++/delete-node/ &rmtfs_mem; ++/delete-node/ &video_mem; ++/delete-node/ &wlan_ce_mem; ++/delete-node/ &xbl_mem; ++ ++/ { ++ model = "Qualcomm Technologies, Inc. QCM6490 IDP"; ++ compatible = "qcom,qcm6490-idp", "qcom,qcm6490"; ++ chassis-type = "embedded"; ++ ++ aliases { ++ serial0 = &uart5; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ reserved-memory { ++ xbl_mem: xbl@80700000 { ++ reg = <0x0 0x80700000 0x0 0x100000>; ++ no-map; ++ }; ++ ++ cdsp_secure_heap_mem: cdsp-secure-heap@81800000 { ++ reg = <0x0 0x81800000 0x0 0x1e00000>; ++ no-map; ++ }; ++ ++ camera_mem: camera@84300000 { ++ reg = <0x0 0x84300000 0x0 0x500000>; ++ no-map; ++ }; ++ ++ wpss_mem: wpss@84800000 { ++ reg = <0x0 0x84800000 0x0 0x1900000>; ++ no-map; ++ }; ++ ++ adsp_mem: adsp@86100000 { ++ reg = <0x0 0x86100000 0x0 0x2800000>; ++ no-map; ++ }; ++ ++ cdsp_mem: cdsp@88900000 { ++ reg = <0x0 0x88900000 0x0 0x1e00000>; ++ no-map; ++ }; ++ ++ video_mem: video@8a700000 { ++ reg = <0x0 0x8a700000 0x0 0x700000>; ++ no-map; ++ }; ++ ++ cvp_mem: cvp@8ae00000 { ++ reg = <0x0 0x8ae00000 0x0 0x500000>; ++ no-map; ++ }; ++ ++ ipa_fw_mem: ipa-fw@8b300000 { ++ reg = <0x0 0x8b300000 0x0 0x10000>; ++ no-map; ++ }; ++ ++ ipa_gsi_mem: ipa-gsi@8b310000 { ++ reg = <0x0 0x8b310000 0x0 0xa000>; ++ no-map; ++ }; ++ ++ gpu_microcode_mem: gpu-microcode@8b31a000 { ++ reg = <0x0 0x8b31a000 0x0 0x2000>; ++ no-map; ++ }; ++ ++ mpss_mem: mpss@8b800000 { ++ reg = <0x0 0x8b800000 0x0 0xf600000>; ++ no-map; ++ }; ++ ++ tz_stat_mem: tz-stat@c0000000 { ++ reg = <0x0 0xc0000000 0x0 0x100000>; ++ no-map; ++ }; ++ ++ tags_mem: tags@c0100000 { ++ reg = <0x0 0xc0100000 0x0 0x1200000>; ++ no-map; ++ }; ++ ++ qtee_mem: qtee@c1300000 { ++ reg = <0x0 0xc1300000 0x0 0x500000>; ++ no-map; ++ }; ++ ++ trusted_apps_mem: trusted_apps@c1800000 { ++ reg = <0x0 0xc1800000 0x0 0x1c00000>; ++ no-map; ++ }; ++ ++ debug_vm_mem: debug-vm@d0600000 { ++ reg = <0x0 0xd0600000 0x0 0x100000>; ++ no-map; ++ }; ++ }; ++ ++ vph_pwr: vph-pwr-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vph_pwr"; ++ regulator-min-microvolt = <2500000>; ++ regulator-max-microvolt = <4350000>; ++ }; ++}; ++ ++&apps_rsc { ++ regulators-0 { ++ compatible = "qcom,pm7325-rpmh-regulators"; ++ qcom,pmic-id = "b"; ++ ++ vdd-s1-supply = <&vph_pwr>; ++ vdd-s2-supply = <&vph_pwr>; ++ vdd-s3-supply = <&vph_pwr>; ++ vdd-s4-supply = <&vph_pwr>; ++ vdd-s5-supply = <&vph_pwr>; ++ vdd-s6-supply = <&vph_pwr>; ++ vdd-s7-supply = <&vph_pwr>; ++ vdd-s8-supply = <&vph_pwr>; ++ vdd-l1-l4-l12-l15-supply = <&vreg_s7b_0p972>; ++ vdd-l2-l7-supply = <&vreg_bob_3p296>; ++ vdd-l3-supply = <&vreg_s2b_0p876>; ++ vdd-l5-supply = <&vreg_s2b_0p876>; ++ vdd-l6-l9-l10-supply = <&vreg_s8b_1p272>; ++ vdd-l8-supply = <&vreg_s7b_0p972>; ++ vdd-l11-l17-l18-l19-supply = <&vreg_s1b_1p872>; ++ vdd-l13-supply = <&vreg_s7b_0p972>; ++ vdd-l14-l16-supply = <&vreg_s8b_1p272>; ++ ++ vreg_s1b_1p872: smps1 { ++ regulator-min-microvolt = <1840000>; ++ regulator-max-microvolt = <2040000>; ++ }; ++ ++ vreg_s2b_0p876: smps2 { ++ regulator-min-microvolt = <570070>; ++ regulator-max-microvolt = <1050000>; ++ }; ++ ++ vreg_s7b_0p972: smps7 { ++ regulator-min-microvolt = <535000>; ++ regulator-max-microvolt = <1120000>; ++ }; ++ ++ vreg_s8b_1p272: smps8 { ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1500000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_RET>; ++ }; ++ ++ vreg_l1b_0p912: ldo1 { ++ regulator-min-microvolt = <825000>; ++ regulator-max-microvolt = <925000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l2b_3p072: ldo2 { ++ regulator-min-microvolt = <2700000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l3b_0p504: ldo3 { ++ regulator-min-microvolt = <312000>; ++ regulator-max-microvolt = <910000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l4b_0p752: ldo4 { ++ regulator-min-microvolt = <752000>; ++ regulator-max-microvolt = <820000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ reg_l5b_0p752: ldo5 { ++ regulator-min-microvolt = <552000>; ++ regulator-max-microvolt = <832000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l6b_1p2: ldo6 { ++ regulator-min-microvolt = <1140000>; ++ regulator-max-microvolt = <1260000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l7b_2p952: ldo7 { ++ regulator-min-microvolt = <2400000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l8b_0p904: ldo8 { ++ regulator-min-microvolt = <870000>; ++ regulator-max-microvolt = <970000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l9b_1p2: ldo9 { ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1304000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l11b_1p504: ldo11 { ++ regulator-min-microvolt = <1504000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l12b_0p751: ldo12 { ++ regulator-min-microvolt = <751000>; ++ regulator-max-microvolt = <824000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l13b_0p53: ldo13 { ++ regulator-min-microvolt = <530000>; ++ regulator-max-microvolt = <824000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l14b_1p08: ldo14 { ++ regulator-min-microvolt = <1080000>; ++ regulator-max-microvolt = <1304000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l15b_0p765: ldo15 { ++ regulator-min-microvolt = <765000>; ++ regulator-max-microvolt = <1020000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l16b_1p1: ldo16 { ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1300000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l17b_1p7: ldo17 { ++ regulator-min-microvolt = <1700000>; ++ regulator-max-microvolt = <1900000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l18b_1p8: ldo18 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l19b_1p8: ldo19 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ regulator-allow-set-load; ++ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM ++ RPMH_REGULATOR_MODE_HPM>; ++ }; ++ }; ++ ++ regulators-1 { ++ compatible = "qcom,pm8350c-rpmh-regulators"; ++ qcom,pmic-id = "c"; ++ ++ vdd-s1-supply = <&vph_pwr>; ++ vdd-s2-supply = <&vph_pwr>; ++ vdd-s3-supply = <&vph_pwr>; ++ vdd-s4-supply = <&vph_pwr>; ++ vdd-s5-supply = <&vph_pwr>; ++ vdd-s6-supply = <&vph_pwr>; ++ vdd-s7-supply = <&vph_pwr>; ++ vdd-s8-supply = <&vph_pwr>; ++ vdd-s9-supply = <&vph_pwr>; ++ vdd-s10-supply = <&vph_pwr>; ++ vdd-l1-l12-supply = <&vreg_s1b_1p872>; ++ vdd-l2-l8-supply = <&vreg_s1b_1p872>; ++ vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob_3p296>; ++ vdd-l6-l9-l11-supply = <&vreg_bob_3p296>; ++ vdd-l10-supply = <&vreg_s7b_0p972>; ++ vdd-bob-supply = <&vph_pwr>; ++ ++ vreg_s1c_2p19: smps1 { ++ regulator-min-microvolt = <2190000>; ++ regulator-max-microvolt = <2210000>; ++ }; ++ ++ vreg_s2c_0p752: smps2 { ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <800000>; ++ }; ++ ++ vreg_s5c_0p752: smps5 { ++ regulator-min-microvolt = <465000>; ++ regulator-max-microvolt = <1050000>; ++ }; ++ ++ vreg_s7c_0p752: smps7 { ++ regulator-min-microvolt = <465000>; ++ regulator-max-microvolt = <800000>; ++ }; ++ ++ vreg_s9c_1p084: smps9 { ++ regulator-min-microvolt = <1010000>; ++ regulator-max-microvolt = <1170000>; ++ }; ++ ++ vreg_l1c_1p8: ldo1 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1980000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l2c_1p62: ldo2 { ++ regulator-min-microvolt = <1620000>; ++ regulator-max-microvolt = <1980000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l3c_2p8: ldo3 { ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <3540000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l4c_1p62: ldo4 { ++ regulator-min-microvolt = <1620000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l5c_1p62: ldo5 { ++ regulator-min-microvolt = <1620000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l6c_2p96: ldo6 { ++ regulator-min-microvolt = <1650000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l7c_3p0: ldo7 { ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l8c_1p62: ldo8 { ++ regulator-min-microvolt = <1620000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l9c_2p96: ldo9 { ++ regulator-min-microvolt = <2700000>; ++ regulator-max-microvolt = <35440000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l10c_0p88: ldo10 { ++ regulator-min-microvolt = <720000>; ++ regulator-max-microvolt = <1050000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l11c_2p8: ldo11 { ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l12c_1p65: ldo12 { ++ regulator-min-microvolt = <1650000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l13c_2p7: ldo13 { ++ regulator-min-microvolt = <2700000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_bob_3p296: bob { ++ regulator-min-microvolt = <3008000>; ++ regulator-max-microvolt = <3960000>; ++ }; ++ }; ++}; ++ ++&qupv3_id_0 { ++ status = "okay"; ++}; ++ ++&sdhc_1 { ++ non-removable; ++ no-sd; ++ no-sdio; ++ ++ vmmc-supply = <&vreg_l7b_2p952>; ++ vqmmc-supply = <&vreg_l19b_1p8>; ++ ++ status = "okay"; ++}; ++ ++&tlmm { ++ gpio-reserved-ranges = <32 2>, /* ADSP */ ++ <48 4>; /* NFC */ ++}; ++ ++&uart5 { ++ compatible = "qcom,geni-debug-uart"; ++ status = "okay"; ++}; ++ ++&usb_1 { ++ status = "okay"; ++}; ++ ++&usb_1_dwc3 { ++ dr_mode = "peripheral"; ++}; ++ ++&usb_1_hsphy { ++ vdda-pll-supply = <&vreg_l10c_0p88>; ++ vdda33-supply = <&vreg_l2b_3p072>; ++ vdda18-supply = <&vreg_l1c_1p8>; ++ ++ status = "okay"; ++}; ++ ++&usb_1_qmpphy { ++ vdda-phy-supply = <&vreg_l6b_1p2>; ++ vdda-pll-supply = <&vreg_l1b_0p912>; ++ ++ status = "okay"; ++}; ++ ++&wifi { ++ memory-region = <&wlan_fw_mem>; ++}; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0004-UPSTREAM-arm64-dts-qcom-Add-base-qcs6490-rb3gen2-boa.patch b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0004-UPSTREAM-arm64-dts-qcom-Add-base-qcs6490-rb3gen2-boa.patch new file mode 100644 index 0000000..ce4c246 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0004-UPSTREAM-arm64-dts-qcom-Add-base-qcs6490-rb3gen2-boa.patch @@ -0,0 +1,497 @@ +From 35f473c0500b63f21de7f6ea144f2b5a327a180e Mon Sep 17 00:00:00 2001 +From: Komal Bajaj <quic_kbajaj@quicinc.com> +Date: Wed, 29 Nov 2023 12:28:16 +0530 +Subject: [PATCH 4/4] UPSTREAM: arm64: dts: qcom: Add base qcs6490-rb3gen2 + board dts + +Add DTS for Qualcomm qcs6490-rb3gen2 board which uses +QCS6490 SoC. This adds debug uart and usb support along +with regulators found on this board. + +Co-developed-by: Naina Mehta <quic_nainmeht@quicinc.com> +Signed-off-by: Naina Mehta <quic_nainmeht@quicinc.com> +Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> +Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> +Link: https://lore.kernel.org/r/20231129065816.26409-4-quic_kbajaj@quicinc.com +Signed-off-by: Bjorn Andersson <andersson@kernel.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 04cf333afc757d8fd3c674c6c3f5f86c7755b4d4] +--- + arch/arm64/boot/dts/qcom/Makefile | 1 + + arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 452 +++++++++++++++++++ + 2 files changed, 453 insertions(+) + create mode 100644 arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts + +diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile +index 3199b1b8db13..28178644834a 100644 +--- a/arch/arm64/boot/dts/qcom/Makefile ++++ b/arch/arm64/boot/dts/qcom/Makefile +@@ -84,6 +84,7 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8998-xiaomi-sagit.dtb + dtb-$(CONFIG_ARCH_QCOM) += qcm6490-idp.dtb + dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb + dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb ++dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb + dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb + dtb-$(CONFIG_ARCH_QCOM) += qrb2210-rb1.dtb + dtb-$(CONFIG_ARCH_QCOM) += qrb4210-rb2.dtb +diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts +new file mode 100644 +index 000000000000..0beab54c051e +--- /dev/null ++++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts +@@ -0,0 +1,452 @@ ++// SPDX-License-Identifier: BSD-3-Clause ++/* ++ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. ++ */ ++ ++/dts-v1/; ++ ++/* PM7250B is configured to use SID8/9 */ ++#define PM7250B_SID 8 ++#define PM7250B_SID1 9 ++ ++#include <dt-bindings/regulator/qcom,rpmh-regulator.h> ++#include "sc7280.dtsi" ++#include "pm7250b.dtsi" ++#include "pm7325.dtsi" ++#include "pm8350c.dtsi" ++#include "pmk8350.dtsi" ++ ++/delete-node/ &ipa_fw_mem; ++/delete-node/ &remoteproc_mpss; ++/delete-node/ &rmtfs_mem; ++/delete-node/ &video_mem; ++/delete-node/ &wlan_ce_mem; ++/delete-node/ &xbl_mem; ++ ++/ { ++ model = "Qualcomm Technologies, Inc. Robotics RB3gen2"; ++ compatible = "qcom,qcs6490-rb3gen2", "qcom,qcm6490"; ++ chassis-type = "embedded"; ++ ++ aliases { ++ serial0 = &uart5; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ reserved-memory { ++ xbl_mem: xbl@80700000 { ++ reg = <0x0 0x80700000 0x0 0x100000>; ++ no-map; ++ }; ++ ++ cdsp_secure_heap_mem: cdsp-secure-heap@81800000 { ++ reg = <0x0 0x81800000 0x0 0x1e00000>; ++ no-map; ++ }; ++ ++ camera_mem: camera@84300000 { ++ reg = <0x0 0x84300000 0x0 0x500000>; ++ no-map; ++ }; ++ ++ wpss_mem: wpss@84800000 { ++ reg = <0x0 0x84800000 0x0 0x1900000>; ++ no-map; ++ }; ++ ++ adsp_mem: adsp@86100000 { ++ reg = <0x0 0x86100000 0x0 0x2800000>; ++ no-map; ++ }; ++ ++ cdsp_mem: cdsp@88900000 { ++ reg = <0x0 0x88900000 0x0 0x1e00000>; ++ no-map; ++ }; ++ ++ video_mem: video@8a700000 { ++ reg = <0x0 0x8a700000 0x0 0x700000>; ++ no-map; ++ }; ++ ++ cvp_mem: cvp@8ae00000 { ++ reg = <0x0 0x8ae00000 0x0 0x500000>; ++ no-map; ++ }; ++ ++ ipa_fw_mem: ipa-fw@8b300000 { ++ reg = <0x0 0x8b300000 0x0 0x10000>; ++ no-map; ++ }; ++ ++ ipa_gsi_mem: ipa-gsi@8b310000 { ++ reg = <0x0 0x8b310000 0x0 0xa000>; ++ no-map; ++ }; ++ ++ gpu_microcode_mem: gpu-microcode@8b31a000 { ++ reg = <0x0 0x8b31a000 0x0 0x2000>; ++ no-map; ++ }; ++ ++ tz_stat_mem: tz-stat@c0000000 { ++ reg = <0x0 0xc0000000 0x0 0x100000>; ++ no-map; ++ }; ++ ++ tags_mem: tags@c0100000 { ++ reg = <0x0 0xc0100000 0x0 0x1200000>; ++ no-map; ++ }; ++ ++ qtee_mem: qtee@c1300000 { ++ reg = <0x0 0xc1300000 0x0 0x500000>; ++ no-map; ++ }; ++ ++ trusted_apps_mem: trusted_apps@c1800000 { ++ reg = <0x0 0xc1800000 0x0 0x1c00000>; ++ no-map; ++ }; ++ ++ debug_vm_mem: debug-vm@d0600000 { ++ reg = <0x0 0xd0600000 0x0 0x100000>; ++ no-map; ++ }; ++ }; ++ ++ vph_pwr: vph-pwr-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vph_pwr"; ++ regulator-min-microvolt = <2500000>; ++ regulator-max-microvolt = <4350000>; ++ }; ++}; ++ ++&apps_rsc { ++ regulators-0 { ++ compatible = "qcom,pm7325-rpmh-regulators"; ++ qcom,pmic-id = "b"; ++ ++ vdd-s1-supply = <&vph_pwr>; ++ vdd-s2-supply = <&vph_pwr>; ++ vdd-s3-supply = <&vph_pwr>; ++ vdd-s4-supply = <&vph_pwr>; ++ vdd-s5-supply = <&vph_pwr>; ++ vdd-s6-supply = <&vph_pwr>; ++ vdd-s7-supply = <&vph_pwr>; ++ vdd-s8-supply = <&vph_pwr>; ++ vdd-l1-l4-l12-l15-supply = <&vreg_s7b_0p972>; ++ vdd-l2-l7-supply = <&vreg_bob_3p296>; ++ vdd-l3-supply = <&vreg_s2b_0p876>; ++ vdd-l5-supply = <&vreg_s2b_0p876>; ++ vdd-l6-l9-l10-supply = <&vreg_s8b_1p272>; ++ vdd-l8-supply = <&vreg_s7b_0p972>; ++ vdd-l11-l17-l18-l19-supply = <&vreg_s1b_1p872>; ++ vdd-l13-supply = <&vreg_s7b_0p972>; ++ vdd-l14-l16-supply = <&vreg_s8b_1p272>; ++ ++ vreg_s1b_1p872: smps1 { ++ regulator-min-microvolt = <1840000>; ++ regulator-max-microvolt = <2040000>; ++ }; ++ ++ vreg_s2b_0p876: smps2 { ++ regulator-min-microvolt = <570070>; ++ regulator-max-microvolt = <1050000>; ++ }; ++ ++ vreg_s7b_0p972: smps7 { ++ regulator-min-microvolt = <535000>; ++ regulator-max-microvolt = <1120000>; ++ }; ++ ++ vreg_s8b_1p272: smps8 { ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1500000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_RET>; ++ }; ++ ++ vreg_l1b_0p912: ldo1 { ++ regulator-min-microvolt = <825000>; ++ regulator-max-microvolt = <925000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l2b_3p072: ldo2 { ++ regulator-min-microvolt = <2700000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l3b_0p504: ldo3 { ++ regulator-min-microvolt = <312000>; ++ regulator-max-microvolt = <910000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l4b_0p752: ldo4 { ++ regulator-min-microvolt = <752000>; ++ regulator-max-microvolt = <820000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ reg_l5b_0p752: ldo5 { ++ regulator-min-microvolt = <552000>; ++ regulator-max-microvolt = <832000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l6b_1p2: ldo6 { ++ regulator-min-microvolt = <1140000>; ++ regulator-max-microvolt = <1260000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l7b_2p952: ldo7 { ++ regulator-min-microvolt = <2400000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l8b_0p904: ldo8 { ++ regulator-min-microvolt = <870000>; ++ regulator-max-microvolt = <970000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l9b_1p2: ldo9 { ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1304000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l11b_1p504: ldo11 { ++ regulator-min-microvolt = <1504000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l12b_0p751: ldo12 { ++ regulator-min-microvolt = <751000>; ++ regulator-max-microvolt = <824000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l13b_0p53: ldo13 { ++ regulator-min-microvolt = <530000>; ++ regulator-max-microvolt = <824000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l14b_1p08: ldo14 { ++ regulator-min-microvolt = <1080000>; ++ regulator-max-microvolt = <1304000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l15b_0p765: ldo15 { ++ regulator-min-microvolt = <765000>; ++ regulator-max-microvolt = <1020000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l16b_1p1: ldo16 { ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1300000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l17b_1p7: ldo17 { ++ regulator-min-microvolt = <1700000>; ++ regulator-max-microvolt = <1900000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l18b_1p8: ldo18 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l19b_1p8: ldo19 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ }; ++ ++ regulators-1 { ++ compatible = "qcom,pm8350c-rpmh-regulators"; ++ qcom,pmic-id = "c"; ++ ++ vdd-s1-supply = <&vph_pwr>; ++ vdd-s2-supply = <&vph_pwr>; ++ vdd-s3-supply = <&vph_pwr>; ++ vdd-s4-supply = <&vph_pwr>; ++ vdd-s5-supply = <&vph_pwr>; ++ vdd-s6-supply = <&vph_pwr>; ++ vdd-s7-supply = <&vph_pwr>; ++ vdd-s8-supply = <&vph_pwr>; ++ vdd-s9-supply = <&vph_pwr>; ++ vdd-s10-supply = <&vph_pwr>; ++ vdd-l1-l12-supply = <&vreg_s1b_1p872>; ++ vdd-l2-l8-supply = <&vreg_s1b_1p872>; ++ vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob_3p296>; ++ vdd-l6-l9-l11-supply = <&vreg_bob_3p296>; ++ vdd-l10-supply = <&vreg_s7b_0p972>; ++ vdd-bob-supply = <&vph_pwr>; ++ ++ vreg_s1c_2p19: smps1 { ++ regulator-min-microvolt = <2190000>; ++ regulator-max-microvolt = <2210000>; ++ }; ++ ++ vreg_s2c_0p752: smps2 { ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <800000>; ++ }; ++ ++ vreg_s5c_0p752: smps5 { ++ regulator-min-microvolt = <465000>; ++ regulator-max-microvolt = <1050000>; ++ }; ++ ++ vreg_s7c_0p752: smps7 { ++ regulator-min-microvolt = <465000>; ++ regulator-max-microvolt = <800000>; ++ }; ++ ++ vreg_s9c_1p084: smps9 { ++ regulator-min-microvolt = <1010000>; ++ regulator-max-microvolt = <1170000>; ++ }; ++ ++ vreg_l1c_1p8: ldo1 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1980000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l2c_1p62: ldo2 { ++ regulator-min-microvolt = <1620000>; ++ regulator-max-microvolt = <1980000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l3c_2p8: ldo3 { ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <3540000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l4c_1p62: ldo4 { ++ regulator-min-microvolt = <1620000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l5c_1p62: ldo5 { ++ regulator-min-microvolt = <1620000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l6c_2p96: ldo6 { ++ regulator-min-microvolt = <1650000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l7c_3p0: ldo7 { ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l8c_1p62: ldo8 { ++ regulator-min-microvolt = <1620000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l9c_2p96: ldo9 { ++ regulator-min-microvolt = <2700000>; ++ regulator-max-microvolt = <35440000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l10c_0p88: ldo10 { ++ regulator-min-microvolt = <720000>; ++ regulator-max-microvolt = <1050000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l11c_2p8: ldo11 { ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l12c_1p65: ldo12 { ++ regulator-min-microvolt = <1650000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l13c_2p7: ldo13 { ++ regulator-min-microvolt = <2700000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_bob_3p296: bob { ++ regulator-min-microvolt = <3008000>; ++ regulator-max-microvolt = <3960000>; ++ }; ++ }; ++}; ++ ++&qupv3_id_0 { ++ status = "okay"; ++}; ++ ++&tlmm { ++ gpio-reserved-ranges = <32 2>, /* ADSP */ ++ <48 4>; /* NFC */ ++}; ++ ++&uart5 { ++ compatible = "qcom,geni-debug-uart"; ++ status = "okay"; ++}; ++ ++&usb_1 { ++ status = "okay"; ++}; ++ ++&usb_1_dwc3 { ++ dr_mode = "peripheral"; ++}; ++ ++&usb_1_hsphy { ++ vdda-pll-supply = <&vreg_l10c_0p88>; ++ vdda33-supply = <&vreg_l2b_3p072>; ++ vdda18-supply = <&vreg_l1c_1p8>; ++ ++ status = "okay"; ++}; ++ ++&usb_1_qmpphy { ++ vdda-phy-supply = <&vreg_l6b_1p2>; ++ vdda-pll-supply = <&vreg_l1b_0p912>; ++ ++ status = "okay"; ++}; ++ ++&wifi { ++ memory-region = <&wlan_fw_mem>; ++}; +-- +2.25.1 + |