diff options
Diffstat (limited to 'recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0001-FROMLIST-arm64-dts-qcom-qcm6490-idp-Update-protected.patch')
-rw-r--r-- | recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0001-FROMLIST-arm64-dts-qcom-qcm6490-idp-Update-protected.patch | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0001-FROMLIST-arm64-dts-qcom-qcm6490-idp-Update-protected.patch b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0001-FROMLIST-arm64-dts-qcom-qcm6490-idp-Update-protected.patch new file mode 100644 index 0000000..68a75c1 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0001-FROMLIST-arm64-dts-qcom-qcm6490-idp-Update-protected.patch @@ -0,0 +1,64 @@ +From 033eb03a2ab2057f3f79a20be485f5c58af20816 Mon Sep 17 00:00:00 2001 +From: Taniya Das <quic_tdas@quicinc.com> +Date: Mon, 18 Mar 2024 11:05:54 +0530 +Subject: [PATCH 1/3] FROMLIST: arm64: dts: qcom: qcm6490-idp: Update protected + clocks list + +Certain clocks are not accessible on QCM6490-IDP board, +thus mark them as protected. Update the lpassaudio node to +support the new compatible. + +Signed-off-by: Taniya Das <quic_tdas@quicinc.com> +Upstream-Status: Submitted [https://lore.kernel.org/r/20240318053555.20405-8-quic_tdas@quicinc.com] +--- + arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 28 +++++++++++++++++++++++- + 1 file changed, 27 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +index 2a5631b0fa40..3baea71e0248 100644 +--- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts ++++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: BSD-3-Clause + /* +- * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. ++ * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + /dts-v1/; +@@ -412,6 +412,32 @@ vreg_bob_3p296: bob { + }; + }; + ++&gcc { ++ protected-clocks = <GCC_AGGRE_NOC_PCIE_1_AXI_CLK> ,<GCC_PCIE_1_AUX_CLK>, ++ <GCC_PCIE_1_AUX_CLK_SRC>, <GCC_PCIE_1_CFG_AHB_CLK>, ++ <GCC_PCIE_1_MSTR_AXI_CLK>, <GCC_PCIE_1_PHY_RCHNG_CLK_SRC>, ++ <GCC_PCIE_1_PIPE_CLK>, <GCC_PCIE_1_PIPE_CLK_SRC>, ++ <GCC_PCIE_1_SLV_AXI_CLK>, <GCC_PCIE_1_SLV_Q2A_AXI_CLK>, ++ <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, <GCC_QSPI_CORE_CLK>, ++ <GCC_QSPI_CORE_CLK_SRC>,<GCC_USB30_SEC_MASTER_CLK>, ++ <GCC_USB30_SEC_MASTER_CLK_SRC>, <GCC_USB30_SEC_MOCK_UTMI_CLK>, ++ <GCC_USB30_SEC_MOCK_UTMI_CLK_SRC>, ++ <GCC_USB30_SEC_MOCK_UTMI_POSTDIV_CLK_SRC>, <GCC_USB30_SEC_SLEEP_CLK>, ++ <GCC_USB3_SEC_PHY_AUX_CLK>, <GCC_USB3_SEC_PHY_AUX_CLK_SRC>, ++ <GCC_USB3_SEC_PHY_COM_AUX_CLK>, <GCC_USB3_SEC_PHY_PIPE_CLK>, ++ <GCC_USB3_SEC_PHY_PIPE_CLK_SRC>, <GCC_CFG_NOC_LPASS_CLK>, ++ <GCC_MSS_GPLL0_MAIN_DIV_CLK_SRC>, <GCC_MSS_CFG_AHB_CLK>, ++ <GCC_MSS_OFFLINE_AXI_CLK>, <GCC_MSS_SNOC_AXI_CLK>, ++ <GCC_MSS_Q6_MEMNOC_AXI_CLK>, <GCC_MSS_Q6SS_BOOT_CLK_SRC>, ++ <GCC_SEC_CTRL_CLK_SRC>, <GCC_WPSS_AHB_CLK>, ++ <GCC_WPSS_AHB_BDG_MST_CLK>, <GCC_WPSS_RSCP_CLK>; ++}; ++ ++&lpass_audiocc { ++ compatible = "qcom,qcm6490-lpassaudiocc"; ++ /delete-property/ power-domains; ++}; ++ + &qupv3_id_0 { + status = "okay"; + }; +-- +2.25.1 + |