diff options
Diffstat (limited to 'recipes-kernel/linux/linux-yocto/generic-drivers/mdss-icc/0002_dt_bindings_display_msm_add_reg_bus_and_rotator_interconnects.patch')
-rw-r--r-- | recipes-kernel/linux/linux-yocto/generic-drivers/mdss-icc/0002_dt_bindings_display_msm_add_reg_bus_and_rotator_interconnects.patch | 287 |
1 files changed, 287 insertions, 0 deletions
diff --git a/recipes-kernel/linux/linux-yocto/generic-drivers/mdss-icc/0002_dt_bindings_display_msm_add_reg_bus_and_rotator_interconnects.patch b/recipes-kernel/linux/linux-yocto/generic-drivers/mdss-icc/0002_dt_bindings_display_msm_add_reg_bus_and_rotator_interconnects.patch new file mode 100644 index 0000000..f2822ae --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/generic-drivers/mdss-icc/0002_dt_bindings_display_msm_add_reg_bus_and_rotator_interconnects.patch @@ -0,0 +1,287 @@ +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Subject: dt-bindings: display: msm: Add reg bus and rotator interconnects +Date: Wed, 29 Nov 2023 15:43:59 +0100 + +Apart from the already handled data bus (MAS_MDP_Pn<->DDR), there are +other connection paths: +- a path that connects rotator block to the DDR. +- a path that needs to be handled to ensure MDSS register access + functions properly, namely the "reg bus", a.k.a the CPU-MDSS CFG + interconnect. + +Describe these paths to allow using them in device trees and in the +driver. + +Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Upstream-Status: Backport [https://gitlab.freedesktop.org/lumag/msm/-/commit/a1ed5860efd3] +--- + .../devicetree/bindings/display/msm/mdss-common.yaml | 18 ++++++++++++++---- + .../bindings/display/msm/qcom,qcm2290-mdss.yaml | 14 ++++++++++---- + .../bindings/display/msm/qcom,sc7180-mdss.yaml | 14 ++++++++++---- + .../bindings/display/msm/qcom,sc7280-mdss.yaml | 14 ++++++++++---- + .../bindings/display/msm/qcom,sm6115-mdss.yaml | 10 ++++++++++ + .../bindings/display/msm/qcom,sm6125-mdss.yaml | 8 ++++++-- + .../bindings/display/msm/qcom,sm6350-mdss.yaml | 8 ++++++-- + .../bindings/display/msm/qcom,sm6375-mdss.yaml | 8 ++++++-- + .../bindings/display/msm/qcom,sm8450-mdss.yaml | 13 ++++++++----- + 9 files changed, 80 insertions(+), 27 deletions(-) + +diff --git a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml +index f69196e4cc76..c6305a6e0334 100644 +--- a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml ++++ b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml +@@ -61,17 +61,27 @@ properties: + + ranges: true + ++ # This is not a perfect description, but it's impossible to discern and match ++ # the entries like we do with interconnect-names + interconnects: + minItems: 1 + items: + - description: Interconnect path from mdp0 (or a single mdp) port to the data bus + - description: Interconnect path from mdp1 port to the data bus ++ - description: Interconnect path from CPU to the reg bus + + interconnect-names: +- minItems: 1 +- items: +- - const: mdp0-mem +- - const: mdp1-mem ++ oneOf: ++ - minItems: 1 ++ items: ++ - const: mdp0-mem ++ - const: cpu-cfg ++ ++ - minItems: 2 ++ items: ++ - const: mdp0-mem ++ - const: mdp1-mem ++ - const: cpu-cfg + + resets: + items: +diff --git a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml +index d71a8e09a798..f0cdb5422688 100644 +--- a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml ++++ b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml +@@ -36,10 +36,14 @@ properties: + maxItems: 2 + + interconnects: +- maxItems: 1 ++ items: ++ - description: Interconnect path from mdp0 port to the data bus ++ - description: Interconnect path from CPU to the reg bus + + interconnect-names: +- maxItems: 1 ++ items: ++ - const: mdp0-mem ++ - const: cpu-cfg + + patternProperties: + "^display-controller@[0-9a-f]+$": +@@ -98,8 +102,10 @@ examples: + interrupt-controller; + #interrupt-cells = <1>; + +- interconnects = <&mmrt_virt MASTER_MDP0 &bimc SLAVE_EBI1>; +- interconnect-names = "mdp0-mem"; ++ interconnects = <&mmrt_virt MASTER_MDP0 &bimc SLAVE_EBI1>, ++ <&bimc MASTER_APPSS_PROC &config_noc SLAVE_DISPLAY_CFG>; ++ interconnect-names = "mdp0-mem", ++ "cpu-cfg"; + + iommus = <&apps_smmu 0x420 0x2>, + <&apps_smmu 0x421 0x0>; +diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml +index 3432a2407caa..7a0555b15ddf 100644 +--- a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml ++++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml +@@ -36,10 +36,14 @@ properties: + maxItems: 1 + + interconnects: +- maxItems: 1 ++ items: ++ - description: Interconnect path from mdp0 port to the data bus ++ - description: Interconnect path from CPU to the reg bus + + interconnect-names: +- maxItems: 1 ++ items: ++ - const: mdp0-mem ++ - const: cpu-cfg + + patternProperties: + "^display-controller@[0-9a-f]+$": +@@ -106,8 +110,10 @@ examples: + interrupt-controller; + #interrupt-cells = <1>; + +- interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>; +- interconnect-names = "mdp0-mem"; ++ interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>, ++ <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_DISPLAY_CFG>; ++ interconnect-names = "mdp0-mem", ++ "cpu-cfg"; + + iommus = <&apps_smmu 0x800 0x2>; + ranges; +diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml +index bbb727831fca..2947f27e0585 100644 +--- a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml ++++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml +@@ -36,10 +36,14 @@ properties: + maxItems: 1 + + interconnects: +- maxItems: 1 ++ items: ++ - description: Interconnect path from mdp0 port to the data bus ++ - description: Interconnect path from CPU to the reg bus + + interconnect-names: +- maxItems: 1 ++ items: ++ - const: mdp0-mem ++ - const: cpu-cfg + + patternProperties: + "^display-controller@[0-9a-f]+$": +@@ -118,8 +122,10 @@ examples: + interrupt-controller; + #interrupt-cells = <1>; + +- interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>; +- interconnect-names = "mdp0-mem"; ++ interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>, ++ <&gem_noc MASTER_APPSS_PROC &cnoc2 SLAVE_DISPLAY_CFG>; ++ interconnect-names = "mdp0-mem", ++ "cpu-cfg"; + + iommus = <&apps_smmu 0x900 0x402>; + ranges; +diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml +index dde5c2acead5..309de1953c88 100644 +--- a/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml ++++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml +@@ -29,6 +29,16 @@ properties: + iommus: + maxItems: 2 + ++ interconnects: ++ items: ++ - description: Interconnect path from mdp0 port to the data bus ++ - description: Interconnect path from CPU to the reg bus ++ ++ interconnect-names: ++ items: ++ - const: mdp0-mem ++ - const: cpu-cfg ++ + patternProperties: + "^display-controller@[0-9a-f]+$": + type: object +diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6125-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6125-mdss.yaml +index 671c2c2aa896..3deb9dc81c9c 100644 +--- a/Documentation/devicetree/bindings/display/msm/qcom,sm6125-mdss.yaml ++++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6125-mdss.yaml +@@ -35,10 +35,14 @@ properties: + maxItems: 1 + + interconnects: +- maxItems: 2 ++ items: ++ - description: Interconnect path from mdp0 port to the data bus ++ - description: Interconnect path from CPU to the reg bus + + interconnect-names: +- maxItems: 2 ++ items: ++ - const: mdp0-mem ++ - const: cpu-cfg + + patternProperties: + "^display-controller@[0-9a-f]+$": +diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml +index e1dcb453762e..c9ba1fae8042 100644 +--- a/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml ++++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml +@@ -35,10 +35,14 @@ properties: + maxItems: 1 + + interconnects: +- maxItems: 2 ++ items: ++ - description: Interconnect path from mdp0 port to the data bus ++ - description: Interconnect path from CPU to the reg bus + + interconnect-names: +- maxItems: 2 ++ items: ++ - const: mdp0-mem ++ - const: cpu-cfg + + patternProperties: + "^display-controller@[0-9a-f]+$": +diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6375-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6375-mdss.yaml +index b15c3950f09d..8e8a288d318c 100644 +--- a/Documentation/devicetree/bindings/display/msm/qcom,sm6375-mdss.yaml ++++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6375-mdss.yaml +@@ -35,10 +35,14 @@ properties: + maxItems: 1 + + interconnects: +- maxItems: 2 ++ items: ++ - description: Interconnect path from mdp0 port to the data bus ++ - description: Interconnect path from CPU to the reg bus + + interconnect-names: +- maxItems: 2 ++ items: ++ - const: mdp0-mem ++ - const: cpu-cfg + + patternProperties: + "^display-controller@[0-9a-f]+$": +diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml +index 001b26e65301..747a2e9665f4 100644 +--- a/Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml ++++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml +@@ -30,10 +30,10 @@ properties: + maxItems: 1 + + interconnects: +- maxItems: 2 ++ maxItems: 3 + + interconnect-names: +- maxItems: 2 ++ maxItems: 3 + + patternProperties: + "^display-controller@[0-9a-f]+$": +@@ -91,9 +91,12 @@ examples: + reg = <0x0ae00000 0x1000>; + reg-names = "mdss"; + +- interconnects = <&mmss_noc MASTER_MDP_DISP 0 &mc_virt SLAVE_EBI1_DISP 0>, +- <&mmss_noc MASTER_MDP_DISP 0 &mc_virt SLAVE_EBI1_DISP 0>; +- interconnect-names = "mdp0-mem", "mdp1-mem"; ++ interconnects = <&mmss_noc MASTER_MDP_DISP &mc_virt SLAVE_EBI1_DISP>, ++ <&mmss_noc MASTER_MDP_DISP &mc_virt SLAVE_EBI1_DISP>, ++ <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_DISPLAY_CFG>; ++ interconnect-names = "mdp0-mem", ++ "mdp1-mem", ++ "cpu-cfg"; + + resets = <&dispcc DISP_CC_MDSS_CORE_BCR>; + +-- +2.43.0 |