aboutsummaryrefslogtreecommitdiffstats
path: root/recipes-bsp/u-boot/u-boot-v2012.04.01/0025-i.MX6-Add-ANATOP-regulator-init.patch
diff options
context:
space:
mode:
Diffstat (limited to 'recipes-bsp/u-boot/u-boot-v2012.04.01/0025-i.MX6-Add-ANATOP-regulator-init.patch')
-rw-r--r--recipes-bsp/u-boot/u-boot-v2012.04.01/0025-i.MX6-Add-ANATOP-regulator-init.patch84
1 files changed, 84 insertions, 0 deletions
diff --git a/recipes-bsp/u-boot/u-boot-v2012.04.01/0025-i.MX6-Add-ANATOP-regulator-init.patch b/recipes-bsp/u-boot/u-boot-v2012.04.01/0025-i.MX6-Add-ANATOP-regulator-init.patch
new file mode 100644
index 0000000..65b13bc
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot-v2012.04.01/0025-i.MX6-Add-ANATOP-regulator-init.patch
@@ -0,0 +1,84 @@
+From 15616b5ca6f7dc2b728930cfc729d787869edc9e Mon Sep 17 00:00:00 2001
+From: Dirk Behme <dirk.behme@de.bosch.com>
+Date: Wed, 2 May 2012 02:12:17 +0000
+Subject: [PATCH 25/56] i.MX6: Add ANATOP regulator init
+
+Init the core regulator voltage to 1.2V. This is required for the correct
+functioning of the GPU and when the ARM LDO is set to 1.225V. This is a
+workaround to fix some memory clock jitter.
+
+Note: This should be but can't be done in the DCD. The bootloader
+ prevents access to the ANATOP registers.
+
+Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
+CC: Jason Chen <b02280@freescale.com>
+CC: Jason Liu <r64343@freescale.com>
+CC: Ranjani Vaidyanathan <ra5478@freescale.com>
+CC: Stefano Babic <sbabic@denx.de>
+CC: Fabio Estevam <festevam@gmail.com>
+---
+ arch/arm/cpu/armv7/mx6/soc.c | 30 +++++++++++++++++++++++++++++
+ arch/arm/include/asm/arch-mx6/sys_proto.h | 2 ++
+ 2 files changed, 32 insertions(+)
+
+diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
+index 543b2cc..90f2088 100644
+--- a/arch/arm/cpu/armv7/mx6/soc.c
++++ b/arch/arm/cpu/armv7/mx6/soc.c
+@@ -77,10 +77,40 @@ void init_aips(void)
+ writel(0x00000000, &aips2->opacr4);
+ }
+
++/*
++ * Set the VDDSOC
++ *
++ * Mask out the REG_CORE[22:18] bits (REG2_TRIG) and set
++ * them to the specified millivolt level.
++ * Possible values are from 0.725V to 1.450V in steps of
++ * 0.025V (25mV).
++ */
++void set_vddsoc(u32 mv)
++{
++ struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
++ u32 val, reg = readl(&anatop->reg_core);
++
++ if (mv < 725)
++ val = 0x00; /* Power gated off */
++ else if (mv > 1450)
++ val = 0x1F; /* Power FET switched full on. No regulation */
++ else
++ val = (mv - 700) / 25;
++
++ /*
++ * Mask out the REG_CORE[22:18] bits (REG2_TRIG)
++ * and set them to the calculated value (0.7V + val * 0.25V)
++ */
++ reg = (reg & ~(0x1F << 18)) | (val << 18);
++ writel(reg, &anatop->reg_core);
++}
++
+ int arch_cpu_init(void)
+ {
+ init_aips();
+
++ set_vddsoc(1200); /* Set VDDSOC to 1.2V */
++
+ return 0;
+ }
+ #endif
+diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h
+index 69687a8..711b30d 100644
+--- a/arch/arm/include/asm/arch-mx6/sys_proto.h
++++ b/arch/arm/include/asm/arch-mx6/sys_proto.h
+@@ -28,6 +28,8 @@
+
+ u32 get_cpu_rev(void);
+
++void set_vddsoc(u32 mv);
++
+ /*
+ * Initializes on-chip ethernet controllers.
+ * to override, implement board_eth_init()
+--
+1.7.10
+