aboutsummaryrefslogtreecommitdiffstats
path: root/meta-v1000/recipes-graphics/drm/libdrm/0001-amdgpu-Implement-SVM-v3.patch
blob: a8f5507116260588c8eb6b629f28ce3a1954c862 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
From 7c3e8435a253f91b08df855236c57f4694fad680 Mon Sep 17 00:00:00 2001
From: Alex Xie <AlexBin.Xie@amd.com>
Date: Tue, 20 Oct 2015 11:47:14 -0400
Subject: [PATCH 01/39] amdgpu: Implement SVM v3
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

SWDEV-75927: Coarse Grain SVM support for OpenCL 2.0 Add SVM API.
Implement SVM to reserve CPU and GPU VM address space for SVM.
Implement commit/uncommit function for SVM.

v3:
2f8e2d2e4a406bc290986eac600f4263259b5ac5
[Jammy Zhou]
reserve SVM range explicitly by clients
    The SVM range is only used by OCL 2.0 now, and it shouldn't be
    reserved when only other clients are used. With this change:

    amdgpu_svm_init() should be called to reserve the SVM range
    amdgpu_svm_deinit() should be called to unreserve this range

v2:
1. Merge patch1 and patch2.
2. Update description of the commit.
3. Address review comments on coding style.
4. Update comments in source code.
5. Fix one issue in function amdgpu_va_range_query. The start of the
   range should be dev->vamgr_svm->va_min.
6. Fix an error code.

Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Arsalan H. Awan <Arsalan_Awan@mentor.com>
---
 amdgpu/amdgpu.h          |  50 ++++++++++++++-
 amdgpu/amdgpu_internal.h |   3 +
 amdgpu/amdgpu_vamgr.c    | 179 ++++++++++++++++++++++++++++++++++++++++++++++++------
 3 files changed, 212 insertions(+), 20 deletions(-)

diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
index 36f9105..e4f73c9 100644
--- a/amdgpu/amdgpu.h
+++ b/amdgpu/amdgpu.h
@@ -91,7 +91,10 @@ enum amdgpu_bo_handle_type {
 enum amdgpu_gpu_va_range
 {
 	/** Allocate from "normal"/general range */
-	amdgpu_gpu_va_range_general = 0
+	amdgpu_gpu_va_range_general = 0,
+	/** Allocate from svm range */
+	amdgpu_gpu_va_range_svm = 1
+
 };
 
 enum amdgpu_sw_info {
@@ -1294,6 +1297,51 @@ int amdgpu_bo_va_op_raw(amdgpu_device_handle dev,
 			uint32_t ops);
 
 /**
+ * Reserve the virtual address range for SVM support
+ *
+ * \param amdgpu_device_handle
+ *
+ * \return   0 on success\n
+ *          <0 - Negative POSIX Error code
+ *
+*/
+int amdgpu_svm_init(amdgpu_device_handle dev);
+
+/**
+ * Free the virtual address range for SVM support
+ *
+ * \param amdgpu_device_handle
+ *
+ * \return
+ *
+*/
+void amdgpu_svm_deinit(amdgpu_device_handle dev);
+
+/**
+ *  Commit SVM allocation in a process
+ *
+ * \param va_range_handle - \c [in] Handle of SVM allocation
+ * \param cpu - \c [out] CPU pointer. The value is equal to GPU VM address.
+ *
+ * \return   0 on success\n
+ *          <0 - Negative POSIX Error code
+ *
+*/
+int amdgpu_svm_commit(amdgpu_va_handle va_range_handle,
+			void **cpu);
+
+/**
+ *  Uncommit SVM alloation in process's CPU_VM
+ *
+ * \param va_range_handle - \c [in] Handle of SVM allocation
+ *
+ * \return   0 on success\n
+ *          <0 - Negative POSIX Error code
+ *
+*/
+int amdgpu_svm_uncommit(amdgpu_va_handle va_range_handle);
+
+/**
  *  create semaphore
  *
  * \param   sem	   - \c [out] semaphore handle
diff --git a/amdgpu/amdgpu_internal.h b/amdgpu/amdgpu_internal.h
index 99b8ce0..13a7359 100644
--- a/amdgpu/amdgpu_internal.h
+++ b/amdgpu/amdgpu_internal.h
@@ -49,6 +49,7 @@ struct amdgpu_bo_va_hole {
 };
 
 struct amdgpu_bo_va_mgr {
+	uint64_t va_min;
 	uint64_t va_max;
 	struct list_head va_holes;
 	pthread_mutex_t bo_va_mutex;
@@ -87,6 +88,8 @@ struct amdgpu_device {
 	struct amdgpu_bo_va_mgr vamgr_high;
 	/** The VA manager for the 32bit high address space */
 	struct amdgpu_bo_va_mgr vamgr_high_32;
+	/** The VA manager for SVM address space */
+	struct amdgpu_bo_va_mgr *vamgr_svm;
 };
 
 struct amdgpu_bo {
diff --git a/amdgpu/amdgpu_vamgr.c b/amdgpu/amdgpu_vamgr.c
index 1de9f95..95483cb 100644
--- a/amdgpu/amdgpu_vamgr.c
+++ b/amdgpu/amdgpu_vamgr.c
@@ -33,12 +33,23 @@ int amdgpu_va_range_query(amdgpu_device_handle dev,
 			  enum amdgpu_gpu_va_range type,
 			  uint64_t *start, uint64_t *end)
 {
-	if (type != amdgpu_gpu_va_range_general)
-		return -EINVAL;
-
-	*start = dev->dev_info.virtual_address_offset;
-	*end = dev->dev_info.virtual_address_max;
-	return 0;
+	switch (type) {
+		case amdgpu_gpu_va_range_general:
+			*start = dev->dev_info.virtual_address_offset;
+			*end = dev->dev_info.virtual_address_max;
+			return 0;
+		case amdgpu_gpu_va_range_svm:
+			if (dev->vamgr_svm) {
+				*start = dev->vamgr_svm->va_min;
+				*end = dev->vamgr_svm->va_max;
+			} else {
+				*start = 0ULL;
+				*end = 0ULL;
+			}
+			return 0;
+		default:
+			return -EINVAL;
+	}
 }
 
 drm_private void amdgpu_vamgr_init(struct amdgpu_bo_va_mgr *mgr, uint64_t start,
@@ -47,6 +58,7 @@ drm_private void amdgpu_vamgr_init(struct amdgpu_bo_va_mgr *mgr, uint64_t start,
 	struct amdgpu_bo_va_hole *n;
 
 	mgr->va_max = max;
+	mgr->va_min = start;
 	mgr->va_alignment = alignment;
 
 	list_inithead(&mgr->va_holes);
@@ -197,20 +209,27 @@ int amdgpu_va_range_alloc(amdgpu_device_handle dev,
 {
 	struct amdgpu_bo_va_mgr *vamgr;
 
-	/* Clear the flag when the high VA manager is not initialized */
-	if (flags & AMDGPU_VA_RANGE_HIGH && !dev->vamgr_high_32.va_max)
-		flags &= ~AMDGPU_VA_RANGE_HIGH;
+	if (amdgpu_gpu_va_range_svm == va_range_type) {
+		vamgr = dev->vamgr_svm;
+		if (!vamgr)
+			return -EINVAL;
+	}
+	else {
+		/* Clear the flag when the high VA manager is not initialized */
+		if (flags & AMDGPU_VA_RANGE_HIGH && !dev->vamgr_high_32.va_max)
+			flags &= ~AMDGPU_VA_RANGE_HIGH;
 
-	if (flags & AMDGPU_VA_RANGE_HIGH) {
-		if (flags & AMDGPU_VA_RANGE_32_BIT)
-			vamgr = &dev->vamgr_high_32;
-		else
-			vamgr = &dev->vamgr_high;
-	} else {
-		if (flags & AMDGPU_VA_RANGE_32_BIT)
-			vamgr = &dev->vamgr_32;
-		else
-			vamgr = &dev->vamgr;
+		if (flags & AMDGPU_VA_RANGE_HIGH) {
+			if (flags & AMDGPU_VA_RANGE_32_BIT)
+				vamgr = &dev->vamgr_high_32;
+			else
+				vamgr = &dev->vamgr_high;
+		} else {
+			if (flags & AMDGPU_VA_RANGE_32_BIT)
+				vamgr = &dev->vamgr_32;
+			else
+				vamgr = &dev->vamgr;
+		}
 	}
 
 	va_base_alignment = MAX2(va_base_alignment, vamgr->va_alignment);
@@ -261,3 +280,125 @@ int amdgpu_va_range_free(amdgpu_va_handle va_range_handle)
 	free(va_range_handle);
 	return 0;
 }
+
+/**
+ *  Initialize SVM VAM manager.
+ *  When this function return error, future SVM allocation will fail.
+ *  Caller may ignore the error code returned by this function.
+ *
+ * \param   dev - \c [in] amdgpu_device pointer
+ *
+ * \return   0 on success\n
+ *          <0 - Negative POSIX Error code
+ *
+ */
+int amdgpu_svm_init(amdgpu_device_handle dev)
+{
+	uint64_t start;
+	uint64_t end;
+	/* size of SVM range */
+	uint64_t size;
+	uint64_t base_required;
+	/* Size of step when looking for SVM range. */
+	uint64_t step;
+	/*Will not search less than this address. */
+	uint64_t min_base_required;
+	void * cpu_address;
+	/* return value of this function. */
+	int ret;
+
+	ret = amdgpu_va_range_query(dev, amdgpu_gpu_va_range_general, &start, &end);
+	if (ret)
+		return ret;
+
+	/* size of the general VM */
+	size = end - start;
+	/* size of SVM range */
+	size = size / 4;
+	/* at least keep lower 4G for process usage in CPU address space*/
+	min_base_required = 4ULL * 1024ULL * 1024ULL * 1024ULL;
+	step = size / 8;
+
+	ret = -ENOSPC;
+	/* We try to find a hole both in CPU/GPU VM address space for SVM from top
+	 * to bottom.
+	 */
+	for (base_required = end - size; base_required >= min_base_required;
+		base_required -= step) {
+		start = amdgpu_vamgr_find_va(&dev->vamgr, size,
+					     dev->dev_info.virtual_address_alignment, base_required);
+		if (start != base_required)
+			continue;
+
+		/* Try to map the SVM range in CPU VM */
+		cpu_address = mmap((void *)start, size, PROT_NONE,
+					MAP_PRIVATE | MAP_NORESERVE | MAP_ANONYMOUS, -1, 0);
+		if (cpu_address == (void *)start) {
+			dev->vamgr_svm = calloc(1, sizeof(struct amdgpu_bo_va_mgr));
+			if (dev->vamgr_svm == NULL) {
+				amdgpu_vamgr_free_va(&dev->vamgr, start, size);
+				munmap(cpu_address, size);
+				ret = -ENOMEM;
+			} else {
+				amdgpu_vamgr_init(dev->vamgr_svm, start, start + size,
+						  dev->dev_info.virtual_address_alignment);
+				ret = 0;
+			}
+			break;
+		} else if (cpu_address == MAP_FAILED) {
+			/* Probably there is no space in this process's address space for
+			   such size of SVM range. This is very rare for 64 bit CPU.
+			*/
+			amdgpu_vamgr_free_va(&dev->vamgr, start, size);
+			ret = -ENOMEM;
+			break;
+		} else { /* cpu_address != (void *)start */
+			/* This CPU VM address (start) is not available*/
+			amdgpu_vamgr_free_va(&dev->vamgr, start, size);
+			munmap(cpu_address, size);
+			base_required -= step;
+		}
+	}
+
+	return ret;
+}
+
+void amdgpu_svm_deinit(amdgpu_device_handle dev)
+{
+	if (dev->vamgr_svm) {
+		amdgpu_vamgr_deinit(dev->vamgr_svm);
+		munmap((void *)dev->vamgr_svm->va_min,
+			dev->vamgr_svm->va_max - dev->vamgr_svm->va_min);
+		free(dev->vamgr_svm);
+	}
+}
+
+int amdgpu_svm_commit(amdgpu_va_handle va_range_handle,
+			void **cpu)
+{
+	if (!va_range_handle || !va_range_handle->address)
+		return -EINVAL;
+	if (va_range_handle->range != amdgpu_gpu_va_range_svm)
+		return -EINVAL;
+
+	if (mprotect((void *)va_range_handle->address,
+		va_range_handle->size, PROT_READ | PROT_WRITE) == 0) {
+		*cpu = (void *)va_range_handle->address;
+		return 0;
+	} else
+		return errno;
+}
+
+int amdgpu_svm_uncommit(amdgpu_va_handle va_range_handle)
+{
+	if (!va_range_handle || !va_range_handle->address)
+		return -EINVAL;
+	if (va_range_handle->range != amdgpu_gpu_va_range_svm)
+		return -EINVAL;
+
+	if (mprotect((void *)va_range_handle->address,
+		va_range_handle->size, PROT_NONE) == 0) {
+		return 0;
+	} else
+		return errno;
+}
-- 
2.7.4