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From 411aabe76ae9621510d038b84e755fe583b54a7b Mon Sep 17 00:00:00 2001
From: Leo Liu <leo.liu@amd.com>
Date: Wed, 15 Apr 2015 12:36:32 -0400
Subject: [PATCH 22/29] radeon/vce: implement VCE two pipe support
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
v2: rebase by Marek
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Arindam Nath <arindam.nath@amd.com>
---
src/gallium/drivers/radeon/radeon_vce.c | 5 +++++
src/gallium/drivers/radeon/radeon_vce.h | 4 ++++
src/gallium/drivers/radeon/radeon_vce_40_2_2.c | 17 +++++++++++++++++
3 files changed, 26 insertions(+)
diff --git a/src/gallium/drivers/radeon/radeon_vce.c b/src/gallium/drivers/radeon/radeon_vce.c
index d5ae26d..79b0909 100644
--- a/src/gallium/drivers/radeon/radeon_vce.c
+++ b/src/gallium/drivers/radeon/radeon_vce.c
@@ -358,6 +358,8 @@ struct pipe_video_codec *rvce_create_encoder(struct pipe_context *context,
enc->use_vm = true;
if ((rscreen->info.drm_major > 2) || (rscreen->info.drm_minor >= 42))
enc->use_vui = true;
+ if (rscreen->info.family >= CHIP_TONGA)
+ enc->use_2p = true;
enc->base = *templ;
enc->base.context = context;
@@ -397,6 +399,9 @@ struct pipe_video_codec *rvce_create_encoder(struct pipe_context *context,
cpb_size = cpb_size * align(tmp_surf->npix_y, 16);
cpb_size = cpb_size * 3 / 2;
cpb_size = cpb_size * enc->cpb_num;
+ if (enc->use_2p)
+ cpb_size += RVCE_MAX_AUX_BUFFER_NUM *
+ RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE;
tmp_buf->destroy(tmp_buf);
if (!rvid_create_buffer(enc->screen, &enc->cpb, cpb_size, PIPE_USAGE_DEFAULT)) {
RVID_ERR("Can't create CPB buffer.\n");
diff --git a/src/gallium/drivers/radeon/radeon_vce.h b/src/gallium/drivers/radeon/radeon_vce.h
index 7d37320..4d07204 100644
--- a/src/gallium/drivers/radeon/radeon_vce.h
+++ b/src/gallium/drivers/radeon/radeon_vce.h
@@ -43,6 +43,9 @@
#define RVCE_READWRITE(buf, domain, off) rvce_add_buffer(enc, (buf), RADEON_USAGE_READWRITE, (domain), (off))
#define RVCE_END() *begin = (&enc->cs->buf[enc->cs->cdw] - begin) * 4; }
+#define RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE (4096 * 16 * 2.5)
+#define RVCE_MAX_AUX_BUFFER_NUM 4
+
struct r600_common_screen;
/* driver dependent callback */
@@ -102,6 +105,7 @@ struct rvce_encoder {
bool use_vm;
unsigned fw_ver;
bool use_vui;
+ bool use_2p;
};
struct pipe_video_codec *rvce_create_encoder(struct pipe_context *context,
diff --git a/src/gallium/drivers/radeon/radeon_vce_40_2_2.c b/src/gallium/drivers/radeon/radeon_vce_40_2_2.c
index f1f4cce..970d572 100644
--- a/src/gallium/drivers/radeon/radeon_vce_40_2_2.c
+++ b/src/gallium/drivers/radeon/radeon_vce_40_2_2.c
@@ -319,6 +319,23 @@ static void encode(struct rvce_encoder *enc)
RVCE_CS(enc->bs_size); // videoBitstreamRingSize
RVCE_END();
+ if (enc->use_2p) {
+ unsigned aux_offset = enc->cpb.res->buf->size -
+ RVCE_MAX_AUX_BUFFER_NUM * RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE;
+ RVCE_BEGIN(0x05000002); // auxiliary buffer
+ for (i = 0; i < 4; ++i) {
+ RVCE_CS(aux_offset);
+ aux_offset += RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE;
+ }
+ for (i = 0; i < 4; ++i)
+ RVCE_CS(0x00000000);
+ for (i = 0; i < 4; ++i)
+ RVCE_CS(RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE);
+ for (i = 0; i < 4; ++i)
+ RVCE_CS(0x00000000);
+ RVCE_END();
+ }
+
RVCE_BEGIN(0x03000001); // encode
if ((enc->fw_ver > FW_40_2_2) && (!enc->pic.frame_num))
RVCE_CS(0x00000011); // insertHeaders
--
1.9.1
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