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From 408cadc25201633fe7022848440846c9ee22f6a2 Mon Sep 17 00:00:00 2001
From: Devang Vyas <devangnayanbhai.vyas@amd.com>
Date: Mon, 20 Jun 2022 15:54:48 +0530
Subject: [PATCH 55/57] amd-xgbe: Update SSINC value based on 125MHz PTP clock
 as per PPR

Added xgbe version v2 flag to differentiate PTP clock frequency
based on SSINC field. As current implementation is w.r.t 50MHz,
added a flag for the backward compatibility with older chipsets

Signed-off-by: Devang Vyas <devangnayanbhai.vyas@amd.com>
Change-Id: I483af20d23766199f0315dd8d5b23cd4248453d2
---
 drivers/net/ethernet/amd/xgbe/xgbe-dev.c | 13 ++++++++++---
 drivers/net/ethernet/amd/xgbe/xgbe-pci.c |  2 ++
 drivers/net/ethernet/amd/xgbe/xgbe-ptp.c | 10 +++++++---
 drivers/net/ethernet/amd/xgbe/xgbe.h     |  7 +++++++
 4 files changed, 26 insertions(+), 6 deletions(-)

diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c
index 0252d80f6834..8e37343ef098 100644
--- a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c
+++ b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c
@@ -1627,9 +1627,16 @@ static int xgbe_config_tstamp(struct xgbe_prv_data *pdata,
 	if (!XGMAC_GET_BITS(mac_tscr, MAC_TSCR, TSENA))
 		return 0;
 
-	/* Initialize time registers */
-	XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SSINC, XGBE_TSTAMP_SSINC);
-	XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SNSINC, XGBE_TSTAMP_SNSINC);
+	if (pdata->vdata->tstamp_ptp_clock_freq) {
+		/* Initialize time registers based on 125MHz PTP Clock Frequency */
+		XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SSINC, XGBE_V2_TSTAMP_SSINC);
+		XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SNSINC, XGBE_V2_TSTAMP_SNSINC);
+	} else {
+                /* Initialize time registers based on 50MHz PTP Clock Frequency*/
+                XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SSINC, XGBE_TSTAMP_SSINC);
+                XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SNSINC, XGBE_TSTAMP_SNSINC);
+	}
+
 	xgbe_update_tstamp_addend(pdata, pdata->tstamp_addend);
 	xgbe_set_tstamp_time(pdata, 0, 0);
 
diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-pci.c b/drivers/net/ethernet/amd/xgbe/xgbe-pci.c
index 0f2ac86ff904..35bc4ce96072 100644
--- a/drivers/net/ethernet/amd/xgbe/xgbe-pci.c
+++ b/drivers/net/ethernet/amd/xgbe/xgbe-pci.c
@@ -482,6 +482,7 @@ static struct xgbe_version_data xgbe_v2a = {
 	.tx_max_fifo_size		= 229376,
 	.rx_max_fifo_size		= 229376,
 	.tx_tstamp_workaround		= 1,
+	.tstamp_ptp_clock_freq		= 1,
 	.ecc_support			= 1,
 	.i2c_support			= 1,
 	.irq_reissue_support		= 1,
@@ -498,6 +499,7 @@ static struct xgbe_version_data xgbe_v2b = {
 	.tx_max_fifo_size		= 65536,
 	.rx_max_fifo_size		= 65536,
 	.tx_tstamp_workaround		= 1,
+	.tstamp_ptp_clock_freq		= 1,
 	.ecc_support			= 1,
 	.i2c_support			= 1,
 	.irq_reissue_support		= 1,
diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c b/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c
index d06d260cf1e2..c60db672192d 100644
--- a/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c
+++ b/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c
@@ -250,10 +250,14 @@ void xgbe_ptp_register(struct xgbe_prv_data *pdata)
 	pdata->ptp_clock = clock;
 
 	/* Calculate the addend:
-	 *   addend = 2^32 / (PTP ref clock / 50Mhz)
-	 *          = (2^32 * 50Mhz) / PTP ref clock
+	 *   addend = 2^32 / (PTP ref clock / (PTP clock based on SSINC))
+	 *          = (2^32 * (PTP clock based on SSINC)) / PTP ref clock
 	 */
-	dividend = 50000000;
+	if (pdata->vdata->tstamp_ptp_clock_freq)
+		dividend = 125000000;           // PTP clock frequency is 125MHz
+	else
+		dividend = 50000000;            // PTP clock frequency is 50MHz
+
 	dividend <<= 32;
 	pdata->tstamp_addend = div_u64(dividend, pdata->ptpclk_rate);
 
diff --git a/drivers/net/ethernet/amd/xgbe/xgbe.h b/drivers/net/ethernet/amd/xgbe/xgbe.h
index 183289e094fb..895712fcbbd3 100644
--- a/drivers/net/ethernet/amd/xgbe/xgbe.h
+++ b/drivers/net/ethernet/amd/xgbe/xgbe.h
@@ -235,6 +235,12 @@
 #define XGBE_TSTAMP_SSINC	20
 #define XGBE_TSTAMP_SNSINC	0
 
+/* Timestamp support - values based on 125MHz PTP clock
+ *   125MHz => 8 nsec
+ */
+#define XGBE_V2_TSTAMP_SSINC       8
+#define XGBE_V2_TSTAMP_SNSINC      0
+
 /* Driver PMT macros */
 #define XGMAC_DRIVER_CONTEXT	1
 #define XGMAC_IOCTL_CONTEXT	2
@@ -1009,6 +1015,7 @@ struct xgbe_version_data {
 	unsigned int tx_max_fifo_size;
 	unsigned int rx_max_fifo_size;
 	unsigned int tx_tstamp_workaround;
+	unsigned int tstamp_ptp_clock_freq;
 	unsigned int ecc_support;
 	unsigned int i2c_support;
 	unsigned int irq_reissue_support;
-- 
2.37.3