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From 05b20dda7c5f05f489b47af497325f0ade1f8216 Mon Sep 17 00:00:00 2001
From: rgaridap <Ramesh.Garidapuri@amd.com>
Date: Thu, 2 Jun 2022 21:45:05 +0530
Subject: [PATCH 52/57] amd-xgbe: rx-adap finetunings
- As per Vignesh's suggestion avoid re-enabling pll ctrl for mailbox
cmds 4,1 and 3,1
- Also, correct the logic to skip pll re-enabling for cmd 0 and 5
- fine tune adaptation and link status logic
Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com>
Change-Id: I9e03fff90407a475610648d6386eaa9e9d2855b1
---
drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c | 41 +++++++++++++--------
1 file changed, 25 insertions(+), 16 deletions(-)
diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c
index de53e636b049..1035696b295f 100644
--- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c
+++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c
@@ -387,6 +387,8 @@ struct xgbe_phy_data {
/* I2C, MDIO and GPIO lines are muxed, so only one device at a time */
static DEFINE_MUTEX(xgbe_phy_comm_lock);
+static void xgbe_phy_perform_ratechange(struct xgbe_prv_data *pdata,
+ unsigned int cmd, unsigned int sub_cmd);
static enum xgbe_an_mode xgbe_phy_an_mode(struct xgbe_prv_data *pdata);
static void xgbe_phy_rrc(struct xgbe_prv_data *pdata);
static void xgbe_phy_set_mode(struct xgbe_prv_data *pdata, enum xgbe_mode mode);
@@ -2132,6 +2134,11 @@ static void xgbe_phy_pll_ctrl(struct xgbe_prv_data *pdata, bool enable)
}
}
+static inline void _xgbe_mode_set(struct xgbe_prv_data *pdata, enum xgbe_mode mode)
+{
+ xgbe_phy_perform_ratechange(pdata, mode == XGBE_MODE_KR ? 4 : 3, 1);
+}
+
static void xgbe_phy_rx_adaptation(struct xgbe_prv_data *pdata)
{
/*
@@ -2155,7 +2162,7 @@ static void xgbe_phy_rx_adaptation(struct xgbe_prv_data *pdata)
int reg;
struct xgbe_phy_data *phy_data;
-#define MAX_RX_ADAPT_RETRIES 5
+#define MAX_RX_ADAPT_RETRIES 1
rx_adapt_reinit:
reg = XMDIO_READ_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_RX_LSTS,
@@ -2209,7 +2216,7 @@ static void xgbe_phy_rx_adaptation(struct xgbe_prv_data *pdata)
pdata->rx_adapt_retries = 0;
return;
}
- xgbe_phy_set_mode(pdata, phy_data->cur_mode);
+ _xgbe_mode_set(pdata, phy_data->cur_mode);
}
} else {
netif_dbg(pdata, link, pdata->netdev, "%s either RX_VALID or LF_SIGDET is not set, issuing rrc\n",__func__);
@@ -2269,11 +2276,13 @@ static void xgbe_phy_perform_ratechange(struct xgbe_prv_data *pdata,
netif_dbg(pdata, link, pdata->netdev, "%s Enabling RX adaptation\n", __func__);
pdata->mode_set = 1;
xgbe_phy_rx_adaptation(pdata);
+ /* return from here to avoid enabling PLL ctrl during adaptation phase */
+ return;
}
reenable_pll:
/* Enable PLL re-initialization, not needed for phy_poweroff (0,0) */
- if (cmd != 0)
+ if ((cmd != 0) && (cmd !=5))
xgbe_phy_pll_ctrl(pdata, true);
}
@@ -2929,21 +2938,21 @@ static int xgbe_phy_link_status(struct xgbe_prv_data *pdata, int *an_restart)
reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1);
if (pdata->en_rx_adap) {
- if (reg & MDIO_STAT1_LSTATUS) {
- if (pdata->rx_adapt_done)
- return 1;
- else
- xgbe_phy_rx_adaptation(pdata);
- } else {
- if (pdata->mode_set)
- xgbe_phy_rx_adaptation(pdata);
- else {
- pdata->mode_set = 0;
- pdata->rx_adapt_done = 0;
- xgbe_phy_set_mode(pdata, phy_data->cur_mode);
- }
+ /* if there's a link and adaptation is done, declare link up */
+ if ((reg & MDIO_STAT1_LSTATUS) && (pdata->rx_adapt_done))
+ return 1;
+ /* If either of link not set or adaptation not done, retrigger the
+ * mode set. However, if the mode is already set, just do adaptation */
+ if (pdata->mode_set)
+ xgbe_phy_rx_adaptation(pdata);
+ else {
+ pdata->rx_adapt_done = 0;
+ xgbe_phy_set_mode(pdata, phy_data->cur_mode);
}
+ /* check again for the link and adaptation status */
+ if ((reg & MDIO_STAT1_LSTATUS) && (pdata->rx_adapt_done))
+ return 1;
} else if (reg & MDIO_STAT1_LSTATUS)
return 1;
--
2.37.3
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