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From 74bd7b456233d7bed7dcad79b1bca7ef9e44a7d7 Mon Sep 17 00:00:00 2001
From: YueHaibing <yuehaibing@huawei.com>
Date: Mon, 26 Aug 2019 16:57:07 +0800
Subject: [PATCH 3611/4256] drm/amdgpu/display: fix build error without
CONFIG_DRM_AMD_DC_DSC_SUPPORT
If CONFIG_DRM_AMD_DC_DSC_SUPPORT is not set, build fails:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_hwseq.c: In function dcn20_hw_sequencer_construct:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_hwseq.c:2099:28:
error: dcn20_dsc_pg_control undeclared (first use in this function); did you mean dcn20_dpp_pg_control?
dc->hwss.dsc_pg_control = dcn20_dsc_pg_control;
^~~~~~~~~~~~~~~~~~~~
dcn20_dpp_pg_control
Use CONFIG_DRM_AMD_DC_DSC_SUPPORT to guard this.
Change-Id: I0776fc06774de41cac1c3d600c84e9f133f7fed3
Reported-by: Hulk Robot <hulkci@huawei.com>
Fixes: 8a31820b1218 ("drm/amd/display: Make init_hw and init_pipes generic for seamless boot")
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index 7f9e48566527..1212da12c414 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -2126,6 +2126,8 @@ void dcn20_hw_sequencer_construct(struct dc *dc)
dc->hwss.hubp_pg_control = dcn20_hubp_pg_control;
#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
dc->hwss.dsc_pg_control = dcn20_dsc_pg_control;
+#else
+ dc->hwss.dsc_pg_control = NULL;
#endif
dc->hwss.disable_vga = dcn20_disable_vga;
--
2.17.1
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