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From 44d626dddb7c5632baf3e55ed9bc173a29a5aa7b Mon Sep 17 00:00:00 2001
From: Julian Parkin <julian.parkin@amd.com>
Date: Fri, 12 Jul 2019 17:30:06 -0400
Subject: [PATCH 3402/4256] drm/amd/display: Improve sharing of HUBBUB register
lists
Add DCN20 common register list that contains registers shared
between DCN20 generations.
Signed-off-by: Julian Parkin <julian.parkin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h
index a7b6ca26a9ad..caf7273ca240 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h
@@ -32,10 +32,8 @@
#define TO_DCN20_HUBBUB(hubbub)\
container_of(hubbub, struct dcn20_hubbub, base)
-#define HUBBUB_REG_LIST_DCN20(id)\
+#define HUBBUB_REG_LIST_DCN20_COMMON()\
HUBBUB_REG_LIST_DCN_COMMON(), \
- HUBBUB_VM_REG_LIST(), \
- HUBBUB_SR_WATERMARK_REG_LIST(), \
SR(DCHUBBUB_CRC_CTRL), \
SR(DCN_VM_FB_LOCATION_BASE),\
SR(DCN_VM_FB_LOCATION_TOP),\
@@ -44,6 +42,11 @@
SR(DCN_VM_AGP_TOP),\
SR(DCN_VM_AGP_BASE)
+#define HUBBUB_REG_LIST_DCN20(id)\
+ HUBBUB_REG_LIST_DCN20_COMMON(), \
+ HUBBUB_SR_WATERMARK_REG_LIST(), \
+ HUBBUB_VM_REG_LIST()
+
#define HUBBUB_MASK_SH_LIST_DCN20(mask_sh)\
HUBBUB_MASK_SH_LIST_DCN_COMMON(mask_sh), \
HUBBUB_MASK_SH_LIST_STUTTER(mask_sh), \
--
2.17.1
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