blob: ee23add0fb7cb509a12670a83571334ef318a588 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
|
From 8c828c0f40f806a1cd9a0a98c450349085c49c50 Mon Sep 17 00:00:00 2001
From: Hawking Zhang <Hawking.Zhang@amd.com>
Date: Wed, 17 Jul 2019 21:47:44 +0800
Subject: [PATCH 3201/4256] drm/amdgpu: init umc v6_1 functions for vega20
init umc callback function for vega20 in sw early init phase
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Dennis Li <dennis.li@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index f99e02649f81..ac5a6bf477cb 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -45,6 +45,7 @@
#include "mmhub_v1_0.h"
#include "gfxhub_v1_1.h"
#include "mmhub_v9_4.h"
+#include "umc_v6_1.h"
#include "ivsrcid/vmc/irqsrcs_vmc_1_0.h"
@@ -620,12 +621,24 @@ static void gmc_v9_0_set_gmc_funcs(struct amdgpu_device *adev)
adev->gmc.gmc_funcs = &gmc_v9_0_gmc_funcs;
}
+static void gmc_v9_0_set_umc_funcs(struct amdgpu_device *adev)
+{
+ switch (adev->asic_type) {
+ case CHIP_VEGA20:
+ adev->umc_funcs = &umc_v6_1_funcs;
+ break;
+ default:
+ break;
+ }
+}
+
static int gmc_v9_0_early_init(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
gmc_v9_0_set_gmc_funcs(adev);
gmc_v9_0_set_irq_funcs(adev);
+ gmc_v9_0_set_umc_funcs(adev);
adev->gmc.shared_aperture_start = 0x2000000000000000ULL;
adev->gmc.shared_aperture_end =
@@ -714,6 +727,7 @@ static int gmc_v9_0_ecc_late_init(void *handle)
amdgpu_ras_feature_enable_on_boot(adev, &ras_block, 0);
return 0;
}
+
/* handle resume path. */
if (*ras_if) {
/* resend ras TA enable cmd during resume.
--
2.17.1
|
