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From 4030f2ec229dc865a012c894f7695094018510de Mon Sep 17 00:00:00 2001
From: David Galiffi <david.galiffi@amd.com>
Date: Fri, 7 Jun 2019 21:32:34 -0400
Subject: [PATCH 3027/4256] drm/amd/display: Incorrect Read Interval Time For
CR Sequence
[WHY]
TRAINING_AUX_RD_INTERVAL (DPCD 000Eh) modifies the read interval
for the EQ training sequence. CR read interval should remain 100 us.
Currently, the CR interval is also being modified.
[HOW]
lt_settings->cr_pattern_time should always be 100 us.
Signed-off-by: David Galiffi <david.galiffi@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
---
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index fca1bfc901b6..4442e7b1e5b5 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -1035,7 +1035,7 @@ static void initialize_training_settings(
if (link->preferred_training_settings.cr_pattern_time != NULL)
lt_settings->cr_pattern_time = *link->preferred_training_settings.cr_pattern_time;
else
- lt_settings->cr_pattern_time = get_training_aux_rd_interval(link, 100);
+ lt_settings->cr_pattern_time = 100;
if (link->preferred_training_settings.eq_pattern_time != NULL)
lt_settings->eq_pattern_time = *link->preferred_training_settings.eq_pattern_time;
--
2.17.1
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