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From 2b5c414b21dec4e30cdce34d5cf4db6125dce77b Mon Sep 17 00:00:00 2001
From: Evan Quan <evan.quan@amd.com>
Date: Tue, 17 Jul 2018 10:22:37 +0800
Subject: [PATCH 5142/5725] drm/amd/powerplay: enable fclk ss by default
Set fclk ss as enabled on default.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Rex Zhu <rezhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c
index 32d24a4..5f1f7a3 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c
@@ -810,7 +810,7 @@ static int append_vbios_pptable(struct pp_hwmgr *hwmgr, PPTable_t *ppsmc_pptable
ppsmc_pptable->UclkSpreadPercent = smc_dpm_table->uclkspreadpercent;
ppsmc_pptable->UclkSpreadFreq = smc_dpm_table->uclkspreadfreq;
- ppsmc_pptable->FclkSpreadEnabled = 0;
+ ppsmc_pptable->FclkSpreadEnabled = smc_dpm_table->fclkspreadenabled;
ppsmc_pptable->FclkSpreadPercent = smc_dpm_table->fclkspreadpercent;
ppsmc_pptable->FclkSpreadFreq = smc_dpm_table->fclkspreadfreq;
--
2.7.4
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