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From f276f7a1a010fea7b3bd3455fe983b688086b1ba Mon Sep 17 00:00:00 2001
From: Sudheesh Mavila <sudheesh.mavila@amd.com>
Date: Mon, 30 Apr 2018 09:14:36 +0530
Subject: [PATCH 1363/4131] x86/cpufeatures: Device IDs of AMD V1000 root
complex and host bridges are added for EDAC driver
Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com>
---
arch/x86/kernel/amd_nb.c | 13 ++++++++++---
drivers/edac/amd64_edac.c | 30 +++++++++++++++++++++++-------
drivers/edac/amd64_edac.h | 10 ++++++----
3 files changed, 39 insertions(+), 14 deletions(-)
mode change 100644 => 100755 arch/x86/kernel/amd_nb.c
mode change 100644 => 100755 drivers/edac/amd64_edac.h
diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
old mode 100644
new mode 100755
index c88e0b1..151255a
--- a/arch/x86/kernel/amd_nb.c
+++ b/arch/x86/kernel/amd_nb.c
@@ -17,6 +17,10 @@
#define PCI_DEVICE_ID_AMD_17H_DF_F3 0x1463
#define PCI_DEVICE_ID_AMD_17H_DF_F4 0x1464
+#define PCI_DEVICE_ID_AMD_17H_V1_ROOT 0x15d0
+#define PCI_DEVICE_ID_AMD_17H_DF_V1_F3 0x15eb
+#define PCI_DEVICE_ID_AMD_17H_DF_V1_F4 0x15ec
+
/* Protect the PCI config register pairs used for SMN and DF indirect access. */
static DEFINE_MUTEX(smn_mutex);
@@ -24,7 +28,8 @@ static u32 *flush_words;
static const struct pci_device_id amd_root_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_ROOT) },
- {}
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_V1_ROOT) },
+ {}
};
#define PCI_DEVICE_ID_AMD_CNB17H_F4 0x1704
@@ -40,7 +45,8 @@ const struct pci_device_id amd_nb_misc_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F3) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F3) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) },
- {}
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_V1_F3) },
+ {}
};
EXPORT_SYMBOL_GPL(amd_nb_misc_ids);
@@ -52,7 +58,8 @@ static const struct pci_device_id amd_nb_link_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F4) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F4) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F4) },
- {}
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_V1_F4) },
+ {}
};
const struct amd_nb_bus_dev_range amd_nb_bus_dev_ranges[] __initconst = {
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 59ce32e..c2aa0dd 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -2191,15 +2191,25 @@ static struct amd64_family_type family_types[] = {
.dbam_to_cs = f16_dbam_to_chip_select,
}
},
- [F17_CPUS] = {
- .ctl_name = "F17h",
- .f0_id = PCI_DEVICE_ID_AMD_17H_DF_F0,
- .f6_id = PCI_DEVICE_ID_AMD_17H_DF_F6,
+ [F17_V1_CPUS] = {
+ .ctl_name = "F17h_V1",
+ .f0_id = PCI_DEVICE_ID_AMD_17H_DF_V1_F0,
+ .f6_id = PCI_DEVICE_ID_AMD_17H_DF_V1_F6,
.ops = {
.early_channel_count = f17_early_channel_count,
.dbam_to_cs = f17_base_addr_to_cs_size,
}
- },
+ },
+ [F17_SO_CPUS] = {
+ .ctl_name = "F17h_SO",
+ .f0_id = PCI_DEVICE_ID_AMD_17H_DF_SO_F0,
+ .f6_id = PCI_DEVICE_ID_AMD_17H_DF_SO_F6,
+ .ops = {
+ .early_channel_count = f17_early_channel_count,
+ .dbam_to_cs = f17_base_addr_to_cs_size,
+ }
+
+ },
};
/*
@@ -3188,9 +3198,15 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt)
break;
case 0x17:
- fam_type = &family_types[F17_CPUS];
- pvt->ops = &family_types[F17_CPUS].ops;
+ if (pvt->model == 0x11) {
+ fam_type = &family_types[F17_V1_CPUS];
+ pvt->ops = &family_types[F17_V1_CPUS].ops;
break;
+ }
+
+ fam_type = &family_types[F17_SO_CPUS];
+ pvt->ops = &family_types[F17_SO_CPUS].ops;
+ break;
default:
amd64_err("Unsupported family!\n");
diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h
old mode 100644
new mode 100755
index 1d4b74e..b84d9b0
--- a/drivers/edac/amd64_edac.h
+++ b/drivers/edac/amd64_edac.h
@@ -113,9 +113,10 @@
#define PCI_DEVICE_ID_AMD_16H_NB_F2 0x1532
#define PCI_DEVICE_ID_AMD_16H_M30H_NB_F1 0x1581
#define PCI_DEVICE_ID_AMD_16H_M30H_NB_F2 0x1582
-#define PCI_DEVICE_ID_AMD_17H_DF_F0 0x1460
-#define PCI_DEVICE_ID_AMD_17H_DF_F6 0x1466
-
+#define PCI_DEVICE_ID_AMD_17H_DF_SO_F0 0x1460
+#define PCI_DEVICE_ID_AMD_17H_DF_SO_F6 0x1466
+#define PCI_DEVICE_ID_AMD_17H_DF_V1_F0 0x15e8
+#define PCI_DEVICE_ID_AMD_17H_DF_V1_F6 0x15ee
/*
* Function 1 - Address Map
*/
@@ -280,7 +281,8 @@ enum amd_families {
F15_M60H_CPUS,
F16_CPUS,
F16_M30H_CPUS,
- F17_CPUS,
+ F17_V1_CPUS,
+ F17_SO_CPUS,
NUM_FAMILIES,
};
--
2.7.4
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