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From c0dc3b7bd490ed4940fcf9769fa0e18c569d1668 Mon Sep 17 00:00:00 2001
From: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Date: Tue, 24 Jan 2017 15:45:33 -0500
Subject: [PATCH 0189/4131] drm/amd/display: Make new pixel clock more obvious
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 499ef56..e05e419 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -1066,6 +1066,7 @@ bool dc_pre_update_surfaces_to_stream(
int i, j;
struct core_dc *core_dc = DC_TO_CORE(dc);
uint32_t prev_disp_clk = core_dc->current_context->bw_results.dispclk_khz;
+ int new_disp_clk;
struct dc_stream_status *stream_status = NULL;
struct validate_context *context;
struct validate_context *temp_context;
@@ -1150,6 +1151,7 @@ bool dc_pre_update_surfaces_to_stream(
ret = false;
goto unexpected_fail;
}
+ new_disp_clk = context->bw_results.dispclk_khz;
if (core_dc->res_pool->funcs->apply_clk_constraints) {
temp_context = core_dc->res_pool->funcs->apply_clk_constraints(
@@ -1166,7 +1168,7 @@ bool dc_pre_update_surfaces_to_stream(
context = temp_context;
}
- if (prev_disp_clk < context->bw_results.dispclk_khz) {
+ if (prev_disp_clk < new_disp_clk) {
pplib_apply_display_requirements(core_dc, context,
&context->pp_display_cfg);
context->res_ctx.pool->display_clock->funcs->set_clock(
--
2.7.4
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