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From 9e991753e9efabe3dcd08968d4041ce23b8b7e0a Mon Sep 17 00:00:00 2001
From: Tony Cheng <tony.cheng@amd.com>
Date: Thu, 22 Dec 2016 14:54:50 -0500
Subject: [PATCH 0102/4131] drm/amd/display: Allow multiple instance of DTO
regs
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Jordan Lazare <Jordan.Lazare@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
index 8ee0071..28984c79 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
@@ -76,9 +76,13 @@ struct dce110_clk_src_regs {
uint32_t RESYNC_CNTL;
uint32_t PIXCLK_RESYNC_CNTL;
uint32_t PLL_CNTL;
- uint32_t PHASE;
- uint32_t MODULO;
- uint32_t PIXEL_RATE_CNTL;
+
+ /* below are for DTO.
+ * todo: should probably use different struct to not waste space
+ */
+ uint32_t PHASE[4];
+ uint32_t MODULO[4];
+ uint32_t PIXEL_RATE_CNTL[4];
};
struct dce110_clk_src {
--
2.7.4
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