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From 28897678b3f95373dd892650dfacbf8d79d247d9 Mon Sep 17 00:00:00 2001
From: Hersen Wu <hersenxs.wu@amd.com>
Date: Thu, 26 Nov 2015 16:00:08 -0500
Subject: [PATCH 0528/1110] drm/amd/dal: MST two monitors light up clean up 2
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
---
drivers/gpu/drm/amd/dal/dc/core/dc_link.c | 38 +++-------------------
.../drm/amd/dal/dc/dce110/dce110_link_encoder.c | 6 ++--
2 files changed, 9 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc_link.c b/drivers/gpu/drm/amd/dal/dc/core/dc_link.c
index 54766ae..5a59f38 100644
--- a/drivers/gpu/drm/amd/dal/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/dal/dc/core/dc_link.c
@@ -918,11 +918,11 @@ static enum dc_status enable_link_dp(struct core_stream *stream)
static enum dc_status enable_link_dp_mst(struct core_stream *stream)
{
- enum dc_status status;
- bool skip_video_pattern;
struct core_link *link = stream->sink->link;
- struct link_settings link_settings = {0};
- enum dp_panel_mode panel_mode;
+
+ /* TODO MST link shared by stream. counter? */
+ if (link->stream_count < 4)
+ link->stream_count++;
/* sink signal type after MST branch is MST. Multiple MST sinks
* share one link. Link DP PHY is enable or training only once.
@@ -930,35 +930,7 @@ static enum dc_status enable_link_dp_mst(struct core_stream *stream)
if (link->cur_link_settings.lane_count != LANE_COUNT_UNKNOWN)
return DC_OK;
- /* get link settings for video mode timing */
- decide_link_settings(stream, &link_settings);
- status = dp_enable_link_phy(
- stream->sink->link,
- stream->signal,
- stream->stream_enc->id,
- &link_settings);
-
- panel_mode = dp_get_panel_mode(link);
- dpcd_configure_panel_mode(link, panel_mode);
-
- skip_video_pattern = true;
-
- if (link_settings.link_rate == LINK_RATE_LOW)
- skip_video_pattern = false;
-
- if (perform_link_training(link, &link_settings, skip_video_pattern)) {
- link->cur_link_settings = link_settings;
-
- /* TODO MST link shared by stream. counter? */
- if (link->stream_count < 4)
- link->stream_count++;
-
- status = DC_OK;
- }
- else
- status = DC_ERROR_UNEXPECTED;
-
- return status;
+ return enable_link_dp(stream);
}
static enum dc_status enable_link_hdmi(struct core_stream *stream)
diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.c
index c2c201f..bd3962e 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.c
+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.c
@@ -1591,8 +1591,8 @@ void dce110_link_encoder_update_mst_stream_allocation_table(
const struct dp_mst_stream_allocation_table *table)
{
int32_t addr_offset = enc->be_engine_offset;
- uint32_t value0 = 0;
- uint32_t value1 = 0;
+ uint32_t value0;
+ uint32_t value1;
uint32_t retries = 0;
/* For CZ, there are only 3 pipes. So Virtual channel is up 3.*/
@@ -1601,6 +1601,8 @@ void dce110_link_encoder_update_mst_stream_allocation_table(
* Setup VC Payload Table on Tx Side,
* Issue allocation change trigger
* to commit payload on both tx and rx side */
+ value0 = dal_read_reg(enc->ctx, mmDP_MSE_SAT0 + addr_offset);
+ value1 = dal_read_reg(enc->ctx, mmDP_MSE_SAT1 + addr_offset);
if (table->stream_count >= 1) {
set_reg_field_value(
--
2.7.4
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