diff options
Diffstat (limited to 'meta-amdfalconx86/recipes-kernel/linux/linux-yocto/0970-drm-amdgpu-Fix-off-by-one-errors-in-amdgpu_vm_bo_map.patch')
| -rw-r--r-- | meta-amdfalconx86/recipes-kernel/linux/linux-yocto/0970-drm-amdgpu-Fix-off-by-one-errors-in-amdgpu_vm_bo_map.patch | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/meta-amdfalconx86/recipes-kernel/linux/linux-yocto/0970-drm-amdgpu-Fix-off-by-one-errors-in-amdgpu_vm_bo_map.patch b/meta-amdfalconx86/recipes-kernel/linux/linux-yocto/0970-drm-amdgpu-Fix-off-by-one-errors-in-amdgpu_vm_bo_map.patch new file mode 100644 index 00000000..5271f20d --- /dev/null +++ b/meta-amdfalconx86/recipes-kernel/linux/linux-yocto/0970-drm-amdgpu-Fix-off-by-one-errors-in-amdgpu_vm_bo_map.patch @@ -0,0 +1,64 @@ +From 713f9a84a1a3c4fdae75727c80c84aa14b72490b Mon Sep 17 00:00:00 2001 +From: Felix Kuehling <Felix.Kuehling@amd.com> +Date: Mon, 23 Nov 2015 17:43:48 -0500 +Subject: [PATCH 0970/1050] drm/amdgpu: Fix off-by-one errors in + amdgpu_vm_bo_map +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +eaddr is sometimes treated as the last address inside the address +range, and sometimes as the first address outside the range. This +was resulting in errors when a test filled up the entire address +space. Make it consistent to always be the last address within the +range. + +Change-Id: I3a14b1372bb2e6052824f250c0c0fa7cd4606800 +Signed-off-by: Felix.Kuehling <Felix.Kuehling@amd.com> +Reviewed-by: Christian König <christian.koenig@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +index e9b36a0..f3b07bf 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +@@ -1006,13 +1006,13 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev, + return -EINVAL; + + /* make sure object fit at this offset */ +- eaddr = saddr + size; ++ eaddr = saddr + size - 1; + if ((saddr >= eaddr) || (offset + size > amdgpu_bo_size(bo_va->bo))) + return -EINVAL; + + last_pfn = eaddr / AMDGPU_GPU_PAGE_SIZE; +- if (last_pfn > adev->vm_manager.max_pfn) { +- dev_err(adev->dev, "va above limit (0x%08X > 0x%08X)\n", ++ if (last_pfn >= adev->vm_manager.max_pfn) { ++ dev_err(adev->dev, "va above limit (0x%08X >= 0x%08X)\n", + last_pfn, adev->vm_manager.max_pfn); + return -EINVAL; + } +@@ -1021,7 +1021,7 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev, + eaddr /= AMDGPU_GPU_PAGE_SIZE; + + spin_lock(&vm->it_lock); +- it = interval_tree_iter_first(&vm->va, saddr, eaddr - 1); ++ it = interval_tree_iter_first(&vm->va, saddr, eaddr); + spin_unlock(&vm->it_lock); + if (it) { + struct amdgpu_bo_va_mapping *tmp; +@@ -1042,7 +1042,7 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev, + + INIT_LIST_HEAD(&mapping->list); + mapping->it.start = saddr; +- mapping->it.last = eaddr - 1; ++ mapping->it.last = eaddr; + mapping->offset = offset; + mapping->flags = flags; + +-- +1.9.1 + |