diff options
Diffstat (limited to 'meta-amdfalconx86/recipes-kernel/linux/linux-yocto/0954-drm-amd-dal-Validate-required-clocks-against-PPLib-V.patch')
-rw-r--r-- | meta-amdfalconx86/recipes-kernel/linux/linux-yocto/0954-drm-amd-dal-Validate-required-clocks-against-PPLib-V.patch | 142 |
1 files changed, 142 insertions, 0 deletions
diff --git a/meta-amdfalconx86/recipes-kernel/linux/linux-yocto/0954-drm-amd-dal-Validate-required-clocks-against-PPLib-V.patch b/meta-amdfalconx86/recipes-kernel/linux/linux-yocto/0954-drm-amd-dal-Validate-required-clocks-against-PPLib-V.patch new file mode 100644 index 00000000..08ba1cc1 --- /dev/null +++ b/meta-amdfalconx86/recipes-kernel/linux/linux-yocto/0954-drm-amd-dal-Validate-required-clocks-against-PPLib-V.patch @@ -0,0 +1,142 @@ +From 33e1a283273e3b8e3b17c4d380cf396821d355ca Mon Sep 17 00:00:00 2001 +From: David Rokhvarg <David.Rokhvarg@amd.com> +Date: Thu, 10 Dec 2015 16:42:09 -0500 +Subject: [PATCH 0954/1050] drm/amd/dal: Validate required clocks against PPLib + Validation clocks. + +This replaces hardcoded values with values from PPLib (used during Mode +validation). + +Change-Id: I273987a552f8c0d83984376489712254dd2922fc +Signed-off-by: David Rokhvarg <David.Rokhvarg@amd.com> +Signed-off-by: Harry Wentland <harry.wentland@amd.com> +Acked-by: Harry Wentland<harry.wentland@amd.com> +--- + drivers/gpu/drm/amd/dal/dc/calcs/bandwidth_calcs.c | 26 +++++++++++++++++++++- + drivers/gpu/drm/amd/dal/dc/calcs/bw_fixed.c | 5 +++++ + drivers/gpu/drm/amd/dal/dc/core/dc.c | 10 --------- + .../gpu/drm/amd/dal/dc/dce110/dce110_resource.c | 8 ------- + drivers/gpu/drm/amd/dal/dc/inc/bw_fixed.h | 2 ++ + 5 files changed, 32 insertions(+), 19 deletions(-) + +diff --git a/drivers/gpu/drm/amd/dal/dc/calcs/bandwidth_calcs.c b/drivers/gpu/drm/amd/dal/dc/calcs/bandwidth_calcs.c +index 2b54eb6..6fc1ee6 100644 +--- a/drivers/gpu/drm/amd/dal/dc/calcs/bandwidth_calcs.c ++++ b/drivers/gpu/drm/amd/dal/dc/calcs/bandwidth_calcs.c +@@ -3253,6 +3253,29 @@ void bw_calcs_init(struct bw_calcs_input_dceip *bw_dceip, + } + + /** ++ * Compare calculated (required) clocks against the clocks available at ++ * maximum voltage (max Performance Level). ++ */ ++static bool is_display_configuration_supported( ++ const struct bw_calcs_input_vbios *vbios, ++ const struct bw_calcs_output *calcs_output) ++{ ++ uint32_t int_max_clk; ++ ++ int_max_clk = fixed_to_int(vbios->high_voltage_max_dispclk_mhz); ++ int_max_clk *= 1000; /* MHz to kHz */ ++ if (calcs_output->dispclk_khz > int_max_clk) ++ return false; ++ ++ int_max_clk = fixed_to_int(vbios->high_sclk_mhz); ++ int_max_clk *= 1000; /* MHz to kHz */ ++ if (calcs_output->required_sclk > int_max_clk) ++ return false; ++ ++ return true; ++} ++ ++/** + * Return: + * true - Display(s) configuration supported. + * In this case 'calcs_output' contains data for HW programming +@@ -3482,5 +3505,6 @@ bool bw_calcs(struct dc_context *ctx, const struct bw_calcs_input_dceip *dceip, + + dc_service_free(ctx, bw_data_internal); + dc_service_free(ctx, bw_results_internal); +- return true; ++ ++ return is_display_configuration_supported(vbios, calcs_output); + } +diff --git a/drivers/gpu/drm/amd/dal/dc/calcs/bw_fixed.c b/drivers/gpu/drm/amd/dal/dc/calcs/bw_fixed.c +index 646fafe..e1dd610 100644 +--- a/drivers/gpu/drm/amd/dal/dc/calcs/bw_fixed.c ++++ b/drivers/gpu/drm/amd/dal/dc/calcs/bw_fixed.c +@@ -76,6 +76,11 @@ struct bw_fixed int_to_fixed(int64_t value) + return res; + } + ++uint32_t fixed_to_int(struct bw_fixed value) ++{ ++ return GET_INTEGER_PART(value.value); ++} ++ + struct bw_fixed frc_to_fixed(int64_t numerator, int64_t denominator) + { + struct bw_fixed res; +diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc.c b/drivers/gpu/drm/amd/dal/dc/core/dc.c +index a20a5ef..3284fda 100644 +--- a/drivers/gpu/drm/amd/dal/dc/core/dc.c ++++ b/drivers/gpu/drm/amd/dal/dc/core/dc.c +@@ -264,16 +264,6 @@ static void bw_calcs_data_update_from_pplib(struct dc *dc) + clks.clocks_in_khz[0], 1000); + dc->bw_vbios.high_yclk_mhz = frc_to_fixed( + clks.clocks_in_khz[clks.num_levels-1], 1000); +- return; +- +- /* on CZ Gardenia from PPLib we get: +- * clk_range.max_mclk:80000 +- * clk_range.min_mclk:80000 +- * clk_range.max_sclk:80000 +- * clk_range.min_sclk:30000 */ +- +- /* The values for calcs are stored in units of MHz, so for example +- * 80000 will be stored as 800. */ + } + + static bool construct(struct dc *dc, const struct dal_init_data *init_params) +diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c +index 400271e..afe54c3 100644 +--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c ++++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c +@@ -47,9 +47,6 @@ enum dce110_clk_src_array_id { + DCE110_CLK_SRC_TOTAL + }; + +-#define DCE110_MAX_DISPCLK 643000 +-#define DCE110_MAX_SCLK 626000 +- + bool dce110_construct_resource_pool( + struct adapter_service *adapter_serv, + struct dc *dc, +@@ -558,11 +555,6 @@ enum dc_status dce110_validate_bandwidth( + else + result = DC_OK; + +- +- if (context->bw_results.dispclk_khz > DCE110_MAX_DISPCLK +- || context->bw_results.required_sclk > DCE110_MAX_SCLK) +- result = DC_FAIL_BANDWIDTH_VALIDATE; +- + if (result == DC_FAIL_BANDWIDTH_VALIDATE) + dal_logger_write(dc->ctx->logger, + LOG_MAJOR_BWM, +diff --git a/drivers/gpu/drm/amd/dal/dc/inc/bw_fixed.h b/drivers/gpu/drm/amd/dal/dc/inc/bw_fixed.h +index 254cf76..cd0c889 100644 +--- a/drivers/gpu/drm/amd/dal/dc/inc/bw_fixed.h ++++ b/drivers/gpu/drm/amd/dal/dc/inc/bw_fixed.h +@@ -36,6 +36,8 @@ struct bw_fixed bw_max3(struct bw_fixed v1, struct bw_fixed v2, struct bw_fixed + + struct bw_fixed int_to_fixed(int64_t value); + ++uint32_t fixed_to_int(struct bw_fixed value); ++ + struct bw_fixed frc_to_fixed(int64_t num, int64_t denum); + + struct bw_fixed fixed31_32_to_bw_fixed(int64_t raw); +-- +1.9.1 + |