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Diffstat (limited to 'meta-amdfalconx86/recipes-kernel/linux/linux-yocto/0405-drm-amdgpu-use-gpu-scheduler-for-sdma-ib-test.patch')
-rw-r--r--meta-amdfalconx86/recipes-kernel/linux/linux-yocto/0405-drm-amdgpu-use-gpu-scheduler-for-sdma-ib-test.patch201
1 files changed, 201 insertions, 0 deletions
diff --git a/meta-amdfalconx86/recipes-kernel/linux/linux-yocto/0405-drm-amdgpu-use-gpu-scheduler-for-sdma-ib-test.patch b/meta-amdfalconx86/recipes-kernel/linux/linux-yocto/0405-drm-amdgpu-use-gpu-scheduler-for-sdma-ib-test.patch
new file mode 100644
index 00000000..460537d5
--- /dev/null
+++ b/meta-amdfalconx86/recipes-kernel/linux/linux-yocto/0405-drm-amdgpu-use-gpu-scheduler-for-sdma-ib-test.patch
@@ -0,0 +1,201 @@
+From 0011fdaa4dab19bf545a28c0d4d164bba4745d29 Mon Sep 17 00:00:00 2001
+From: Chunming Zhou <david1.zhou@amd.com>
+Date: Mon, 1 Jun 2015 15:33:20 +0800
+Subject: [PATCH 0405/1050] drm/amdgpu: use gpu scheduler for sdma ib test
+
+Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
+Reviewed-by: Christian K?nig <christian.koenig@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 25 +++++++++++--------------
+ drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c | 26 ++++++++++++--------------
+ drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 25 +++++++++++--------------
+ 3 files changed, 34 insertions(+), 42 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
+index dd3da7b..6e8642b 100644
+--- a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
++++ b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
+@@ -629,12 +629,10 @@ static int cik_sdma_ring_test_ib(struct amdgpu_ring *ring)
+ gpu_addr = adev->wb.gpu_addr + (index * 4);
+ tmp = 0xCAFEDEAD;
+ adev->wb.wb[index] = cpu_to_le32(tmp);
+-
+ r = amdgpu_ib_get(ring, NULL, 256, &ib);
+ if (r) {
+- amdgpu_wb_free(adev, index);
+ DRM_ERROR("amdgpu: failed to get ib (%d).\n", r);
+- return r;
++ goto err0;
+ }
+
+ ib.ptr[0] = SDMA_PACKET(SDMA_OPCODE_WRITE, SDMA_WRITE_SUB_OPCODE_LINEAR, 0);
+@@ -643,20 +641,15 @@ static int cik_sdma_ring_test_ib(struct amdgpu_ring *ring)
+ ib.ptr[3] = 1;
+ ib.ptr[4] = 0xDEADBEEF;
+ ib.length_dw = 5;
++ r = amdgpu_sched_ib_submit_kernel_helper(adev, ring, &ib, 1, NULL,
++ AMDGPU_FENCE_OWNER_UNDEFINED);
++ if (r)
++ goto err1;
+
+- r = amdgpu_ib_schedule(adev, 1, &ib, AMDGPU_FENCE_OWNER_UNDEFINED);
+- if (r) {
+- amdgpu_ib_free(adev, &ib);
+- amdgpu_wb_free(adev, index);
+- DRM_ERROR("amdgpu: failed to schedule ib (%d).\n", r);
+- return r;
+- }
+ r = amdgpu_fence_wait(ib.fence, false);
+ if (r) {
+- amdgpu_ib_free(adev, &ib);
+- amdgpu_wb_free(adev, index);
+ DRM_ERROR("amdgpu: fence wait failed (%d).\n", r);
+- return r;
++ goto err1;
+ }
+ for (i = 0; i < adev->usec_timeout; i++) {
+ tmp = le32_to_cpu(adev->wb.wb[index]);
+@@ -666,12 +659,16 @@ static int cik_sdma_ring_test_ib(struct amdgpu_ring *ring)
+ }
+ if (i < adev->usec_timeout) {
+ DRM_INFO("ib test on ring %d succeeded in %u usecs\n",
+- ib.fence->ring->idx, i);
++ ring->idx, i);
++ goto err1;
+ } else {
+ DRM_ERROR("amdgpu: ib test failed (0x%08X)\n", tmp);
+ r = -EINVAL;
+ }
++
++err1:
+ amdgpu_ib_free(adev, &ib);
++err0:
+ amdgpu_wb_free(adev, index);
+ return r;
+ }
+diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
+index 8b7e243..5511a19 100644
+--- a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
++++ b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
+@@ -688,12 +688,10 @@ static int sdma_v2_4_ring_test_ib(struct amdgpu_ring *ring)
+ gpu_addr = adev->wb.gpu_addr + (index * 4);
+ tmp = 0xCAFEDEAD;
+ adev->wb.wb[index] = cpu_to_le32(tmp);
+-
+ r = amdgpu_ib_get(ring, NULL, 256, &ib);
+ if (r) {
+- amdgpu_wb_free(adev, index);
+ DRM_ERROR("amdgpu: failed to get ib (%d).\n", r);
+- return r;
++ goto err0;
+ }
+
+ ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |
+@@ -707,19 +705,15 @@ static int sdma_v2_4_ring_test_ib(struct amdgpu_ring *ring)
+ ib.ptr[7] = SDMA_PKT_HEADER_OP(SDMA_OP_NOP);
+ ib.length_dw = 8;
+
+- r = amdgpu_ib_schedule(adev, 1, &ib, AMDGPU_FENCE_OWNER_UNDEFINED);
+- if (r) {
+- amdgpu_ib_free(adev, &ib);
+- amdgpu_wb_free(adev, index);
+- DRM_ERROR("amdgpu: failed to schedule ib (%d).\n", r);
+- return r;
+- }
++ r = amdgpu_sched_ib_submit_kernel_helper(adev, ring, &ib, 1, NULL,
++ AMDGPU_FENCE_OWNER_UNDEFINED);
++ if (r)
++ goto err1;
++
+ r = amdgpu_fence_wait(ib.fence, false);
+ if (r) {
+- amdgpu_ib_free(adev, &ib);
+- amdgpu_wb_free(adev, index);
+ DRM_ERROR("amdgpu: fence wait failed (%d).\n", r);
+- return r;
++ goto err1;
+ }
+ for (i = 0; i < adev->usec_timeout; i++) {
+ tmp = le32_to_cpu(adev->wb.wb[index]);
+@@ -729,12 +723,16 @@ static int sdma_v2_4_ring_test_ib(struct amdgpu_ring *ring)
+ }
+ if (i < adev->usec_timeout) {
+ DRM_INFO("ib test on ring %d succeeded in %u usecs\n",
+- ib.fence->ring->idx, i);
++ ring->idx, i);
++ goto err1;
+ } else {
+ DRM_ERROR("amdgpu: ib test failed (0x%08X)\n", tmp);
+ r = -EINVAL;
+ }
++
++err1:
+ amdgpu_ib_free(adev, &ib);
++err0:
+ amdgpu_wb_free(adev, index);
+ return r;
+ }
+diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
+index 4b5d769..679ea9c 100644
+--- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
+@@ -809,12 +809,10 @@ static int sdma_v3_0_ring_test_ib(struct amdgpu_ring *ring)
+ gpu_addr = adev->wb.gpu_addr + (index * 4);
+ tmp = 0xCAFEDEAD;
+ adev->wb.wb[index] = cpu_to_le32(tmp);
+-
+ r = amdgpu_ib_get(ring, NULL, 256, &ib);
+ if (r) {
+- amdgpu_wb_free(adev, index);
+ DRM_ERROR("amdgpu: failed to get ib (%d).\n", r);
+- return r;
++ goto err0;
+ }
+
+ ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |
+@@ -828,19 +826,15 @@ static int sdma_v3_0_ring_test_ib(struct amdgpu_ring *ring)
+ ib.ptr[7] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP);
+ ib.length_dw = 8;
+
+- r = amdgpu_ib_schedule(adev, 1, &ib, AMDGPU_FENCE_OWNER_UNDEFINED);
+- if (r) {
+- amdgpu_ib_free(adev, &ib);
+- amdgpu_wb_free(adev, index);
+- DRM_ERROR("amdgpu: failed to schedule ib (%d).\n", r);
+- return r;
+- }
++ r = amdgpu_sched_ib_submit_kernel_helper(adev, ring, &ib, 1, NULL,
++ AMDGPU_FENCE_OWNER_UNDEFINED);
++ if (r)
++ goto err1;
++
+ r = amdgpu_fence_wait(ib.fence, false);
+ if (r) {
+- amdgpu_ib_free(adev, &ib);
+- amdgpu_wb_free(adev, index);
+ DRM_ERROR("amdgpu: fence wait failed (%d).\n", r);
+- return r;
++ goto err1;
+ }
+ for (i = 0; i < adev->usec_timeout; i++) {
+ tmp = le32_to_cpu(adev->wb.wb[index]);
+@@ -850,12 +844,15 @@ static int sdma_v3_0_ring_test_ib(struct amdgpu_ring *ring)
+ }
+ if (i < adev->usec_timeout) {
+ DRM_INFO("ib test on ring %d succeeded in %u usecs\n",
+- ib.fence->ring->idx, i);
++ ring->idx, i);
++ goto err1;
+ } else {
+ DRM_ERROR("amdgpu: ib test failed (0x%08X)\n", tmp);
+ r = -EINVAL;
+ }
++err1:
+ amdgpu_ib_free(adev, &ib);
++err0:
+ amdgpu_wb_free(adev, index);
+ return r;
+ }
+--
+1.9.1
+
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-05-04 11:55:59 +0000