diff options
Diffstat (limited to 'meta-amdfalconx86/recipes-kernel/linux/files/1063-drm-amdgpu-add-pipeline-sync-for-compute-job.patch')
-rw-r--r-- | meta-amdfalconx86/recipes-kernel/linux/files/1063-drm-amdgpu-add-pipeline-sync-for-compute-job.patch | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/meta-amdfalconx86/recipes-kernel/linux/files/1063-drm-amdgpu-add-pipeline-sync-for-compute-job.patch b/meta-amdfalconx86/recipes-kernel/linux/files/1063-drm-amdgpu-add-pipeline-sync-for-compute-job.patch new file mode 100644 index 00000000..63d5ea35 --- /dev/null +++ b/meta-amdfalconx86/recipes-kernel/linux/files/1063-drm-amdgpu-add-pipeline-sync-for-compute-job.patch @@ -0,0 +1,38 @@ +From 1ae41fd261b58aee381d59e7fbf0d5743bbc8b21 Mon Sep 17 00:00:00 2001 +From: Chunming Zhou <David1.Zhou@amd.com> +Date: Wed, 27 Apr 2016 18:07:41 +0800 +Subject: [PATCH 1063/1110] drm/amdgpu: add pipeline sync for compute job +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +hardware ring is async processed, the job is executed in parelell. +In some case, this will result vm fault, like jobs with different vmids. + +Change-Id: Ia5446eba1eaf25a337cb14e857a7fc00862b718b +Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Reviewed-by: Christian König <christian.koenig@amd.com> +Reviewed-by: Monk Liu <monk.liu@amd.com> +Signed-off-by: Kalyan Alle <kalyan.alle@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +index 3a12305..6399429 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +@@ -307,7 +307,8 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring, + int r; + + if (ring->funcs->emit_pipeline_sync && ( +- pd_addr != AMDGPU_VM_NO_FLUSH || gds_switch_needed)) ++ pd_addr != AMDGPU_VM_NO_FLUSH || gds_switch_needed || ++ ring->type == AMDGPU_RING_TYPE_COMPUTE)) + amdgpu_ring_emit_pipeline_sync(ring); + + if (pd_addr != AMDGPU_VM_NO_FLUSH) { +-- +2.7.4 + |