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-rw-r--r--meta-amdfalconx86/recipes-kernel/linux/files/1001-drm-amd-dal-set-timing_changed-flag-on-clk_src-chang.patch90
1 files changed, 90 insertions, 0 deletions
diff --git a/meta-amdfalconx86/recipes-kernel/linux/files/1001-drm-amd-dal-set-timing_changed-flag-on-clk_src-chang.patch b/meta-amdfalconx86/recipes-kernel/linux/files/1001-drm-amd-dal-set-timing_changed-flag-on-clk_src-chang.patch
new file mode 100644
index 00000000..eececa74
--- /dev/null
+++ b/meta-amdfalconx86/recipes-kernel/linux/files/1001-drm-amd-dal-set-timing_changed-flag-on-clk_src-chang.patch
@@ -0,0 +1,90 @@
+From c0f9ac327ed7caf044ce0b128fd571231f22e37c Mon Sep 17 00:00:00 2001
+From: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
+Date: Fri, 1 Apr 2016 12:13:31 -0400
+Subject: [PATCH 1001/1110] drm/amd/dal: set timing_changed flag on clk_src
+ change
+
+Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
+Acked-by: Harry Wentland <harry.wentland@amd.com>
+---
+ drivers/gpu/drm/amd/dal/dc/core/dc_resource.c | 3 +++
+ .../drm/amd/dal/dc/dce110/dce110_hw_sequencer.c | 23 ++++++++++++----------
+ .../gpu/drm/amd/dal/dc/dce112/dce112_resource.c | 3 +++
+ 3 files changed, 19 insertions(+), 10 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c b/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c
+index 087670d..c2f16a9 100644
+--- a/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c
++++ b/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c
+@@ -1282,6 +1282,9 @@ enum dc_status resource_map_clock_resources(
+ &context->res_ctx,
+ pipe_ctx->clock_source);
+
++ if (dc->current_context.res_ctx.pipe_ctx[k].clock_source
++ != pipe_ctx->clock_source)
++ pipe_ctx->flags.timing_changed = true;
+ /* only one cs per stream regardless of mpo */
+ break;
+ }
+diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c
+index c2adf6b..53da396 100644
+--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c
++++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c
+@@ -673,27 +673,30 @@ static enum dc_status apply_single_controller_ctx_to_hw(
+ struct validate_context *context,
+ struct core_dc *dc)
+ {
++ int i;
+ struct core_stream *stream = pipe_ctx->stream;
+- struct pipe_ctx *old_pipe_ctx =
+- &dc->current_context.res_ctx.pipe_ctx[pipe_ctx->pipe_idx];
+ bool timing_changed = context->res_ctx.pipe_ctx[pipe_ctx->pipe_idx]
+ .flags.timing_changed;
+ enum dc_color_space color_space;
+
++ struct pipe_ctx *pipe_ctx_old = NULL;
++
++ for (i = 0; i < MAX_PIPES; i++) {
++ if (dc->current_context.res_ctx.pipe_ctx[i].stream == pipe_ctx->stream)
++ pipe_ctx_old = &dc->current_context.res_ctx.pipe_ctx[i];
++ }
++
+ if (timing_changed) {
+ /* Must blank CRTC after disabling power gating and before any
+ * programming, otherwise CRTC will be hung in bad state
+ */
+ pipe_ctx->tg->funcs->set_blank(pipe_ctx->tg, true);
+
+- /*
+- * only disable stream in case it was ever enabled
+- */
+- if (old_pipe_ctx->stream) {
+- core_link_disable_stream(old_pipe_ctx);
+-
+- ASSERT(old_pipe_ctx->clock_source);
+- resource_unreference_clock_source(&dc->current_context.res_ctx, old_pipe_ctx->clock_source);
++ if (pipe_ctx_old) {
++ core_link_disable_stream(pipe_ctx);
++ resource_unreference_clock_source(
++ &dc->current_context.res_ctx,
++ pipe_ctx_old->clock_source);
+ }
+
+ /*TODO: AUTO check if timing changed*/
+diff --git a/drivers/gpu/drm/amd/dal/dc/dce112/dce112_resource.c b/drivers/gpu/drm/amd/dal/dc/dce112/dce112_resource.c
+index 7b3dee1..c1fb291 100644
+--- a/drivers/gpu/drm/amd/dal/dc/dce112/dce112_resource.c
++++ b/drivers/gpu/drm/amd/dal/dc/dce112/dce112_resource.c
+@@ -1022,6 +1022,9 @@ static enum dc_status map_clock_resources(
+ &context->res_ctx,
+ pipe_ctx->clock_source);
+
++ if (pipe_ctx->clock_source
++ != dc->current_context.res_ctx.pipe_ctx[k].clock_source)
++ pipe_ctx->flags.timing_changed = true;
+ /* only one cs per stream regardless of mpo */
+ break;
+ }
+--
+2.7.4
+