diff options
Diffstat (limited to 'meta-amdfalconx86/recipes-kernel/linux/files/0889-drm-amd-dal-Allow-for-ASIC-specific-bw_calcs.patch')
| -rw-r--r-- | meta-amdfalconx86/recipes-kernel/linux/files/0889-drm-amd-dal-Allow-for-ASIC-specific-bw_calcs.patch | 399 |
1 files changed, 399 insertions, 0 deletions
diff --git a/meta-amdfalconx86/recipes-kernel/linux/files/0889-drm-amd-dal-Allow-for-ASIC-specific-bw_calcs.patch b/meta-amdfalconx86/recipes-kernel/linux/files/0889-drm-amd-dal-Allow-for-ASIC-specific-bw_calcs.patch new file mode 100644 index 00000000..ee50a086 --- /dev/null +++ b/meta-amdfalconx86/recipes-kernel/linux/files/0889-drm-amd-dal-Allow-for-ASIC-specific-bw_calcs.patch @@ -0,0 +1,399 @@ +From 07981bae0a25f2a3dfbc171245b5dd6a8903cb61 Mon Sep 17 00:00:00 2001 +From: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> +Date: Mon, 7 Mar 2016 11:08:23 -0500 +Subject: [PATCH 0889/1110] drm/amd/dal: Allow for ASIC specific bw_calcs + +Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> +Acked-by: Harry Wentland <harry.wentland@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/dal/dc/calcs/bandwidth_calcs.c | 199 ++++++++++++--------- + drivers/gpu/drm/amd/dal/dc/core/dc.c | 50 ------ + .../gpu/drm/amd/dal/dc/dce110/dce110_resource.c | 51 ++++++ + drivers/gpu/drm/amd/dal/dc/inc/bandwidth_calcs.h | 8 +- + 4 files changed, 168 insertions(+), 140 deletions(-) + +diff --git a/drivers/gpu/drm/amd/dal/dc/calcs/bandwidth_calcs.c b/drivers/gpu/drm/amd/dal/dc/calcs/bandwidth_calcs.c +index ca17b25..52557db 100644 +--- a/drivers/gpu/drm/amd/dal/dc/calcs/bandwidth_calcs.c ++++ b/drivers/gpu/drm/amd/dal/dc/calcs/bandwidth_calcs.c +@@ -3568,101 +3568,122 @@ static void calculate_bandwidth( + /******************************************************************************* + * Public functions + ******************************************************************************/ +- + void bw_calcs_init(struct bw_calcs_dceip *bw_dceip, +- struct bw_calcs_vbios *bw_vbios) ++ struct bw_calcs_vbios *bw_vbios, ++ enum bw_calcs_version version) + { + struct bw_calcs_dceip dceip = {{ 0 }}; + struct bw_calcs_vbios vbios = { 0 }; + +- vbios.number_of_dram_channels = 2; +- vbios.dram_channel_width_in_bits = 64; +- vbios.number_of_dram_banks = 8; +- vbios.high_yclk = bw_int_to_fixed(1600); +- vbios.mid_yclk = bw_int_to_fixed(1600); +- vbios.low_yclk = bw_frc_to_fixed(66666, 100); +- vbios.low_sclk = bw_int_to_fixed(200); +- vbios.mid_sclk = bw_int_to_fixed(300); +- vbios.high_sclk = bw_frc_to_fixed(62609, 100); +- vbios.low_voltage_max_dispclk = bw_int_to_fixed(352); +- vbios.mid_voltage_max_dispclk = bw_int_to_fixed(467); +- vbios.high_voltage_max_dispclk = bw_int_to_fixed(643); +- vbios.data_return_bus_width = bw_int_to_fixed(32); +- vbios.trc = bw_int_to_fixed(50); +- vbios.dmifmc_urgent_latency = bw_int_to_fixed(4); +- vbios.stutter_self_refresh_exit_latency = bw_frc_to_fixed(153, 10); +- vbios.nbp_state_change_latency = bw_frc_to_fixed(19649, 1000); +- vbios.mcifwrmc_urgent_latency = bw_int_to_fixed(10); +- vbios.scatter_gather_enable = true; +- vbios.down_spread_percentage = bw_frc_to_fixed(5, 10); +- vbios.cursor_width = 32; +- vbios.average_compression_rate = 4; +- vbios.number_of_request_slots_gmc_reserves_for_dmif_per_channel = 256; +- vbios.blackout_duration = bw_int_to_fixed(18); /* us */ +- vbios.maximum_blackout_recovery_time = bw_int_to_fixed(20); +- +- dceip.dmif_request_buffer_size = bw_int_to_fixed(768); +- dceip.de_tiling_buffer = bw_int_to_fixed(0); +- dceip.dcfclk_request_generation = 0; +- dceip.lines_interleaved_into_lb = 2; +- dceip.chunk_width = 256; +- dceip.number_of_graphics_pipes = 3; +- dceip.number_of_underlay_pipes = 1; +- dceip.display_write_back_supported = false; +- dceip.argb_compression_support = false; +- dceip.underlay_vscaler_efficiency6_bit_per_component = bw_frc_to_fixed( +- 35556, 10000); +- dceip.underlay_vscaler_efficiency8_bit_per_component = bw_frc_to_fixed( +- 34286, 10000); +- dceip.underlay_vscaler_efficiency10_bit_per_component = bw_frc_to_fixed(32, +- 10); +- dceip.underlay_vscaler_efficiency12_bit_per_component = bw_int_to_fixed(3); +- dceip.graphics_vscaler_efficiency6_bit_per_component = bw_frc_to_fixed(35, +- 10); +- dceip.graphics_vscaler_efficiency8_bit_per_component = bw_frc_to_fixed( +- 34286, 10000); +- dceip.graphics_vscaler_efficiency10_bit_per_component = bw_frc_to_fixed(32, +- 10); +- dceip.graphics_vscaler_efficiency12_bit_per_component = bw_int_to_fixed(3); +- dceip.alpha_vscaler_efficiency = bw_int_to_fixed(3); +- dceip.max_dmif_buffer_allocated = 2; +- dceip.graphics_dmif_size = 12288; +- dceip.underlay_luma_dmif_size = 19456; +- dceip.underlay_chroma_dmif_size = 23552; +- dceip.pre_downscaler_enabled = true; +- dceip.underlay_downscale_prefetch_enabled = true; +- dceip.lb_write_pixels_per_dispclk = bw_int_to_fixed(1); +- dceip.lb_size_per_component444 = bw_int_to_fixed(82176); +- dceip.graphics_lb_nodownscaling_multi_line_prefetching = false; +- dceip.stutter_and_dram_clock_state_change_gated_before_cursor = +- bw_int_to_fixed(0); +- dceip.underlay420_luma_lb_size_per_component = bw_int_to_fixed(82176); +- dceip.underlay420_chroma_lb_size_per_component = bw_int_to_fixed(164352); +- dceip.underlay422_lb_size_per_component = bw_int_to_fixed(82176); +- dceip.cursor_chunk_width = bw_int_to_fixed(64); +- dceip.cursor_dcp_buffer_lines = bw_int_to_fixed(4); +- dceip.cursor_memory_interface_buffer_pixels = bw_int_to_fixed(64); +- dceip.underlay_maximum_width_efficient_for_tiling = bw_int_to_fixed(1920); +- dceip.underlay_maximum_height_efficient_for_tiling = bw_int_to_fixed(1080); +- dceip.peak_pte_request_to_eviction_ratio_limiting_multiple_displays_or_single_rotated_display = +- bw_frc_to_fixed(3, 10); +- dceip.peak_pte_request_to_eviction_ratio_limiting_single_display_no_rotation = +- bw_int_to_fixed(25); +- dceip.minimum_outstanding_pte_request_limit = bw_int_to_fixed(2); +- dceip.maximum_total_outstanding_pte_requests_allowed_by_saw = +- bw_int_to_fixed(128); +- dceip.limit_excessive_outstanding_dmif_requests = true; +- dceip.linear_mode_line_request_alternation_slice = bw_int_to_fixed(64); +- dceip.scatter_gather_lines_of_pte_prefetching_in_linear_mode = 32; +- dceip.display_write_back420_luma_mcifwr_buffer_size = 12288; +- dceip.display_write_back420_chroma_mcifwr_buffer_size = 8192; +- dceip.request_efficiency = bw_frc_to_fixed(8, 10); +- dceip.dispclk_per_request = bw_int_to_fixed(2); +- dceip.dispclk_ramping_factor = bw_frc_to_fixed(11, 10); +- dceip.display_pipe_throughput_factor = bw_frc_to_fixed(105, 100); +- dceip.scatter_gather_pte_request_rows_in_tiling_mode = 2; +- dceip.mcifwr_all_surfaces_burst_time = bw_int_to_fixed(0); /* todo: this is a bug*/ ++ switch (version) { ++ case BW_CALCS_VERSION_CARRIZO: ++ vbios.number_of_dram_channels = 2; ++ vbios.dram_channel_width_in_bits = 64; ++ vbios.number_of_dram_banks = 8; ++ vbios.high_yclk = bw_int_to_fixed(1600); ++ vbios.mid_yclk = bw_int_to_fixed(1600); ++ vbios.low_yclk = bw_frc_to_fixed(66666, 100); ++ vbios.low_sclk = bw_int_to_fixed(200); ++ vbios.mid_sclk = bw_int_to_fixed(300); ++ vbios.high_sclk = bw_frc_to_fixed(62609, 100); ++ vbios.low_voltage_max_dispclk = bw_int_to_fixed(352); ++ vbios.mid_voltage_max_dispclk = bw_int_to_fixed(467); ++ vbios.high_voltage_max_dispclk = bw_int_to_fixed(643); ++ vbios.data_return_bus_width = bw_int_to_fixed(32); ++ vbios.trc = bw_int_to_fixed(50); ++ vbios.dmifmc_urgent_latency = bw_int_to_fixed(4); ++ vbios.stutter_self_refresh_exit_latency = bw_frc_to_fixed( ++ 153, ++ 10); ++ vbios.nbp_state_change_latency = bw_frc_to_fixed(19649, 1000); ++ vbios.mcifwrmc_urgent_latency = bw_int_to_fixed(10); ++ vbios.scatter_gather_enable = true; ++ vbios.down_spread_percentage = bw_frc_to_fixed(5, 10); ++ vbios.cursor_width = 32; ++ vbios.average_compression_rate = 4; ++ vbios.number_of_request_slots_gmc_reserves_for_dmif_per_channel = ++ 256; ++ vbios.blackout_duration = bw_int_to_fixed(18); /* us */ ++ vbios.maximum_blackout_recovery_time = bw_int_to_fixed(20); + ++ dceip.dmif_request_buffer_size = bw_int_to_fixed(768); ++ dceip.de_tiling_buffer = bw_int_to_fixed(0); ++ dceip.dcfclk_request_generation = 0; ++ dceip.lines_interleaved_into_lb = 2; ++ dceip.chunk_width = 256; ++ dceip.number_of_graphics_pipes = 3; ++ dceip.number_of_underlay_pipes = 1; ++ dceip.display_write_back_supported = false; ++ dceip.argb_compression_support = false; ++ dceip.underlay_vscaler_efficiency6_bit_per_component = ++ bw_frc_to_fixed(35556, 10000); ++ dceip.underlay_vscaler_efficiency8_bit_per_component = ++ bw_frc_to_fixed(34286, 10000); ++ dceip.underlay_vscaler_efficiency10_bit_per_component = ++ bw_frc_to_fixed(32, 10); ++ dceip.underlay_vscaler_efficiency12_bit_per_component = ++ bw_int_to_fixed(3); ++ dceip.graphics_vscaler_efficiency6_bit_per_component = ++ bw_frc_to_fixed(35, 10); ++ dceip.graphics_vscaler_efficiency8_bit_per_component = ++ bw_frc_to_fixed(34286, 10000); ++ dceip.graphics_vscaler_efficiency10_bit_per_component = ++ bw_frc_to_fixed(32, 10); ++ dceip.graphics_vscaler_efficiency12_bit_per_component = ++ bw_int_to_fixed(3); ++ dceip.alpha_vscaler_efficiency = bw_int_to_fixed(3); ++ dceip.max_dmif_buffer_allocated = 2; ++ dceip.graphics_dmif_size = 12288; ++ dceip.underlay_luma_dmif_size = 19456; ++ dceip.underlay_chroma_dmif_size = 23552; ++ dceip.pre_downscaler_enabled = true; ++ dceip.underlay_downscale_prefetch_enabled = true; ++ dceip.lb_write_pixels_per_dispclk = bw_int_to_fixed(1); ++ dceip.lb_size_per_component444 = bw_int_to_fixed(82176); ++ dceip.graphics_lb_nodownscaling_multi_line_prefetching = false; ++ dceip.stutter_and_dram_clock_state_change_gated_before_cursor = ++ bw_int_to_fixed(0); ++ dceip.underlay420_luma_lb_size_per_component = bw_int_to_fixed( ++ 82176); ++ dceip.underlay420_chroma_lb_size_per_component = ++ bw_int_to_fixed(164352); ++ dceip.underlay422_lb_size_per_component = bw_int_to_fixed( ++ 82176); ++ dceip.cursor_chunk_width = bw_int_to_fixed(64); ++ dceip.cursor_dcp_buffer_lines = bw_int_to_fixed(4); ++ dceip.cursor_memory_interface_buffer_pixels = bw_int_to_fixed( ++ 64); ++ dceip.underlay_maximum_width_efficient_for_tiling = ++ bw_int_to_fixed(1920); ++ dceip.underlay_maximum_height_efficient_for_tiling = ++ bw_int_to_fixed(1080); ++ dceip.peak_pte_request_to_eviction_ratio_limiting_multiple_displays_or_single_rotated_display = ++ bw_frc_to_fixed(3, 10); ++ dceip.peak_pte_request_to_eviction_ratio_limiting_single_display_no_rotation = ++ bw_int_to_fixed(25); ++ dceip.minimum_outstanding_pte_request_limit = bw_int_to_fixed( ++ 2); ++ dceip.maximum_total_outstanding_pte_requests_allowed_by_saw = ++ bw_int_to_fixed(128); ++ dceip.limit_excessive_outstanding_dmif_requests = true; ++ dceip.linear_mode_line_request_alternation_slice = ++ bw_int_to_fixed(64); ++ dceip.scatter_gather_lines_of_pte_prefetching_in_linear_mode = ++ 32; ++ dceip.display_write_back420_luma_mcifwr_buffer_size = 12288; ++ dceip.display_write_back420_chroma_mcifwr_buffer_size = 8192; ++ dceip.request_efficiency = bw_frc_to_fixed(8, 10); ++ dceip.dispclk_per_request = bw_int_to_fixed(2); ++ dceip.dispclk_ramping_factor = bw_frc_to_fixed(11, 10); ++ dceip.display_pipe_throughput_factor = bw_frc_to_fixed( ++ 105, ++ 100); ++ dceip.scatter_gather_pte_request_rows_in_tiling_mode = 2; ++ dceip.mcifwr_all_surfaces_burst_time = bw_int_to_fixed(0); /* todo: this is a bug*/ ++ break; ++ default: ++ break; ++ } + *bw_dceip = dceip; + *bw_vbios = vbios; + } +diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc.c b/drivers/gpu/drm/amd/dal/dc/core/dc.c +index 4c775f6..f8459a3 100644 +--- a/drivers/gpu/drm/amd/dal/dc/core/dc.c ++++ b/drivers/gpu/drm/amd/dal/dc/core/dc.c +@@ -200,52 +200,6 @@ static struct adapter_service *create_as( + return as; + } + +-static void bw_calcs_data_update_from_pplib(struct core_dc *dc) +-{ +- struct dm_pp_clock_levels clks = {0}; +- +- /*do system clock*/ +- dm_pp_get_clock_levels_by_type( +- dc->ctx, +- DM_PP_CLOCK_TYPE_ENGINE_CLK, +- &clks); +- /* convert all the clock fro kHz to fix point mHz */ +- dc->bw_vbios.high_sclk = bw_frc_to_fixed( +- clks.clocks_in_khz[clks.num_levels-1], 1000); +- dc->bw_vbios.mid_sclk = bw_frc_to_fixed( +- clks.clocks_in_khz[clks.num_levels>>1], 1000); +- dc->bw_vbios.low_sclk = bw_frc_to_fixed( +- clks.clocks_in_khz[0], 1000); +- +- /*do display clock*/ +- dm_pp_get_clock_levels_by_type( +- dc->ctx, +- DM_PP_CLOCK_TYPE_DISPLAY_CLK, +- &clks); +- +- dc->bw_vbios.high_voltage_max_dispclk = bw_frc_to_fixed( +- clks.clocks_in_khz[clks.num_levels-1], 1000); +- dc->bw_vbios.mid_voltage_max_dispclk = bw_frc_to_fixed( +- clks.clocks_in_khz[clks.num_levels>>1], 1000); +- dc->bw_vbios.low_voltage_max_dispclk = bw_frc_to_fixed( +- clks.clocks_in_khz[0], 1000); +- +- /*do memory clock*/ +- dm_pp_get_clock_levels_by_type( +- dc->ctx, +- DM_PP_CLOCK_TYPE_MEMORY_CLK, +- &clks); +- +- dc->bw_vbios.low_yclk = bw_frc_to_fixed( +- clks.clocks_in_khz[0] * MEMORY_TYPE_MULTIPLIER, 1000); +- dc->bw_vbios.mid_yclk = bw_frc_to_fixed( +- clks.clocks_in_khz[clks.num_levels>>1] * MEMORY_TYPE_MULTIPLIER, +- 1000); +- dc->bw_vbios.high_yclk = bw_frc_to_fixed( +- clks.clocks_in_khz[clks.num_levels-1] * MEMORY_TYPE_MULTIPLIER, +- 1000); +-} +- + static bool construct(struct core_dc *dc, const struct dc_init_data *init_params) + { + struct dal_logger *logger; +@@ -305,10 +259,6 @@ static bool construct(struct core_dc *dc, const struct dc_init_data *init_params + + if (!create_links(dc, as, init_params->num_virtual_links)) + goto create_links_fail; +- +- bw_calcs_init(&dc->bw_dceip, &dc->bw_vbios); +- +- bw_calcs_data_update_from_pplib(dc); + } else { + + /* Resource should construct all asic specific resources. +diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c +index f02335e..b8fc445 100644 +--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c ++++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c +@@ -1000,6 +1000,52 @@ static void underlay_create(struct dc_context *ctx, struct resource_pool *pool) + pool->pipe_count++; + } + ++static void bw_calcs_data_update_from_pplib(struct core_dc *dc) ++{ ++ struct dm_pp_clock_levels clks = {0}; ++ ++ /*do system clock*/ ++ dm_pp_get_clock_levels_by_type( ++ dc->ctx, ++ DM_PP_CLOCK_TYPE_ENGINE_CLK, ++ &clks); ++ /* convert all the clock fro kHz to fix point mHz */ ++ dc->bw_vbios.high_sclk = bw_frc_to_fixed( ++ clks.clocks_in_khz[clks.num_levels-1], 1000); ++ dc->bw_vbios.mid_sclk = bw_frc_to_fixed( ++ clks.clocks_in_khz[clks.num_levels>>1], 1000); ++ dc->bw_vbios.low_sclk = bw_frc_to_fixed( ++ clks.clocks_in_khz[0], 1000); ++ ++ /*do display clock*/ ++ dm_pp_get_clock_levels_by_type( ++ dc->ctx, ++ DM_PP_CLOCK_TYPE_DISPLAY_CLK, ++ &clks); ++ ++ dc->bw_vbios.high_voltage_max_dispclk = bw_frc_to_fixed( ++ clks.clocks_in_khz[clks.num_levels-1], 1000); ++ dc->bw_vbios.mid_voltage_max_dispclk = bw_frc_to_fixed( ++ clks.clocks_in_khz[clks.num_levels>>1], 1000); ++ dc->bw_vbios.low_voltage_max_dispclk = bw_frc_to_fixed( ++ clks.clocks_in_khz[0], 1000); ++ ++ /*do memory clock*/ ++ dm_pp_get_clock_levels_by_type( ++ dc->ctx, ++ DM_PP_CLOCK_TYPE_MEMORY_CLK, ++ &clks); ++ ++ dc->bw_vbios.low_yclk = bw_frc_to_fixed( ++ clks.clocks_in_khz[0] * MEMORY_TYPE_MULTIPLIER, 1000); ++ dc->bw_vbios.mid_yclk = bw_frc_to_fixed( ++ clks.clocks_in_khz[clks.num_levels>>1] * MEMORY_TYPE_MULTIPLIER, ++ 1000); ++ dc->bw_vbios.high_yclk = bw_frc_to_fixed( ++ clks.clocks_in_khz[clks.num_levels-1] * MEMORY_TYPE_MULTIPLIER, ++ 1000); ++} ++ + bool dce110_construct_resource_pool( + struct adapter_service *as, + uint8_t num_virtual_links, +@@ -1181,10 +1227,15 @@ bool dce110_construct_resource_pool( + pool->stream_enc_count++; + } + ++ + /* Create hardware sequencer */ + if (!dc_construct_hw_sequencer(as, dc)) + goto stream_enc_create_fail; + ++ bw_calcs_init(&dc->bw_dceip, &dc->bw_vbios, BW_CALCS_VERSION_CARRIZO); ++ ++ bw_calcs_data_update_from_pplib(dc); ++ + return true; + + stream_enc_create_fail: +diff --git a/drivers/gpu/drm/amd/dal/dc/inc/bandwidth_calcs.h b/drivers/gpu/drm/amd/dal/dc/inc/bandwidth_calcs.h +index 2adad08..ff1ea09 100644 +--- a/drivers/gpu/drm/amd/dal/dc/inc/bandwidth_calcs.h ++++ b/drivers/gpu/drm/amd/dal/dc/inc/bandwidth_calcs.h +@@ -483,12 +483,18 @@ struct bw_calcs_output { + int32_t required_blackout_duration_us; + }; + ++enum bw_calcs_version { ++ BW_CALCS_VERSION_INVALID, ++ BW_CALCS_VERSION_CARRIZO ++}; ++ + /** + * Initialize structures with data which will NOT change at runtime. + */ + void bw_calcs_init( + struct bw_calcs_dceip *bw_dceip, +- struct bw_calcs_vbios *bw_vbios); ++ struct bw_calcs_vbios *bw_vbios, ++ enum bw_calcs_version version); + + /** + * Return: +-- +2.7.4 + |