1 files changed, 174 insertions, 0 deletions
diff --git a/meta-amdfalconx86/recipes-kernel/linux/files/0875-drm-amd-dal-Parse-asic-ID-in-dc-rather-than-AS.patch b/meta-amdfalconx86/recipes-kernel/linux/files/0875-drm-amd-dal-Parse-asic-ID-in-dc-rather-than-AS.patch
new file mode 100644
index 00000000..62384d0b
--- /dev/null
+++ b/meta-amdfalconx86/recipes-kernel/linux/files/0875-drm-amd-dal-Parse-asic-ID-in-dc-rather-than-AS.patch
@@ -0,0 +1,174 @@
+From 5a01917f514b22162da1246cc2de13369f82ca83 Mon Sep 17 00:00:00 2001
+From: Jordan Lazare <Jordan.Lazare@amd.com>
+Date: Wed, 2 Mar 2016 13:44:23 -0500
+Subject: [PATCH 0875/1110] drm/amd/dal: Parse asic ID in dc rather than AS
+
+Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com>
+Acked-by: Harry Wentland <harry.wentland@amd.com>
+---
+ drivers/gpu/drm/amd/dal/dc/core/dc.c          | 25 +++++++++++++----
+ drivers/gpu/drm/amd/dal/dc/core/dc_resource.c | 40 +++++++++++++++++++++++++--
+ drivers/gpu/drm/amd/dal/dc/inc/resource.h     |  8 +++++-
+ drivers/gpu/drm/amd/dal/include/dal_types.h   |  2 +-
+ 4 files changed, 64 insertions(+), 11 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc.c b/drivers/gpu/drm/amd/dal/dc/core/dc.c
+index 4a52d43..80339f6 100644
+--- a/drivers/gpu/drm/amd/dal/dc/core/dc.c
++++ b/drivers/gpu/drm/amd/dal/dc/core/dc.c
+@@ -303,6 +303,7 @@ static bool construct(struct core_dc *dc, const struct dc_init_data *init_params
+ 	struct dal_logger *logger;
+ 	struct adapter_service *as;
+ 	struct dc_context *dc_ctx = dm_alloc(sizeof(*dc_ctx));
++	enum dce_version dc_version = DCE_VERSION_UNKNOWN;
+ 
+ 	if (!dc_ctx) {
+ 		dm_error("%s: failed to create ctx\n", __func__);
+@@ -322,7 +323,15 @@ static bool construct(struct core_dc *dc, const struct dc_init_data *init_params
+ 		goto logger_fail;
+ 	}
+ 	dc_ctx->logger = logger;
++	dc->ctx = dc_ctx;
++	dc->ctx->dce_environment = init_params->dce_environment;
++
++
++	resource_parse_asic_id(dc, init_params->asic_id, &dc_version);
+ 
++
++/* TODO: Refactor DCE code to remove AS and asic caps */
++if (dc_version < DCE_VERSION_MAX) {
+ 	/* Create adapter service */
+ 	as = create_as(init_params, dc_ctx);
+ 
+@@ -340,17 +349,12 @@ static bool construct(struct core_dc *dc, const struct dc_init_data *init_params
+ 		goto as_fail;
+ 	}
+ 
+-	dc->ctx = dc_ctx;
+-
+-	dc->ctx->dce_environment = dal_adapter_service_get_dce_environment(
+-			as);
+-
+ 	/* Create hardware sequencer */
+ 	if (!dc_construct_hw_sequencer(as, dc))
+ 		goto hwss_fail;
+ 
+ 	if (!dc_construct_resource_pool(
+-		as, dc, init_params->num_virtual_links))
++		as, dc, init_params->num_virtual_links, dc_version))
+ 		goto construct_resource_fail;
+ 
+ 	if (!create_links(dc, as, init_params->num_virtual_links))
+@@ -359,6 +363,15 @@ static bool construct(struct core_dc *dc, const struct dc_init_data *init_params
+ 	bw_calcs_init(&dc->bw_dceip, &dc->bw_vbios);
+ 
+ 	bw_calcs_data_update_from_pplib(dc);
++} else {
++
++	/* Resource should construct all asic specific resources.
++	 * This should be the only place where we need to parse the asic id
++	 */
++	if (!dc_construct_resource_pool(
++		NULL, dc, init_params->num_virtual_links, dc_version))
++		goto construct_resource_fail;
++}
+ 
+ 	return true;
+ 
+diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c b/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c
+index 917e6a5..2229699 100644
+--- a/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c
++++ b/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c
+@@ -42,13 +42,47 @@
+ #include "dce110/dce110_resource.h"
+ #endif
+ 
++bool resource_parse_asic_id(struct core_dc *dc,
++		struct hw_asic_id asic_id,
++		enum dce_version *dc_version)
++{
++	switch (asic_id.chip_family) {
++
++#if defined(CONFIG_DRM_AMD_DAL_DCE8_0)
++	case FAMILY_CI:
++	case FAMILY_KV:
++		*dc_version = DCE_VERSION_8_0;
++		break;
++#endif
++#if defined(CONFIG_DRM_AMD_DAL_DCE11_0)
++	case FAMILY_CZ:
++		*dc_version = DCE_VERSION_11_0;
++		break;
++#endif
++
++	case FAMILY_VI:
++#if defined(CONFIG_DRM_AMD_DAL_DCE10_0)
++		if (ASIC_REV_IS_TONGA_P(asic_id.hw_internal_rev) ||
++				ASIC_REV_IS_FIJI_P(asic_id.hw_internal_rev)) {
++			*dc_version = DCE_VERSION_10_0;
++			break;
++		}
++#endif
++		break;
++	default:
++		*dc_version = DCE_VERSION_UNKNOWN;
++		return false;
++	}
++	return true;
++}
++
+ bool dc_construct_resource_pool(struct adapter_service *adapter_serv,
+ 				struct core_dc *dc,
+-				uint8_t num_virtual_links)
++				uint8_t num_virtual_links,
++				enum dce_version dc_version)
+ {
+-	enum dce_version dce_ver = dal_adapter_service_get_dce_version(adapter_serv);
+ 
+-	switch (dce_ver) {
++	switch (dc_version) {
+ #if defined(CONFIG_DRM_AMD_DAL_DCE10_0)
+ 	case DCE_VERSION_10_0:
+ 		return dce100_construct_resource_pool(
+diff --git a/drivers/gpu/drm/amd/dal/dc/inc/resource.h b/drivers/gpu/drm/amd/dal/dc/inc/resource.h
+index 0836e41..9aefe9e 100644
+--- a/drivers/gpu/drm/amd/dal/dc/inc/resource.h
++++ b/drivers/gpu/drm/amd/dal/dc/inc/resource.h
+@@ -28,14 +28,20 @@
+ #include "core_types.h"
+ #include "core_status.h"
+ #include "core_dc.h"
++#include "dal_asic_id.h"
+ 
+ /* TODO unhardcode, 4 for CZ*/
+ #define MEMORY_TYPE_MULTIPLIER 4
+ #define DCE110_UNDERLAY_IDX 3
+ 
++bool resource_parse_asic_id(struct core_dc *dc,
++				struct hw_asic_id asic_id,
++				enum dce_version *dc_version);
++
+ bool dc_construct_resource_pool(struct adapter_service *adapter_serv,
+ 				struct core_dc *dc,
+-				uint8_t num_virtual_links);
++				uint8_t num_virtual_links,
++				enum dce_version dc_version);
+ 
+ enum dc_status resource_map_pool_resources(
+ 	const struct core_dc *dc,
+diff --git a/drivers/gpu/drm/amd/dal/include/dal_types.h b/drivers/gpu/drm/amd/dal/include/dal_types.h
+index eea3306..bcf83e9 100644
+--- a/drivers/gpu/drm/amd/dal/include/dal_types.h
++++ b/drivers/gpu/drm/amd/dal/include/dal_types.h
+@@ -43,7 +43,7 @@ enum dce_version {
+ #if defined(CONFIG_DRM_AMD_DAL_DCE11_0)
+ 	DCE_VERSION_11_0,
+ #endif
+-	DCE_VERSION_MAX
++	DCE_VERSION_MAX,
+ };
+ 
+ /* Wireless display structs */
+-- 
+2.7.4
+