diff options
Diffstat (limited to 'meta-amdfalconx86/recipes-kernel/linux/files/0351-drm-amdgpu-Clear-HDP_MISC_CNTL.HDP_FLUSH_INVALIDATE_.patch')
| -rw-r--r-- | meta-amdfalconx86/recipes-kernel/linux/files/0351-drm-amdgpu-Clear-HDP_MISC_CNTL.HDP_FLUSH_INVALIDATE_.patch | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/meta-amdfalconx86/recipes-kernel/linux/files/0351-drm-amdgpu-Clear-HDP_MISC_CNTL.HDP_FLUSH_INVALIDATE_.patch b/meta-amdfalconx86/recipes-kernel/linux/files/0351-drm-amdgpu-Clear-HDP_MISC_CNTL.HDP_FLUSH_INVALIDATE_.patch new file mode 100644 index 00000000..dc34584a --- /dev/null +++ b/meta-amdfalconx86/recipes-kernel/linux/files/0351-drm-amdgpu-Clear-HDP_MISC_CNTL.HDP_FLUSH_INVALIDATE_.patch @@ -0,0 +1,49 @@ +From 91549ea3878e482746ccc0033dd73e9d2050f096 Mon Sep 17 00:00:00 2001 +From: Chunming Zhou <David1.Zhou@amd.com> +Date: Thu, 3 Mar 2016 14:47:54 +0800 +Subject: [PATCH 0351/1110] drm/amdgpu: Clear + HDP_MISC_CNTL.HDP_FLUSH_INVALIDATE_CACHE +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +So that we can invalidate and flush the HDP independently + +Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Reviewed-by: Christian König <christian.koenig@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 2 +- + drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c +index 3065184..09829f1 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c +@@ -339,7 +339,7 @@ static void gmc_v7_0_mc_program(struct amdgpu_device *adev) + WREG32(mmBIF_FB_EN, BIF_FB_EN__FB_READ_EN_MASK | BIF_FB_EN__FB_WRITE_EN_MASK); + + tmp = RREG32(mmHDP_MISC_CNTL); +- tmp = REG_SET_FIELD(tmp, HDP_MISC_CNTL, FLUSH_INVALIDATE_CACHE, 1); ++ tmp = REG_SET_FIELD(tmp, HDP_MISC_CNTL, FLUSH_INVALIDATE_CACHE, 0); + WREG32(mmHDP_MISC_CNTL, tmp); + + tmp = RREG32(mmHDP_HOST_PATH_CNTL); +diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c +index f589e1b..bb254f1 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c +@@ -386,7 +386,7 @@ static void gmc_v8_0_mc_program(struct amdgpu_device *adev) + WREG32(mmBIF_FB_EN, BIF_FB_EN__FB_READ_EN_MASK | BIF_FB_EN__FB_WRITE_EN_MASK); + + tmp = RREG32(mmHDP_MISC_CNTL); +- tmp = REG_SET_FIELD(tmp, HDP_MISC_CNTL, FLUSH_INVALIDATE_CACHE, 1); ++ tmp = REG_SET_FIELD(tmp, HDP_MISC_CNTL, FLUSH_INVALIDATE_CACHE, 0); + WREG32(mmHDP_MISC_CNTL, tmp); + + tmp = RREG32(mmHDP_HOST_PATH_CNTL); +-- +2.7.4 + |