diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9038-amd-xgbe-PLL-enabled-for-10G-Base-T.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9038-amd-xgbe-PLL-enabled-for-10G-Base-T.patch | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9038-amd-xgbe-PLL-enabled-for-10G-Base-T.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9038-amd-xgbe-PLL-enabled-for-10G-Base-T.patch new file mode 100644 index 00000000..6439f0e7 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9038-amd-xgbe-PLL-enabled-for-10G-Base-T.patch @@ -0,0 +1,44 @@ +From 8f7dd897c17a64ab32cb9921ab9aead3e8c6b617 Mon Sep 17 00:00:00 2001 +From: rgaridap <Ramesh.Garidapuri@amd.com> +Date: Thu, 31 Mar 2022 22:34:14 +0530 +Subject: [PATCH 38/48] amd-xgbe: PLL enabled for 10G-Base-T + +Signed-off-by: rgaridap <Ramesh.Garidapuri@amd.com> +Change-Id: Ic2445973a0ed9ebb545dda6d7e67bb02f3e3d23f +Signed-off-by: rgaridap <Ramesh.Garidapuri@amd.com> +--- + drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c | 12 ++++++++---- + 1 file changed, 8 insertions(+), 4 deletions(-) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +index 6a3a5a305c92..df7d326616fb 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +@@ -1993,16 +1993,20 @@ static void xgbe_phy_rx_reset(struct xgbe_prv_data *pdata) + + static void xgbe_phy_pll_ctrl(struct xgbe_prv_data *pdata, bool enable) + { ++ ++ struct xgbe_phy_data *phy_data = pdata->phy_data; ++ + /* PLL_CTRL feature needs to be enabled for fixed PHY modes (Non-Autoneg) only */ +- if (pdata->phy.autoneg == AUTONEG_DISABLE) { ++ if (pdata->phy.autoneg == AUTONEG_DISABLE || ++ phy_data->port_mode == XGBE_PORT_MODE_10GBASE_T) { + XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_VEND2_PMA_MISC_CTRL0, +- XGBE_PMA_PLL_CTRL_MASK, +- enable ? XGBE_PMA_PLL_CTRL_ENABLE ++ XGBE_PMA_PLL_CTRL_MASK, ++ enable ? XGBE_PMA_PLL_CTRL_ENABLE + : XGBE_PMA_PLL_CTRL_DISABLE); + + /* Wait for command to complete */ + usleep_range(100, 200); +- } ++ } + } + + static void xgbe_phy_perform_ratechange(struct xgbe_prv_data *pdata, +-- +2.27.0 + |